Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	14311054	1			T24	774		T25	88		T26	664
all_values[1]	14311054	1			T24	774		T25	88		T26	664
all_values[2]	14311054	1			T24	774		T25	88		T26	664
all_values[3]	14311054	1			T24	774		T25	88		T26	664
all_values[4]	14311054	1			T24	774		T25	88		T26	664
all_values[5]	14311054	1			T24	774		T25	88		T26	664
all_values[6]	14311054	1			T24	774		T25	88		T26	664
all_values[7]	14311054	1			T24	774		T25	88		T26	664
all_values[8]	14311054	1			T24	774		T25	88		T26	664
all_values[9]	14311054	1			T24	774		T25	88		T26	664
all_values[10]	14311054	1			T24	774		T25	88		T26	664
all_values[11]	14311054	1			T24	774		T25	88		T26	664
all_values[12]	14311054	1			T24	774		T25	88		T26	664
all_values[13]	14311054	1			T24	774		T25	88		T26	664
all_values[14]	14311054	1			T24	774		T25	88		T26	664
all_values[15]	14311054	1			T24	774		T25	88		T26	664
all_values[16]	14311054	1			T24	774		T25	88		T26	664
all_values[17]	14311054	1			T24	774		T25	88		T26	664
all_values[18]	14311054	1			T24	774		T25	88		T26	664
all_values[19]	14311054	1			T24	774		T25	88		T26	664
all_values[20]	14311054	1			T24	774		T25	88		T26	664
all_values[21]	14311054	1			T24	774		T25	88		T26	664
all_values[22]	14311054	1			T24	774		T25	88		T26	664
all_values[23]	14311054	1			T24	774		T25	88		T26	664
all_values[24]	14311054	1			T24	774		T25	88		T26	664
all_values[25]	14311054	1			T24	774		T25	88		T26	664
all_values[26]	14311054	1			T24	774		T25	88		T26	664
all_values[27]	14311054	1			T24	774		T25	88		T26	664
all_values[28]	14311054	1			T24	774		T25	88		T26	664
all_values[29]	14311054	1			T24	774		T25	88		T26	664
all_values[30]	14311054	1			T24	774		T25	88		T26	664
all_values[31]	14311054	1			T24	774		T25	88		T26	664

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

263220066

1

T24

24768

T25

2816

T26

11369

auto[1]

194733662

1

T26

9879

T1

24807

T11

7317

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

105698940

1

T24

24768

T25

2816

T26

2448

auto[1]

352254788

1

T26

18800

T1

42597

T11

13337

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2710441	1			T24	774		T25	88		T26	58
all_values[0]	auto[0]	auto[1]	5513211	1			T26	324		T1	620		T11	216
all_values[0]	auto[1]	auto[0]	588993	1			T26	37		T1	99		T11	6
all_values[0]	auto[1]	auto[1]	5498409	1			T26	245		T1	743		T11	200
all_values[1]	auto[0]	auto[0]	2716042	1			T24	774		T25	88		T26	61
all_values[1]	auto[0]	auto[1]	5493727	1			T26	313		T1	655		T11	162
all_values[1]	auto[1]	auto[0]	591521	1			T26	25		T1	69		T11	25
all_values[1]	auto[1]	auto[1]	5509764	1			T26	265		T1	648		T11	231
all_values[2]	auto[0]	auto[0]	2715117	1			T24	774		T25	88		T26	56
all_values[2]	auto[0]	auto[1]	5537267	1			T26	375		T1	840		T11	65
all_values[2]	auto[1]	auto[0]	591375	1			T26	15		T1	101		T11	73
all_values[2]	auto[1]	auto[1]	5467295	1			T26	218		T1	503		T11	317
all_values[3]	auto[0]	auto[0]	2715077	1			T24	774		T25	88		T26	60
all_values[3]	auto[0]	auto[1]	5490474	1			T26	300		T1	768		T11	234
all_values[3]	auto[1]	auto[0]	591375	1			T26	46		T1	54		T11	13
all_values[3]	auto[1]	auto[1]	5514128	1			T26	258		T1	660		T11	180
all_values[4]	auto[0]	auto[0]	2719481	1			T24	774		T25	88		T26	33
all_values[4]	auto[0]	auto[1]	5508934	1			T26	233		T1	568		T11	220
all_values[4]	auto[1]	auto[0]	589819	1			T26	37		T1	160		T11	18
all_values[4]	auto[1]	auto[1]	5492820	1			T26	361		T1	693		T11	213
all_values[5]	auto[0]	auto[0]	2717201	1			T24	774		T25	88		T26	36
all_values[5]	auto[0]	auto[1]	5504228	1			T26	223		T1	712		T11	223
all_values[5]	auto[1]	auto[0]	589799	1			T26	33		T1	79		T11	7
all_values[5]	auto[1]	auto[1]	5499826	1			T26	372		T1	660		T11	224
all_values[6]	auto[0]	auto[0]	2723356	1			T24	774		T25	88		T26	33
all_values[6]	auto[0]	auto[1]	5525723	1			T26	325		T1	741		T11	323
all_values[6]	auto[1]	auto[0]	574292	1			T26	23		T1	61		T11	3
all_values[6]	auto[1]	auto[1]	5487683	1			T26	283		T1	678		T11	100
all_values[7]	auto[0]	auto[0]	2709447	1			T24	774		T25	88		T26	40
all_values[7]	auto[0]	auto[1]	5522071	1			T26	387		T1	559		T11	258
all_values[7]	auto[1]	auto[0]	588079	1			T26	10		T1	153		T11	8
all_values[7]	auto[1]	auto[1]	5491457	1			T26	227		T1	752		T11	172
all_values[8]	auto[0]	auto[0]	2718405	1			T24	774		T25	88		T26	51
all_values[8]	auto[0]	auto[1]	5513634	1			T26	263		T1	742		T11	317
all_values[8]	auto[1]	auto[0]	596936	1			T26	23		T1	49		T11	6
all_values[8]	auto[1]	auto[1]	5482079	1			T26	327		T1	600		T11	123
all_values[9]	auto[0]	auto[0]	2712394	1			T24	774		T25	88		T26	53
all_values[9]	auto[0]	auto[1]	5532839	1			T26	463		T1	682		T11	128
all_values[9]	auto[1]	auto[0]	595891	1			T26	30		T1	150		T11	67
all_values[9]	auto[1]	auto[1]	5469930	1			T26	118		T1	485		T11	246
all_values[10]	auto[0]	auto[0]	2717030	1			T24	774		T25	88		T26	30
all_values[10]	auto[0]	auto[1]	5491873	1			T26	347		T1	755		T11	231
all_values[10]	auto[1]	auto[0]	591072	1			T26	29		T1	106		T11	18
all_values[10]	auto[1]	auto[1]	5511079	1			T26	258		T1	571		T11	200
all_values[11]	auto[0]	auto[0]	2710925	1			T24	774		T25	88		T26	66
all_values[11]	auto[0]	auto[1]	5515693	1			T26	451		T1	529		T11	189
all_values[11]	auto[1]	auto[0]	587530	1			T26	4		T1	175		T11	8
all_values[11]	auto[1]	auto[1]	5496906	1			T26	143		T1	760		T11	188
all_values[12]	auto[0]	auto[0]	2709085	1			T24	774		T25	88		T26	46
all_values[12]	auto[0]	auto[1]	5536308	1			T26	269		T1	660		T11	226
all_values[12]	auto[1]	auto[0]	588365	1			T26	66		T1	88		T11	47
all_values[12]	auto[1]	auto[1]	5477296	1			T26	283		T1	695		T11	131
all_values[13]	auto[0]	auto[0]	2710867	1			T24	774		T25	88		T26	6
all_values[13]	auto[0]	auto[1]	5507482	1			T26	204		T1	614		T11	174
all_values[13]	auto[1]	auto[0]	584224	1			T26	71		T1	113		T11	8
all_values[13]	auto[1]	auto[1]	5508481	1			T26	383		T1	730		T11	267
all_values[14]	auto[0]	auto[0]	2715210	1			T24	774		T25	88		T26	69
all_values[14]	auto[0]	auto[1]	5524611	1			T26	359		T1	678		T11	263
all_values[14]	auto[1]	auto[0]	587609	1			T26	4		T1	65		T11	21
all_values[14]	auto[1]	auto[1]	5483624	1			T26	232		T1	742		T11	140
all_values[15]	auto[0]	auto[0]	2719699	1			T24	774		T25	88		T26	21
all_values[15]	auto[0]	auto[1]	5544375	1			T26	270		T1	549		T11	189
all_values[15]	auto[1]	auto[0]	584359	1			T26	22		T1	105		T11	26
all_values[15]	auto[1]	auto[1]	5462621	1			T26	351		T1	830		T11	234
all_values[16]	auto[0]	auto[0]	2709132	1			T24	774		T25	88		T26	40
all_values[16]	auto[0]	auto[1]	5486068	1			T26	264		T1	694		T11	67
all_values[16]	auto[1]	auto[0]	593919	1			T26	23		T1	58		T11	32
all_values[16]	auto[1]	auto[1]	5521935	1			T26	337		T1	695		T11	348
all_values[17]	auto[0]	auto[0]	2712224	1			T24	774		T25	88		T26	17
all_values[17]	auto[0]	auto[1]	5503851	1			T26	245		T1	683		T11	131
all_values[17]	auto[1]	auto[0]	588533	1			T26	29		T1	112		T11	12
all_values[17]	auto[1]	auto[1]	5506446	1			T26	373		T1	651		T11	317
all_values[18]	auto[0]	auto[0]	2716063	1			T24	774		T25	88		T26	55
all_values[18]	auto[0]	auto[1]	5501106	1			T26	227		T1	573		T11	251
all_values[18]	auto[1]	auto[0]	588817	1			T26	34		T1	117		T11	4
all_values[18]	auto[1]	auto[1]	5505068	1			T26	348		T1	746		T11	159
all_values[19]	auto[0]	auto[0]	2723590	1			T24	774		T25	88		T26	70
all_values[19]	auto[0]	auto[1]	5493007	1			T26	296		T1	794		T11	227
all_values[19]	auto[1]	auto[0]	588543	1			T26	37		T1	110		T11	7
all_values[19]	auto[1]	auto[1]	5505914	1			T26	261		T1	554		T11	183
all_values[20]	auto[0]	auto[0]	2727299	1			T24	774		T25	88		T26	81
all_values[20]	auto[0]	auto[1]	5493185	1			T26	317		T1	687		T11	288
all_values[20]	auto[1]	auto[0]	583987	1			T26	72		T1	116		T11	7
all_values[20]	auto[1]	auto[1]	5506583	1			T26	194		T1	642		T11	151
all_values[21]	auto[0]	auto[0]	2717290	1			T24	774		T25	88		T26	41
all_values[21]	auto[0]	auto[1]	5525142	1			T26	255		T1	711		T11	165
all_values[21]	auto[1]	auto[0]	590504	1			T26	37		T1	117		T11	50
all_values[21]	auto[1]	auto[1]	5478118	1			T26	331		T1	587		T11	233
all_values[22]	auto[0]	auto[0]	2721224	1			T24	774		T25	88		T26	57
all_values[22]	auto[0]	auto[1]	5496591	1			T26	387		T1	538		T11	206
all_values[22]	auto[1]	auto[0]	592024	1			T26	31		T1	149		T11	18
all_values[22]	auto[1]	auto[1]	5501215	1			T26	189		T1	786		T11	198
all_values[23]	auto[0]	auto[0]	2714284	1			T24	774		T25	88		T26	47
all_values[23]	auto[0]	auto[1]	5561251	1			T26	280		T1	574		T11	178
all_values[23]	auto[1]	auto[0]	579490	1			T26	28		T1	157		T11	31
all_values[23]	auto[1]	auto[1]	5456029	1			T26	309		T1	707		T11	225
all_values[24]	auto[0]	auto[0]	2711381	1			T24	774		T25	88		T26	37
all_values[24]	auto[0]	auto[1]	5503241	1			T26	309		T1	662		T11	136
all_values[24]	auto[1]	auto[0]	588793	1			T26	39		T1	146		T11	25
all_values[24]	auto[1]	auto[1]	5507639	1			T26	279		T1	602		T11	247
all_values[25]	auto[0]	auto[0]	2717005	1			T24	774		T25	88		T26	39
all_values[25]	auto[0]	auto[1]	5457480	1			T26	211		T1	694		T11	254
all_values[25]	auto[1]	auto[0]	592216	1			T26	15		T1	111		T11	23
all_values[25]	auto[1]	auto[1]	5544353	1			T26	399		T1	617		T11	172
all_values[26]	auto[0]	auto[0]	2712667	1			T24	774		T25	88		T26	54
all_values[26]	auto[0]	auto[1]	5496904	1			T26	371		T1	670		T11	273
all_values[26]	auto[1]	auto[0]	590179	1			T26	25		T1	116		T11	26
all_values[26]	auto[1]	auto[1]	5511304	1			T26	214		T1	676		T11	146
all_values[27]	auto[0]	auto[0]	2713314	1			T24	774		T25	88		T26	16
all_values[27]	auto[0]	auto[1]	5526394	1			T26	303		T1	732		T11	251
all_values[27]	auto[1]	auto[0]	584875	1			T26	47		T1	75		T11	27
all_values[27]	auto[1]	auto[1]	5486471	1			T26	298		T1	609		T11	176
all_values[28]	auto[0]	auto[0]	2706299	1			T24	774		T25	88		T26	43
all_values[28]	auto[0]	auto[1]	5478343	1			T26	416		T1	654		T11	229
all_values[28]	auto[1]	auto[0]	579988	1			T26	27		T1	113		T11	4
all_values[28]	auto[1]	auto[1]	5546424	1			T26	178		T1	649		T11	224
all_values[29]	auto[0]	auto[0]	2707050	1			T24	774		T25	88		T26	36
all_values[29]	auto[0]	auto[1]	5514824	1			T26	239		T1	513		T11	229
all_values[29]	auto[1]	auto[0]	587670	1			T26	36		T1	67		T11	9
all_values[29]	auto[1]	auto[1]	5501510	1			T26	353		T1	899		T11	222
all_values[30]	auto[0]	auto[0]	2709908	1			T24	774		T25	88		T26	24
all_values[30]	auto[0]	auto[1]	5515944	1			T26	346		T1	709		T11	260
all_values[30]	auto[1]	auto[0]	586665	1			T26	61		T1	73		T11	44
all_values[30]	auto[1]	auto[1]	5498537	1			T26	233		T1	638		T11	153
all_values[31]	auto[0]	auto[0]	2715347	1			T24	774		T25	88		T26	48
all_values[31]	auto[0]	auto[1]	5530431	1			T26	373		T1	629		T11	134
all_values[31]	auto[1]	auto[0]	587644	1			T26	8		T1	135		T11	4
all_values[31]	auto[1]	auto[1]	5477632	1			T26	235		T1	600		T11	320