Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7589605 |
1 |
|
|
T23 |
81 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5534404 |
1 |
|
|
T23 |
42 |
|
T27 |
27037 |
|
T31 |
222365 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10854179 |
1 |
|
|
T23 |
109 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
2269830 |
1 |
|
|
T23 |
14 |
|
T27 |
17538 |
|
T31 |
82982 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7570062 |
1 |
|
|
T23 |
94 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5553947 |
1 |
|
|
T23 |
29 |
|
T27 |
26479 |
|
T31 |
219184 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1652606 |
1 |
|
|
T23 |
6 |
|
T27 |
4208 |
|
T31 |
68206 |
| auto[1] |
auto[0] |
auto[1] |
1142864 |
1 |
|
|
T23 |
6 |
|
T27 |
9266 |
|
T31 |
41126 |
| auto[1] |
auto[1] |
auto[0] |
1631511 |
1 |
|
|
T23 |
9 |
|
T27 |
4733 |
|
T31 |
67996 |
| auto[1] |
auto[1] |
auto[1] |
1126966 |
1 |
|
|
T23 |
8 |
|
T27 |
8272 |
|
T31 |
41856 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |