Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7585948 |
1 |
|
|
T23 |
85 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5538061 |
1 |
|
|
T23 |
38 |
|
T27 |
26825 |
|
T31 |
218723 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10855624 |
1 |
|
|
T23 |
116 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
2268385 |
1 |
|
|
T23 |
7 |
|
T27 |
18439 |
|
T31 |
83828 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7566179 |
1 |
|
|
T23 |
100 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5557830 |
1 |
|
|
T23 |
23 |
|
T27 |
28651 |
|
T31 |
223272 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1651420 |
1 |
|
|
T23 |
9 |
|
T27 |
5386 |
|
T31 |
70412 |
| auto[1] |
auto[0] |
auto[1] |
1139355 |
1 |
|
|
T27 |
9374 |
|
T31 |
41686 |
|
T61 |
342 |
| auto[1] |
auto[1] |
auto[0] |
1638025 |
1 |
|
|
T23 |
7 |
|
T27 |
4826 |
|
T31 |
69032 |
| auto[1] |
auto[1] |
auto[1] |
1129030 |
1 |
|
|
T23 |
7 |
|
T27 |
9065 |
|
T31 |
42142 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |