Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7581687 |
1 |
|
|
T23 |
74 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5542322 |
1 |
|
|
T23 |
49 |
|
T27 |
27647 |
|
T31 |
227443 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10864213 |
1 |
|
|
T23 |
117 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
2259796 |
1 |
|
|
T23 |
6 |
|
T27 |
17308 |
|
T31 |
84109 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7581508 |
1 |
|
|
T23 |
97 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5542501 |
1 |
|
|
T23 |
26 |
|
T27 |
27464 |
|
T31 |
224855 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1637650 |
1 |
|
|
T23 |
7 |
|
T27 |
4977 |
|
T31 |
66263 |
| auto[1] |
auto[0] |
auto[1] |
1132137 |
1 |
|
|
T23 |
5 |
|
T27 |
8805 |
|
T31 |
40349 |
| auto[1] |
auto[1] |
auto[0] |
1645055 |
1 |
|
|
T23 |
13 |
|
T27 |
5179 |
|
T31 |
74483 |
| auto[1] |
auto[1] |
auto[1] |
1127659 |
1 |
|
|
T23 |
1 |
|
T27 |
8503 |
|
T31 |
43760 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |