Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7607239 |
1 |
|
|
T23 |
70 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5516770 |
1 |
|
|
T23 |
53 |
|
T27 |
26465 |
|
T31 |
224542 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10837410 |
1 |
|
|
T23 |
116 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
2286599 |
1 |
|
|
T23 |
7 |
|
T27 |
17159 |
|
T31 |
84848 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7529625 |
1 |
|
|
T23 |
109 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5594384 |
1 |
|
|
T23 |
14 |
|
T27 |
27066 |
|
T31 |
220827 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1672961 |
1 |
|
|
T23 |
3 |
|
T27 |
5062 |
|
T31 |
67893 |
| auto[1] |
auto[0] |
auto[1] |
1155909 |
1 |
|
|
T23 |
3 |
|
T27 |
8869 |
|
T31 |
42328 |
| auto[1] |
auto[1] |
auto[0] |
1634824 |
1 |
|
|
T23 |
4 |
|
T27 |
4845 |
|
T31 |
68086 |
| auto[1] |
auto[1] |
auto[1] |
1130690 |
1 |
|
|
T23 |
4 |
|
T27 |
8290 |
|
T31 |
42520 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |