Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7574504 |
1 |
|
|
T23 |
78 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5549505 |
1 |
|
|
T23 |
45 |
|
T27 |
27540 |
|
T31 |
216793 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10855737 |
1 |
|
|
T23 |
109 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
2268272 |
1 |
|
|
T23 |
14 |
|
T27 |
17675 |
|
T31 |
83962 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7577887 |
1 |
|
|
T23 |
91 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5546122 |
1 |
|
|
T23 |
32 |
|
T27 |
27624 |
|
T31 |
219845 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1623423 |
1 |
|
|
T23 |
9 |
|
T27 |
4745 |
|
T31 |
68724 |
| auto[1] |
auto[0] |
auto[1] |
1128995 |
1 |
|
|
T23 |
7 |
|
T27 |
8698 |
|
T31 |
42373 |
| auto[1] |
auto[1] |
auto[0] |
1654427 |
1 |
|
|
T23 |
9 |
|
T27 |
5204 |
|
T31 |
67159 |
| auto[1] |
auto[1] |
auto[1] |
1139277 |
1 |
|
|
T23 |
7 |
|
T27 |
8977 |
|
T31 |
41589 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |