Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7539746 |
1 |
|
|
T23 |
76 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5584263 |
1 |
|
|
T23 |
47 |
|
T27 |
27161 |
|
T31 |
220483 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12417092 |
1 |
|
|
T23 |
122 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
706917 |
1 |
|
|
T23 |
1 |
|
T27 |
3014 |
|
T31 |
28078 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7561810 |
1 |
|
|
T23 |
92 |
|
T24 |
43197 |
|
T25 |
458 |
| auto[1] |
5562199 |
1 |
|
|
T23 |
31 |
|
T27 |
26878 |
|
T31 |
222071 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2410484 |
1 |
|
|
T23 |
4 |
|
T27 |
11313 |
|
T31 |
95044 |
| auto[1] |
auto[0] |
auto[1] |
350092 |
1 |
|
|
T27 |
1355 |
|
T31 |
13742 |
|
T61 |
103 |
| auto[1] |
auto[1] |
auto[0] |
2444798 |
1 |
|
|
T23 |
26 |
|
T27 |
12551 |
|
T31 |
98949 |
| auto[1] |
auto[1] |
auto[1] |
356825 |
1 |
|
|
T23 |
1 |
|
T27 |
1659 |
|
T31 |
14336 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |