Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1985110 |
1 |
|
|
T32 |
21670 |
|
T35 |
138 |
|
T20 |
79 |
auto[1] |
1734790 |
1 |
|
|
T32 |
19952 |
|
T35 |
132 |
|
T20 |
30 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2336526 |
1 |
|
|
T32 |
26183 |
|
T35 |
171 |
|
T20 |
98 |
auto[1] |
1383374 |
1 |
|
|
T32 |
15439 |
|
T35 |
99 |
|
T20 |
11 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1288583 |
1 |
|
|
T32 |
13966 |
|
T35 |
89 |
|
T20 |
79 |
auto[0] |
auto[1] |
696527 |
1 |
|
|
T32 |
7704 |
|
T35 |
49 |
|
T25 |
11 |
auto[1] |
auto[0] |
1047943 |
1 |
|
|
T32 |
12217 |
|
T35 |
82 |
|
T20 |
19 |
auto[1] |
auto[1] |
686847 |
1 |
|
|
T32 |
7735 |
|
T35 |
50 |
|
T20 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1982635 |
1 |
|
|
T32 |
21667 |
|
T35 |
134 |
|
T20 |
91 |
auto[1] |
1737265 |
1 |
|
|
T32 |
19955 |
|
T35 |
136 |
|
T20 |
18 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2336550 |
1 |
|
|
T32 |
26319 |
|
T35 |
137 |
|
T20 |
94 |
auto[1] |
1383350 |
1 |
|
|
T32 |
15303 |
|
T35 |
133 |
|
T20 |
15 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1286710 |
1 |
|
|
T32 |
14098 |
|
T35 |
67 |
|
T20 |
80 |
auto[0] |
auto[1] |
695925 |
1 |
|
|
T32 |
7569 |
|
T35 |
67 |
|
T20 |
11 |
auto[1] |
auto[0] |
1049840 |
1 |
|
|
T32 |
12221 |
|
T35 |
70 |
|
T20 |
14 |
auto[1] |
auto[1] |
687425 |
1 |
|
|
T32 |
7734 |
|
T35 |
66 |
|
T20 |
4 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983978 |
1 |
|
|
T32 |
21639 |
|
T35 |
124 |
|
T20 |
70 |
auto[1] |
1735922 |
1 |
|
|
T32 |
19983 |
|
T35 |
146 |
|
T20 |
39 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2334524 |
1 |
|
|
T32 |
26232 |
|
T35 |
122 |
|
T20 |
99 |
auto[1] |
1385376 |
1 |
|
|
T32 |
15390 |
|
T35 |
148 |
|
T20 |
10 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1286490 |
1 |
|
|
T32 |
13692 |
|
T35 |
56 |
|
T20 |
67 |
auto[0] |
auto[1] |
697488 |
1 |
|
|
T32 |
7947 |
|
T35 |
68 |
|
T20 |
3 |
auto[1] |
auto[0] |
1048034 |
1 |
|
|
T32 |
12540 |
|
T35 |
66 |
|
T20 |
32 |
auto[1] |
auto[1] |
687888 |
1 |
|
|
T32 |
7443 |
|
T35 |
80 |
|
T20 |
7 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1981654 |
1 |
|
|
T32 |
21596 |
|
T35 |
134 |
|
T20 |
84 |
auto[1] |
1738246 |
1 |
|
|
T32 |
20026 |
|
T35 |
136 |
|
T20 |
25 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2334726 |
1 |
|
|
T32 |
26074 |
|
T35 |
151 |
|
T20 |
93 |
auto[1] |
1385174 |
1 |
|
|
T32 |
15548 |
|
T35 |
119 |
|
T20 |
16 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1285571 |
1 |
|
|
T32 |
13685 |
|
T35 |
75 |
|
T20 |
72 |
auto[0] |
auto[1] |
696083 |
1 |
|
|
T32 |
7911 |
|
T35 |
59 |
|
T20 |
12 |
auto[1] |
auto[0] |
1049155 |
1 |
|
|
T32 |
12389 |
|
T35 |
76 |
|
T20 |
21 |
auto[1] |
auto[1] |
689091 |
1 |
|
|
T32 |
7637 |
|
T35 |
60 |
|
T20 |
4 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1984991 |
1 |
|
|
T32 |
21652 |
|
T35 |
132 |
|
T20 |
68 |
auto[1] |
1734909 |
1 |
|
|
T32 |
19970 |
|
T35 |
138 |
|
T20 |
41 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2333425 |
1 |
|
|
T32 |
25916 |
|
T35 |
132 |
|
T20 |
109 |
auto[1] |
1386475 |
1 |
|
|
T32 |
15706 |
|
T35 |
138 |
|
T25 |
6 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1286422 |
1 |
|
|
T32 |
13782 |
|
T35 |
71 |
|
T20 |
68 |
auto[0] |
auto[1] |
698569 |
1 |
|
|
T32 |
7870 |
|
T35 |
61 |
|
T25 |
3 |
auto[1] |
auto[0] |
1047003 |
1 |
|
|
T32 |
12134 |
|
T35 |
61 |
|
T20 |
41 |
auto[1] |
auto[1] |
687906 |
1 |
|
|
T32 |
7836 |
|
T35 |
77 |
|
T25 |
3 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1976455 |
1 |
|
|
T32 |
21920 |
|
T35 |
122 |
|
T20 |
70 |
auto[1] |
1743445 |
1 |
|
|
T32 |
19702 |
|
T35 |
148 |
|
T20 |
39 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2338105 |
1 |
|
|
T32 |
26013 |
|
T35 |
134 |
|
T20 |
105 |
auto[1] |
1381795 |
1 |
|
|
T32 |
15609 |
|
T35 |
136 |
|
T20 |
4 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1282693 |
1 |
|
|
T32 |
14115 |
|
T35 |
56 |
|
T20 |
70 |
auto[0] |
auto[1] |
693762 |
1 |
|
|
T32 |
7805 |
|
T35 |
66 |
|
T23 |
9 |
auto[1] |
auto[0] |
1055412 |
1 |
|
|
T32 |
11898 |
|
T35 |
78 |
|
T20 |
35 |
auto[1] |
auto[1] |
688033 |
1 |
|
|
T32 |
7804 |
|
T35 |
70 |
|
T20 |
4 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1986320 |
1 |
|
|
T32 |
21522 |
|
T35 |
132 |
|
T20 |
53 |
auto[1] |
1733580 |
1 |
|
|
T32 |
20100 |
|
T35 |
138 |
|
T20 |
56 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2334860 |
1 |
|
|
T32 |
26113 |
|
T35 |
151 |
|
T20 |
91 |
auto[1] |
1385040 |
1 |
|
|
T32 |
15509 |
|
T35 |
119 |
|
T20 |
18 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1287579 |
1 |
|
|
T32 |
13817 |
|
T35 |
75 |
|
T20 |
46 |
auto[0] |
auto[1] |
698741 |
1 |
|
|
T32 |
7705 |
|
T35 |
57 |
|
T20 |
7 |
auto[1] |
auto[0] |
1047281 |
1 |
|
|
T32 |
12296 |
|
T35 |
76 |
|
T20 |
45 |
auto[1] |
auto[1] |
686299 |
1 |
|
|
T32 |
7804 |
|
T35 |
62 |
|
T20 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1978465 |
1 |
|
|
T32 |
21259 |
|
T35 |
146 |
|
T20 |
70 |
auto[1] |
1741435 |
1 |
|
|
T32 |
20363 |
|
T35 |
124 |
|
T20 |
39 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2336872 |
1 |
|
|
T32 |
25913 |
|
T35 |
119 |
|
T20 |
92 |
auto[1] |
1383028 |
1 |
|
|
T32 |
15709 |
|
T35 |
151 |
|
T20 |
17 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1285684 |
1 |
|
|
T32 |
13582 |
|
T35 |
62 |
|
T20 |
64 |
auto[0] |
auto[1] |
692781 |
1 |
|
|
T32 |
7677 |
|
T35 |
84 |
|
T20 |
6 |
auto[1] |
auto[0] |
1051188 |
1 |
|
|
T32 |
12331 |
|
T35 |
57 |
|
T20 |
28 |
auto[1] |
auto[1] |
690247 |
1 |
|
|
T32 |
8032 |
|
T35 |
67 |
|
T20 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983535 |
1 |
|
|
T32 |
21743 |
|
T35 |
144 |
|
T20 |
76 |
auto[1] |
1736365 |
1 |
|
|
T32 |
19879 |
|
T35 |
126 |
|
T20 |
33 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2339833 |
1 |
|
|
T32 |
26405 |
|
T35 |
131 |
|
T20 |
101 |
auto[1] |
1380067 |
1 |
|
|
T32 |
15217 |
|
T35 |
139 |
|
T20 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1288617 |
1 |
|
|
T32 |
14113 |
|
T35 |
68 |
|
T20 |
73 |
auto[0] |
auto[1] |
694918 |
1 |
|
|
T32 |
7630 |
|
T35 |
76 |
|
T20 |
3 |
auto[1] |
auto[0] |
1051216 |
1 |
|
|
T32 |
12292 |
|
T35 |
63 |
|
T20 |
28 |
auto[1] |
auto[1] |
685149 |
1 |
|
|
T32 |
7587 |
|
T35 |
63 |
|
T20 |
5 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1982174 |
1 |
|
|
T32 |
21254 |
|
T35 |
146 |
|
T20 |
97 |
auto[1] |
1737726 |
1 |
|
|
T32 |
20368 |
|
T35 |
124 |
|
T20 |
12 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341843 |
1 |
|
|
T32 |
25929 |
|
T35 |
140 |
|
T20 |
101 |
auto[1] |
1378057 |
1 |
|
|
T32 |
15693 |
|
T35 |
130 |
|
T20 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1288370 |
1 |
|
|
T32 |
13550 |
|
T35 |
77 |
|
T20 |
95 |
auto[0] |
auto[1] |
693804 |
1 |
|
|
T32 |
7704 |
|
T35 |
69 |
|
T20 |
2 |
auto[1] |
auto[0] |
1053473 |
1 |
|
|
T32 |
12379 |
|
T35 |
63 |
|
T20 |
6 |
auto[1] |
auto[1] |
684253 |
1 |
|
|
T32 |
7989 |
|
T35 |
61 |
|
T20 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1985327 |
1 |
|
|
T32 |
21746 |
|
T35 |
144 |
|
T20 |
79 |
auto[1] |
1734573 |
1 |
|
|
T32 |
19876 |
|
T35 |
126 |
|
T20 |
30 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342086 |
1 |
|
|
T32 |
26206 |
|
T35 |
128 |
|
T20 |
100 |
auto[1] |
1377814 |
1 |
|
|
T32 |
15416 |
|
T35 |
142 |
|
T20 |
9 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1291369 |
1 |
|
|
T32 |
13980 |
|
T35 |
71 |
|
T20 |
75 |
auto[0] |
auto[1] |
693958 |
1 |
|
|
T32 |
7766 |
|
T35 |
73 |
|
T20 |
4 |
auto[1] |
auto[0] |
1050717 |
1 |
|
|
T32 |
12226 |
|
T35 |
57 |
|
T20 |
25 |
auto[1] |
auto[1] |
683856 |
1 |
|
|
T32 |
7650 |
|
T35 |
69 |
|
T20 |
5 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983275 |
1 |
|
|
T32 |
21782 |
|
T35 |
148 |
|
T20 |
99 |
auto[1] |
1736625 |
1 |
|
|
T32 |
19840 |
|
T35 |
122 |
|
T20 |
10 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341666 |
1 |
|
|
T32 |
26154 |
|
T35 |
111 |
|
T20 |
105 |
auto[1] |
1378234 |
1 |
|
|
T32 |
15468 |
|
T35 |
159 |
|
T20 |
4 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1290309 |
1 |
|
|
T32 |
13975 |
|
T35 |
60 |
|
T20 |
96 |
auto[0] |
auto[1] |
692966 |
1 |
|
|
T32 |
7807 |
|
T35 |
88 |
|
T20 |
3 |
auto[1] |
auto[0] |
1051357 |
1 |
|
|
T32 |
12179 |
|
T35 |
51 |
|
T20 |
9 |
auto[1] |
auto[1] |
685268 |
1 |
|
|
T32 |
7661 |
|
T35 |
71 |
|
T20 |
1 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1985730 |
1 |
|
|
T32 |
21779 |
|
T35 |
140 |
|
T20 |
68 |
auto[1] |
1734170 |
1 |
|
|
T32 |
19843 |
|
T35 |
130 |
|
T20 |
41 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2336608 |
1 |
|
|
T32 |
25860 |
|
T35 |
151 |
|
T20 |
101 |
auto[1] |
1383292 |
1 |
|
|
T32 |
15762 |
|
T35 |
119 |
|
T20 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1287892 |
1 |
|
|
T32 |
13950 |
|
T35 |
79 |
|
T20 |
62 |
auto[0] |
auto[1] |
697838 |
1 |
|
|
T32 |
7829 |
|
T35 |
61 |
|
T20 |
6 |
auto[1] |
auto[0] |
1048716 |
1 |
|
|
T32 |
11910 |
|
T35 |
72 |
|
T20 |
39 |
auto[1] |
auto[1] |
685454 |
1 |
|
|
T32 |
7933 |
|
T35 |
58 |
|
T20 |
2 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1982119 |
1 |
|
|
T32 |
21952 |
|
T35 |
110 |
|
T20 |
91 |
auto[1] |
1737781 |
1 |
|
|
T32 |
19670 |
|
T35 |
160 |
|
T20 |
18 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341083 |
1 |
|
|
T32 |
25780 |
|
T35 |
121 |
|
T20 |
103 |
auto[1] |
1378817 |
1 |
|
|
T32 |
15842 |
|
T35 |
149 |
|
T20 |
6 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1287953 |
1 |
|
|
T32 |
13947 |
|
T35 |
47 |
|
T20 |
91 |
auto[0] |
auto[1] |
694166 |
1 |
|
|
T32 |
8005 |
|
T35 |
63 |
|
T23 |
5 |
auto[1] |
auto[0] |
1053130 |
1 |
|
|
T32 |
11833 |
|
T35 |
74 |
|
T20 |
12 |
auto[1] |
auto[1] |
684651 |
1 |
|
|
T32 |
7837 |
|
T35 |
86 |
|
T20 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1981618 |
1 |
|
|
T32 |
21709 |
|
T35 |
170 |
|
T20 |
99 |
auto[1] |
1738282 |
1 |
|
|
T32 |
19913 |
|
T35 |
100 |
|
T20 |
10 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342063 |
1 |
|
|
T32 |
25915 |
|
T35 |
135 |
|
T20 |
103 |
auto[1] |
1377837 |
1 |
|
|
T32 |
15707 |
|
T35 |
135 |
|
T20 |
6 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1288698 |
1 |
|
|
T32 |
13766 |
|
T35 |
79 |
|
T20 |
95 |
auto[0] |
auto[1] |
692920 |
1 |
|
|
T32 |
7943 |
|
T35 |
91 |
|
T20 |
4 |
auto[1] |
auto[0] |
1053365 |
1 |
|
|
T32 |
12149 |
|
T35 |
56 |
|
T20 |
8 |
auto[1] |
auto[1] |
684917 |
1 |
|
|
T32 |
7764 |
|
T35 |
44 |
|
T20 |
2 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1987791 |
1 |
|
|
T32 |
22000 |
|
T35 |
112 |
|
T20 |
81 |
auto[1] |
1732109 |
1 |
|
|
T32 |
19622 |
|
T35 |
158 |
|
T20 |
28 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342451 |
1 |
|
|
T32 |
26064 |
|
T35 |
114 |
|
T20 |
99 |
auto[1] |
1377449 |
1 |
|
|
T32 |
15558 |
|
T35 |
156 |
|
T20 |
10 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1293713 |
1 |
|
|
T32 |
14152 |
|
T35 |
52 |
|
T20 |
77 |
auto[0] |
auto[1] |
694078 |
1 |
|
|
T32 |
7848 |
|
T35 |
60 |
|
T20 |
4 |
auto[1] |
auto[0] |
1048738 |
1 |
|
|
T32 |
11912 |
|
T35 |
62 |
|
T20 |
22 |
auto[1] |
auto[1] |
683371 |
1 |
|
|
T32 |
7710 |
|
T35 |
96 |
|
T20 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1987916 |
1 |
|
|
T32 |
21711 |
|
T35 |
138 |
|
T20 |
81 |
auto[1] |
1731984 |
1 |
|
|
T32 |
19911 |
|
T35 |
132 |
|
T20 |
28 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341176 |
1 |
|
|
T32 |
26143 |
|
T35 |
145 |
|
T20 |
100 |
auto[1] |
1378724 |
1 |
|
|
T32 |
15479 |
|
T35 |
125 |
|
T20 |
9 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1291727 |
1 |
|
|
T32 |
13827 |
|
T35 |
75 |
|
T20 |
78 |
auto[0] |
auto[1] |
696189 |
1 |
|
|
T32 |
7884 |
|
T35 |
63 |
|
T20 |
3 |
auto[1] |
auto[0] |
1049449 |
1 |
|
|
T32 |
12316 |
|
T35 |
70 |
|
T20 |
22 |
auto[1] |
auto[1] |
682535 |
1 |
|
|
T32 |
7595 |
|
T35 |
62 |
|
T20 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1986441 |
1 |
|
|
T32 |
21314 |
|
T35 |
118 |
|
T20 |
75 |
auto[1] |
1733459 |
1 |
|
|
T32 |
20308 |
|
T35 |
152 |
|
T20 |
34 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2344486 |
1 |
|
|
T32 |
25913 |
|
T35 |
148 |
|
T20 |
92 |
auto[1] |
1375414 |
1 |
|
|
T32 |
15709 |
|
T35 |
122 |
|
T20 |
17 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1292306 |
1 |
|
|
T32 |
13490 |
|
T35 |
68 |
|
T20 |
68 |
auto[0] |
auto[1] |
694135 |
1 |
|
|
T32 |
7824 |
|
T35 |
50 |
|
T20 |
7 |
auto[1] |
auto[0] |
1052180 |
1 |
|
|
T32 |
12423 |
|
T35 |
80 |
|
T20 |
24 |
auto[1] |
auto[1] |
681279 |
1 |
|
|
T32 |
7885 |
|
T35 |
72 |
|
T20 |
10 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1979638 |
1 |
|
|
T32 |
21725 |
|
T35 |
136 |
|
T20 |
65 |
auto[1] |
1740262 |
1 |
|
|
T32 |
19897 |
|
T35 |
134 |
|
T20 |
44 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341489 |
1 |
|
|
T32 |
26243 |
|
T35 |
127 |
|
T20 |
97 |
auto[1] |
1378411 |
1 |
|
|
T32 |
15379 |
|
T35 |
143 |
|
T20 |
12 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1286494 |
1 |
|
|
T32 |
14048 |
|
T35 |
60 |
|
T20 |
63 |
auto[0] |
auto[1] |
693144 |
1 |
|
|
T32 |
7677 |
|
T35 |
76 |
|
T20 |
2 |
auto[1] |
auto[0] |
1054995 |
1 |
|
|
T32 |
12195 |
|
T35 |
67 |
|
T20 |
34 |
auto[1] |
auto[1] |
685267 |
1 |
|
|
T32 |
7702 |
|
T35 |
67 |
|
T20 |
10 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1984235 |
1 |
|
|
T32 |
22137 |
|
T35 |
158 |
|
T20 |
65 |
auto[1] |
1735665 |
1 |
|
|
T32 |
19485 |
|
T35 |
112 |
|
T20 |
44 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341349 |
1 |
|
|
T32 |
25924 |
|
T35 |
146 |
|
T20 |
96 |
auto[1] |
1378551 |
1 |
|
|
T32 |
15698 |
|
T35 |
124 |
|
T20 |
13 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1290368 |
1 |
|
|
T32 |
14036 |
|
T35 |
87 |
|
T20 |
63 |
auto[0] |
auto[1] |
693867 |
1 |
|
|
T32 |
8101 |
|
T35 |
71 |
|
T20 |
2 |
auto[1] |
auto[0] |
1050981 |
1 |
|
|
T32 |
11888 |
|
T35 |
59 |
|
T20 |
33 |
auto[1] |
auto[1] |
684684 |
1 |
|
|
T32 |
7597 |
|
T35 |
53 |
|
T20 |
11 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1985411 |
1 |
|
|
T32 |
21596 |
|
T35 |
126 |
|
T20 |
87 |
auto[1] |
1734489 |
1 |
|
|
T32 |
20026 |
|
T35 |
144 |
|
T20 |
22 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2341336 |
1 |
|
|
T32 |
26102 |
|
T35 |
151 |
|
T20 |
97 |
auto[1] |
1378564 |
1 |
|
|
T32 |
15520 |
|
T35 |
119 |
|
T20 |
12 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1290022 |
1 |
|
|
T32 |
14022 |
|
T35 |
70 |
|
T20 |
82 |
auto[0] |
auto[1] |
695389 |
1 |
|
|
T32 |
7574 |
|
T35 |
56 |
|
T20 |
5 |
auto[1] |
auto[0] |
1051314 |
1 |
|
|
T32 |
12080 |
|
T35 |
81 |
|
T20 |
15 |
auto[1] |
auto[1] |
683175 |
1 |
|
|
T32 |
7946 |
|
T35 |
63 |
|
T20 |
7 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983457 |
1 |
|
|
T32 |
21854 |
|
T35 |
114 |
|
T20 |
91 |
auto[1] |
1736443 |
1 |
|
|
T32 |
19768 |
|
T35 |
156 |
|
T20 |
18 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342047 |
1 |
|
|
T32 |
25939 |
|
T35 |
119 |
|
T20 |
101 |
auto[1] |
1377853 |
1 |
|
|
T32 |
15683 |
|
T35 |
151 |
|
T20 |
8 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1290484 |
1 |
|
|
T32 |
14037 |
|
T35 |
55 |
|
T20 |
84 |
auto[0] |
auto[1] |
692973 |
1 |
|
|
T32 |
7817 |
|
T35 |
59 |
|
T20 |
7 |
auto[1] |
auto[0] |
1051563 |
1 |
|
|
T32 |
11902 |
|
T35 |
64 |
|
T20 |
17 |
auto[1] |
auto[1] |
684880 |
1 |
|
|
T32 |
7866 |
|
T35 |
92 |
|
T20 |
1 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1984171 |
1 |
|
|
T32 |
22128 |
|
T35 |
128 |
|
T20 |
87 |
auto[1] |
1735729 |
1 |
|
|
T32 |
19494 |
|
T35 |
142 |
|
T20 |
22 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2340662 |
1 |
|
|
T32 |
25921 |
|
T35 |
148 |
|
T20 |
99 |
auto[1] |
1379238 |
1 |
|
|
T32 |
15701 |
|
T35 |
122 |
|
T20 |
10 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1288116 |
1 |
|
|
T32 |
14162 |
|
T35 |
76 |
|
T20 |
85 |
auto[0] |
auto[1] |
696055 |
1 |
|
|
T32 |
7966 |
|
T35 |
52 |
|
T20 |
2 |
auto[1] |
auto[0] |
1052546 |
1 |
|
|
T32 |
11759 |
|
T35 |
72 |
|
T20 |
14 |
auto[1] |
auto[1] |
683183 |
1 |
|
|
T32 |
7735 |
|
T35 |
70 |
|
T20 |
8 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983195 |
1 |
|
|
T32 |
21263 |
|
T35 |
134 |
|
T20 |
78 |
auto[1] |
1736705 |
1 |
|
|
T32 |
20359 |
|
T35 |
136 |
|
T20 |
31 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2335701 |
1 |
|
|
T32 |
26278 |
|
T35 |
152 |
|
T20 |
102 |
auto[1] |
1384199 |
1 |
|
|
T32 |
15344 |
|
T35 |
118 |
|
T20 |
7 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1286257 |
1 |
|
|
T32 |
13733 |
|
T35 |
80 |
|
T20 |
77 |
auto[0] |
auto[1] |
696938 |
1 |
|
|
T32 |
7530 |
|
T35 |
54 |
|
T20 |
1 |
auto[1] |
auto[0] |
1049444 |
1 |
|
|
T32 |
12545 |
|
T35 |
72 |
|
T20 |
25 |
auto[1] |
auto[1] |
687261 |
1 |
|
|
T32 |
7814 |
|
T35 |
64 |
|
T20 |
6 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1983636 |
1 |
|
|
T32 |
21803 |
|
T35 |
148 |
|
T20 |
64 |
auto[1] |
1736264 |
1 |
|
|
T32 |
19819 |
|
T35 |
122 |
|
T20 |
45 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342487 |
1 |
|
|
T32 |
25870 |
|
T35 |
126 |
|
T20 |
83 |
auto[1] |
1377413 |
1 |
|
|
T32 |
15752 |
|
T35 |
144 |
|
T20 |
26 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1289093 |
1 |
|
|
T32 |
13899 |
|
T35 |
69 |
|
T20 |
57 |
auto[0] |
auto[1] |
694543 |
1 |
|
|
T32 |
7904 |
|
T35 |
79 |
|
T20 |
7 |
auto[1] |
auto[0] |
1053394 |
1 |
|
|
T32 |
11971 |
|
T35 |
57 |
|
T20 |
26 |
auto[1] |
auto[1] |
682870 |
1 |
|
|
T32 |
7848 |
|
T35 |
65 |
|
T20 |
19 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1984129 |
1 |
|
|
T32 |
22279 |
|
T35 |
130 |
|
T20 |
70 |
auto[1] |
1735771 |
1 |
|
|
T32 |
19343 |
|
T35 |
140 |
|
T20 |
39 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2342579 |
1 |
|
|
T32 |
26439 |
|
T35 |
136 |
|
T20 |
98 |
auto[1] |
1377321 |
1 |
|
|
T32 |
15183 |
|
T35 |
134 |
|
T20 |
11 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1291402 |
1 |
|
|
T32 |
14380 |
|
T35 |
62 |
|
T20 |
67 |
auto[0] |
auto[1] |
692727 |
1 |
|
|
T32 |
7899 |
|
T35 |
68 |
|
T20 |
3 |
auto[1] |
auto[0] |
1051177 |
1 |
|
|
T32 |
12059 |
|
T35 |
74 |
|
T20 |
31 |
auto[1] |
auto[1] |
684594 |
1 |
|
|
T32 |
7284 |
|
T35 |
66 |
|
T20 |
8 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1985337 |
1 |
|
|
T32 |
22067 |
|
T35 |
148 |
|
T20 |
73 |
auto[1] |
1734563 |
1 |
|
|
T32 |
19555 |
|
T35 |
122 |
|
T20 |
36 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2335587 |
1 |
|
|
T32 |
25877 |
|
T35 |
131 |
|
T20 |
82 |
auto[1] |
1384313 |
1 |
|
|
T32 |
15745 |
|
T35 |
139 |
|
T20 |
27 |
Summary for Cross cp_var1_var2_cross
Samples crossed: cp_var1 cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cp_var1_var2_cross
Bins
cp_var1 | cp_var2 | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
1287737 |
1 |
|
|
T32 |
13863 |
|
T35 |
72 |
|
T20 |
64 |
auto[0] |
auto[1] |
697600 |
1 |
|
|
T32 |
8204 |
|
T35 |
76 |
|
T20 |
9 |
auto[1] |
auto[0] |
1047850 |
1 |
|
|
T32 |
12014 |
|
T35 |
59 |
|
T20 |
18 |
auto[1] |
auto[1] |
686713 |
1 |
|
|
T32 |
7541 |
|
T35 |
63 |
|
T20 |
18 |
Summary for Variable cp_var1
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var1
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1982179 |
1 |
|
|
T32 |
21604 |
|
T35 |
124 |
|
T20 |
91 |
auto[1] |
1737721 |
1 |
|
|
T32 |
20018 |
|
T35 |
146 |
|
T20 |
18 |
Summary for Variable cp_var2
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_var2
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
2336154 |
1 |
|
|
T32 |
26054 |
|
T35 |
134 |
|
T20 |
101 |
auto[1] |
1383746 |
1 |
|
|
T32 |
15568 |
|
T35 |
136 |
|
T20 |
8 |