Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7804720 |
1 |
|
|
T32 |
75475 |
|
T33 |
1124 |
|
T34 |
369 |
| auto[1] |
5767786 |
1 |
|
|
T32 |
60260 |
|
T34 |
218 |
|
T20 |
51 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11184948 |
1 |
|
|
T32 |
112352 |
|
T33 |
1124 |
|
T34 |
483 |
| auto[1] |
2387558 |
1 |
|
|
T32 |
23383 |
|
T34 |
104 |
|
T20 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7804685 |
1 |
|
|
T32 |
74103 |
|
T33 |
1124 |
|
T34 |
387 |
| auto[1] |
5767821 |
1 |
|
|
T32 |
61632 |
|
T34 |
200 |
|
T20 |
9 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1684238 |
1 |
|
|
T32 |
18975 |
|
T34 |
91 |
|
T20 |
1 |
| auto[1] |
auto[0] |
auto[1] |
1193119 |
1 |
|
|
T32 |
11719 |
|
T34 |
99 |
|
T26 |
4097 |
| auto[1] |
auto[1] |
auto[0] |
1696025 |
1 |
|
|
T32 |
19274 |
|
T34 |
5 |
|
T20 |
6 |
| auto[1] |
auto[1] |
auto[1] |
1194439 |
1 |
|
|
T32 |
11664 |
|
T34 |
5 |
|
T20 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |