cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54425 |
1 |
|
|
T100 |
1153 |
|
T101 |
1355 |
|
T102 |
530 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47933 |
1 |
|
|
T100 |
1819 |
|
T101 |
1276 |
|
T102 |
859 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57825 |
1 |
|
|
T100 |
984 |
|
T101 |
2415 |
|
T102 |
238 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48203 |
1 |
|
|
T100 |
1158 |
|
T101 |
895 |
|
T102 |
1325 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T100 |
48 |
|
T101 |
51 |
|
T102 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T100 |
51 |
|
T101 |
48 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T100 |
46 |
|
T101 |
50 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T100 |
51 |
|
T101 |
48 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T100 |
46 |
|
T101 |
50 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T100 |
51 |
|
T101 |
47 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T100 |
46 |
|
T101 |
50 |
|
T102 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T100 |
51 |
|
T101 |
47 |
|
T102 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T100 |
48 |
|
T101 |
46 |
|
T102 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T100 |
45 |
|
T101 |
49 |
|
T102 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T100 |
17 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T100 |
45 |
|
T101 |
45 |
|
T102 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T100 |
43 |
|
T101 |
49 |
|
T102 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T100 |
45 |
|
T101 |
45 |
|
T102 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T100 |
43 |
|
T101 |
48 |
|
T102 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T100 |
45 |
|
T101 |
44 |
|
T102 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T100 |
42 |
|
T101 |
47 |
|
T102 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T100 |
44 |
|
T101 |
43 |
|
T102 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T100 |
42 |
|
T101 |
47 |
|
T102 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T100 |
43 |
|
T101 |
40 |
|
T102 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
42 |
|
T101 |
46 |
|
T102 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T100 |
42 |
|
T101 |
40 |
|
T102 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T100 |
41 |
|
T101 |
44 |
|
T102 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T100 |
41 |
|
T101 |
37 |
|
T102 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T100 |
39 |
|
T101 |
43 |
|
T102 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T100 |
40 |
|
T101 |
36 |
|
T102 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T100 |
39 |
|
T101 |
42 |
|
T102 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T100 |
38 |
|
T101 |
36 |
|
T102 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
5 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T100 |
37 |
|
T101 |
39 |
|
T102 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
16 |
|
T101 |
30 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T100 |
37 |
|
T101 |
34 |
|
T102 |
22 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57160 |
1 |
|
|
T100 |
1517 |
|
T101 |
1728 |
|
T102 |
552 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48385 |
1 |
|
|
T100 |
599 |
|
T101 |
1700 |
|
T102 |
554 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56517 |
1 |
|
|
T100 |
2625 |
|
T101 |
1339 |
|
T102 |
265 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46431 |
1 |
|
|
T100 |
663 |
|
T101 |
1225 |
|
T102 |
1630 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T100 |
33 |
|
T101 |
51 |
|
T102 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T100 |
29 |
|
T101 |
53 |
|
T102 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T100 |
29 |
|
T101 |
53 |
|
T102 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T100 |
33 |
|
T101 |
49 |
|
T102 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T100 |
28 |
|
T101 |
52 |
|
T102 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T100 |
33 |
|
T101 |
47 |
|
T102 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T100 |
28 |
|
T101 |
50 |
|
T102 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T100 |
32 |
|
T101 |
46 |
|
T102 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T100 |
28 |
|
T101 |
50 |
|
T102 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T100 |
31 |
|
T101 |
45 |
|
T102 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T100 |
28 |
|
T101 |
48 |
|
T102 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T100 |
29 |
|
T101 |
44 |
|
T102 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T100 |
27 |
|
T101 |
47 |
|
T102 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T100 |
29 |
|
T101 |
43 |
|
T102 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T100 |
27 |
|
T101 |
46 |
|
T102 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T100 |
28 |
|
T101 |
42 |
|
T102 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T100 |
26 |
|
T101 |
46 |
|
T102 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T100 |
28 |
|
T101 |
40 |
|
T102 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T100 |
26 |
|
T101 |
45 |
|
T102 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T100 |
28 |
|
T101 |
40 |
|
T102 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T100 |
26 |
|
T101 |
44 |
|
T102 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T100 |
28 |
|
T101 |
40 |
|
T102 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T100 |
24 |
|
T101 |
42 |
|
T102 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T100 |
28 |
|
T101 |
40 |
|
T102 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T100 |
22 |
|
T101 |
41 |
|
T102 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T100 |
27 |
|
T101 |
39 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T100 |
21 |
|
T101 |
40 |
|
T102 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
22 |
|
T101 |
27 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T100 |
27 |
|
T101 |
38 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
27 |
|
T101 |
25 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T100 |
21 |
|
T101 |
39 |
|
T102 |
27 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52937 |
1 |
|
|
T100 |
1207 |
|
T101 |
1221 |
|
T102 |
1625 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46307 |
1 |
|
|
T100 |
883 |
|
T101 |
2143 |
|
T102 |
432 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62588 |
1 |
|
|
T100 |
1412 |
|
T101 |
1189 |
|
T102 |
624 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46714 |
1 |
|
|
T100 |
1663 |
|
T101 |
1461 |
|
T102 |
561 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T100 |
44 |
|
T101 |
65 |
|
T102 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T100 |
45 |
|
T101 |
61 |
|
T102 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T100 |
43 |
|
T101 |
64 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T100 |
44 |
|
T101 |
60 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T100 |
43 |
|
T101 |
64 |
|
T102 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T100 |
44 |
|
T101 |
59 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T100 |
43 |
|
T101 |
64 |
|
T102 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T100 |
44 |
|
T101 |
58 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T100 |
42 |
|
T101 |
63 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T100 |
44 |
|
T101 |
56 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T100 |
41 |
|
T101 |
62 |
|
T102 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
43 |
|
T101 |
56 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T100 |
41 |
|
T101 |
57 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T100 |
43 |
|
T101 |
55 |
|
T102 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T100 |
39 |
|
T101 |
57 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T100 |
43 |
|
T101 |
54 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T100 |
37 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
42 |
|
T101 |
51 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
41 |
|
T101 |
51 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T100 |
38 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T100 |
33 |
|
T101 |
51 |
|
T102 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T100 |
37 |
|
T101 |
46 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T100 |
31 |
|
T101 |
50 |
|
T102 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T100 |
36 |
|
T101 |
44 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T100 |
29 |
|
T101 |
49 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T100 |
36 |
|
T101 |
43 |
|
T102 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T100 |
27 |
|
T101 |
49 |
|
T102 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T100 |
36 |
|
T101 |
42 |
|
T102 |
16 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60300 |
1 |
|
|
T100 |
1415 |
|
T101 |
1312 |
|
T102 |
1815 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44506 |
1 |
|
|
T100 |
1124 |
|
T101 |
1138 |
|
T102 |
466 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57319 |
1 |
|
|
T100 |
2202 |
|
T101 |
1122 |
|
T102 |
648 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46999 |
1 |
|
|
T100 |
580 |
|
T101 |
2196 |
|
T102 |
342 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T100 |
38 |
|
T101 |
69 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T100 |
35 |
|
T101 |
69 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T100 |
38 |
|
T101 |
66 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T100 |
33 |
|
T101 |
68 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T100 |
38 |
|
T101 |
63 |
|
T102 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T100 |
32 |
|
T101 |
66 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T100 |
38 |
|
T101 |
62 |
|
T102 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T100 |
32 |
|
T101 |
66 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T100 |
38 |
|
T101 |
62 |
|
T102 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T100 |
32 |
|
T101 |
65 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T100 |
38 |
|
T101 |
60 |
|
T102 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T100 |
32 |
|
T101 |
63 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
32 |
|
T101 |
63 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T100 |
35 |
|
T101 |
58 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
30 |
|
T101 |
61 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T100 |
32 |
|
T101 |
57 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T100 |
29 |
|
T101 |
60 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T100 |
32 |
|
T101 |
56 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T100 |
28 |
|
T101 |
59 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T100 |
32 |
|
T101 |
56 |
|
T102 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T100 |
28 |
|
T101 |
57 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T100 |
32 |
|
T101 |
56 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T100 |
28 |
|
T101 |
55 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T100 |
32 |
|
T101 |
52 |
|
T102 |
17 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T100 |
26 |
|
T101 |
55 |
|
T102 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T100 |
31 |
|
T101 |
46 |
|
T102 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T100 |
23 |
|
T101 |
53 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T100 |
21 |
|
T101 |
19 |
|
T102 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T100 |
30 |
|
T101 |
44 |
|
T102 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T100 |
23 |
|
T101 |
52 |
|
T102 |
12 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53129 |
1 |
|
|
T100 |
1624 |
|
T101 |
983 |
|
T102 |
1023 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46703 |
1 |
|
|
T100 |
1069 |
|
T101 |
1514 |
|
T102 |
470 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52497 |
1 |
|
|
T100 |
959 |
|
T101 |
1941 |
|
T102 |
510 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
56214 |
1 |
|
|
T100 |
1721 |
|
T101 |
1336 |
|
T102 |
1283 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T100 |
45 |
|
T101 |
69 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T100 |
48 |
|
T101 |
64 |
|
T102 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T100 |
44 |
|
T101 |
69 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T100 |
48 |
|
T101 |
63 |
|
T102 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T100 |
41 |
|
T101 |
67 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T100 |
47 |
|
T101 |
63 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T100 |
41 |
|
T101 |
65 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T100 |
46 |
|
T101 |
62 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T100 |
39 |
|
T101 |
64 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T100 |
46 |
|
T101 |
61 |
|
T102 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T100 |
39 |
|
T101 |
63 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
13 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
45 |
|
T101 |
59 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T100 |
39 |
|
T101 |
61 |
|
T102 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T100 |
45 |
|
T101 |
58 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T100 |
36 |
|
T101 |
59 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T100 |
39 |
|
T101 |
53 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T100 |
36 |
|
T101 |
57 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T100 |
37 |
|
T101 |
51 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T100 |
36 |
|
T101 |
53 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T100 |
37 |
|
T101 |
51 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T100 |
35 |
|
T101 |
53 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T100 |
37 |
|
T101 |
51 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T100 |
35 |
|
T101 |
52 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T100 |
35 |
|
T101 |
49 |
|
T102 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T100 |
35 |
|
T101 |
51 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T100 |
32 |
|
T101 |
49 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T100 |
34 |
|
T101 |
48 |
|
T102 |
17 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58757 |
1 |
|
|
T100 |
2361 |
|
T101 |
2548 |
|
T102 |
1427 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50596 |
1 |
|
|
T100 |
894 |
|
T101 |
1002 |
|
T102 |
508 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57603 |
1 |
|
|
T100 |
1023 |
|
T101 |
1334 |
|
T102 |
441 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41696 |
1 |
|
|
T100 |
960 |
|
T101 |
1076 |
|
T102 |
658 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T100 |
41 |
|
T101 |
57 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T100 |
42 |
|
T101 |
54 |
|
T102 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T100 |
40 |
|
T101 |
57 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T100 |
41 |
|
T101 |
53 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T100 |
38 |
|
T101 |
56 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T100 |
41 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T100 |
38 |
|
T101 |
56 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T100 |
39 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T100 |
37 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T100 |
37 |
|
T101 |
48 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T100 |
37 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T100 |
37 |
|
T101 |
45 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T100 |
36 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T100 |
36 |
|
T101 |
45 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T100 |
35 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T100 |
35 |
|
T101 |
44 |
|
T102 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T100 |
30 |
|
T101 |
49 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T100 |
34 |
|
T101 |
43 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T100 |
29 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T100 |
34 |
|
T101 |
42 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T100 |
28 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T100 |
33 |
|
T101 |
41 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T100 |
28 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
22 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T100 |
33 |
|
T101 |
39 |
|
T102 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T100 |
28 |
|
T101 |
42 |
|
T102 |
22 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61103 |
1 |
|
|
T100 |
1205 |
|
T101 |
1999 |
|
T102 |
817 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43537 |
1 |
|
|
T100 |
800 |
|
T101 |
974 |
|
T102 |
1328 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62610 |
1 |
|
|
T100 |
2274 |
|
T101 |
2578 |
|
T102 |
499 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42780 |
1 |
|
|
T100 |
882 |
|
T101 |
882 |
|
T102 |
453 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T100 |
43 |
|
T101 |
38 |
|
T102 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T100 |
43 |
|
T101 |
39 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T100 |
41 |
|
T101 |
37 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T100 |
43 |
|
T101 |
38 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T100 |
41 |
|
T101 |
36 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T100 |
42 |
|
T101 |
36 |
|
T102 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T100 |
39 |
|
T101 |
36 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T100 |
41 |
|
T101 |
36 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T100 |
37 |
|
T101 |
36 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T100 |
41 |
|
T101 |
36 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T100 |
37 |
|
T101 |
36 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T100 |
39 |
|
T101 |
33 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T100 |
37 |
|
T101 |
35 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T100 |
38 |
|
T101 |
32 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T100 |
36 |
|
T101 |
35 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T100 |
38 |
|
T101 |
31 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T100 |
35 |
|
T101 |
35 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T100 |
38 |
|
T101 |
30 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T100 |
35 |
|
T101 |
34 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
36 |
|
T101 |
29 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T100 |
35 |
|
T101 |
34 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T100 |
36 |
|
T101 |
29 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T100 |
35 |
|
T101 |
33 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T100 |
33 |
|
T101 |
29 |
|
T102 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T100 |
32 |
|
T101 |
32 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T100 |
33 |
|
T101 |
27 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T100 |
32 |
|
T101 |
32 |
|
T102 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T100 |
32 |
|
T101 |
27 |
|
T102 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
23 |
|
T101 |
23 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T100 |
31 |
|
T101 |
31 |
|
T102 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
24 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T100 |
31 |
|
T101 |
27 |
|
T102 |
21 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63597 |
1 |
|
|
T100 |
952 |
|
T101 |
1388 |
|
T102 |
655 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40102 |
1 |
|
|
T100 |
1221 |
|
T101 |
1548 |
|
T102 |
1254 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60470 |
1 |
|
|
T100 |
1058 |
|
T101 |
1210 |
|
T102 |
710 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44489 |
1 |
|
|
T100 |
1832 |
|
T101 |
1608 |
|
T102 |
470 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T100 |
55 |
|
T101 |
75 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T100 |
57 |
|
T101 |
72 |
|
T102 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T100 |
52 |
|
T101 |
71 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T100 |
54 |
|
T101 |
71 |
|
T102 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T100 |
52 |
|
T101 |
70 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T100 |
53 |
|
T101 |
71 |
|
T102 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T100 |
51 |
|
T101 |
68 |
|
T102 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T100 |
53 |
|
T101 |
69 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T100 |
50 |
|
T101 |
67 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T100 |
52 |
|
T101 |
67 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T100 |
50 |
|
T101 |
67 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T100 |
49 |
|
T101 |
67 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T100 |
48 |
|
T101 |
67 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T100 |
48 |
|
T101 |
64 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T100 |
46 |
|
T101 |
64 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T100 |
47 |
|
T101 |
64 |
|
T102 |
19 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T100 |
44 |
|
T101 |
60 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T100 |
45 |
|
T101 |
63 |
|
T102 |
18 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T100 |
43 |
|
T101 |
59 |
|
T102 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T100 |
45 |
|
T101 |
61 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T100 |
43 |
|
T101 |
58 |
|
T102 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T100 |
44 |
|
T101 |
59 |
|
T102 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T100 |
43 |
|
T101 |
58 |
|
T102 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T100 |
44 |
|
T101 |
57 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T100 |
42 |
|
T101 |
56 |
|
T102 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T100 |
42 |
|
T101 |
57 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T100 |
42 |
|
T101 |
56 |
|
T102 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T100 |
41 |
|
T101 |
54 |
|
T102 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T100 |
41 |
|
T101 |
56 |
|
T102 |
16 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55899 |
1 |
|
|
T100 |
919 |
|
T101 |
1256 |
|
T102 |
942 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49658 |
1 |
|
|
T100 |
1392 |
|
T101 |
1463 |
|
T102 |
480 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55687 |
1 |
|
|
T100 |
914 |
|
T101 |
1368 |
|
T102 |
772 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47524 |
1 |
|
|
T100 |
1843 |
|
T101 |
1851 |
|
T102 |
1067 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T100 |
56 |
|
T101 |
69 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T100 |
59 |
|
T101 |
65 |
|
T102 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T100 |
53 |
|
T101 |
67 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T100 |
59 |
|
T101 |
64 |
|
T102 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T100 |
53 |
|
T101 |
63 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T100 |
57 |
|
T101 |
64 |
|
T102 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T100 |
52 |
|
T101 |
63 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T100 |
56 |
|
T101 |
60 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T100 |
52 |
|
T101 |
62 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T100 |
55 |
|
T101 |
59 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T100 |
50 |
|
T101 |
58 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
14 |
|
T101 |
20 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
55 |
|
T101 |
59 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T100 |
49 |
|
T101 |
57 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T100 |
52 |
|
T101 |
57 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T100 |
47 |
|
T101 |
55 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T100 |
49 |
|
T101 |
55 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T100 |
46 |
|
T101 |
52 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T100 |
48 |
|
T101 |
54 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T100 |
45 |
|
T101 |
51 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
46 |
|
T101 |
53 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T100 |
45 |
|
T101 |
51 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T100 |
44 |
|
T101 |
51 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T100 |
43 |
|
T101 |
50 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
44 |
|
T101 |
49 |
|
T102 |
13 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T100 |
42 |
|
T101 |
49 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T100 |
42 |
|
T101 |
46 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T100 |
40 |
|
T101 |
49 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T100 |
41 |
|
T101 |
45 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T100 |
39 |
|
T101 |
46 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
14 |
|
T101 |
19 |
|
T102 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T100 |
39 |
|
T101 |
45 |
|
T102 |
12 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56967 |
1 |
|
|
T100 |
1471 |
|
T101 |
1729 |
|
T102 |
608 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45687 |
1 |
|
|
T100 |
1613 |
|
T101 |
824 |
|
T102 |
1172 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56149 |
1 |
|
|
T100 |
1496 |
|
T101 |
2254 |
|
T102 |
695 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50025 |
1 |
|
|
T100 |
729 |
|
T101 |
1099 |
|
T102 |
650 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T100 |
39 |
|
T101 |
50 |
|
T102 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T100 |
37 |
|
T101 |
52 |
|
T102 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T100 |
39 |
|
T101 |
47 |
|
T102 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T100 |
39 |
|
T101 |
46 |
|
T102 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T100 |
33 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T100 |
38 |
|
T101 |
45 |
|
T102 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T100 |
32 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T100 |
36 |
|
T101 |
42 |
|
T102 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T100 |
32 |
|
T101 |
51 |
|
T102 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T100 |
35 |
|
T101 |
40 |
|
T102 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T100 |
31 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T100 |
35 |
|
T101 |
40 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T100 |
29 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T100 |
35 |
|
T101 |
38 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T100 |
29 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T100 |
35 |
|
T101 |
38 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T100 |
28 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
35 |
|
T101 |
38 |
|
T102 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T100 |
27 |
|
T101 |
49 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T100 |
35 |
|
T101 |
36 |
|
T102 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T100 |
27 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T100 |
35 |
|
T101 |
36 |
|
T102 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T100 |
27 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T100 |
34 |
|
T101 |
35 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T100 |
26 |
|
T101 |
46 |
|
T102 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T100 |
31 |
|
T101 |
33 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T100 |
26 |
|
T101 |
45 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
22 |
|
T101 |
30 |
|
T102 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T100 |
30 |
|
T101 |
31 |
|
T102 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
29 |
|
T102 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T100 |
26 |
|
T101 |
43 |
|
T102 |
20 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56170 |
1 |
|
|
T100 |
1235 |
|
T101 |
1645 |
|
T102 |
1364 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47076 |
1 |
|
|
T100 |
1751 |
|
T101 |
1059 |
|
T102 |
480 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61268 |
1 |
|
|
T100 |
1504 |
|
T101 |
2217 |
|
T102 |
825 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45404 |
1 |
|
|
T100 |
749 |
|
T101 |
943 |
|
T102 |
602 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T100 |
45 |
|
T101 |
51 |
|
T102 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T100 |
40 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T100 |
38 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T100 |
36 |
|
T101 |
51 |
|
T102 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T100 |
36 |
|
T101 |
51 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T100 |
34 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T100 |
44 |
|
T101 |
49 |
|
T102 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
23 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T100 |
33 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T100 |
44 |
|
T101 |
47 |
|
T102 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T100 |
34 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T100 |
34 |
|
T101 |
46 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T100 |
42 |
|
T101 |
44 |
|
T102 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T100 |
33 |
|
T101 |
45 |
|
T102 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T100 |
42 |
|
T101 |
42 |
|
T102 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T100 |
33 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T100 |
42 |
|
T101 |
40 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T100 |
29 |
|
T101 |
43 |
|
T102 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T100 |
41 |
|
T101 |
39 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T100 |
28 |
|
T101 |
42 |
|
T102 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T100 |
40 |
|
T101 |
38 |
|
T102 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T100 |
27 |
|
T101 |
41 |
|
T102 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T100 |
40 |
|
T101 |
37 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T100 |
27 |
|
T101 |
38 |
|
T102 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
18 |
|
T101 |
31 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T100 |
38 |
|
T101 |
36 |
|
T102 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
29 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T100 |
27 |
|
T101 |
36 |
|
T102 |
22 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56238 |
1 |
|
|
T100 |
1104 |
|
T101 |
1970 |
|
T102 |
600 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49887 |
1 |
|
|
T100 |
1875 |
|
T101 |
1514 |
|
T102 |
1173 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57578 |
1 |
|
|
T100 |
1566 |
|
T101 |
1405 |
|
T102 |
811 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45816 |
1 |
|
|
T100 |
716 |
|
T101 |
1149 |
|
T102 |
589 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T100 |
46 |
|
T101 |
57 |
|
T102 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T100 |
40 |
|
T101 |
57 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T100 |
45 |
|
T101 |
57 |
|
T102 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T100 |
37 |
|
T101 |
57 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T100 |
44 |
|
T101 |
57 |
|
T102 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T100 |
37 |
|
T101 |
56 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T100 |
43 |
|
T101 |
56 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T100 |
36 |
|
T101 |
56 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T100 |
43 |
|
T101 |
56 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T100 |
34 |
|
T101 |
55 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
24 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T100 |
33 |
|
T101 |
55 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T100 |
34 |
|
T101 |
52 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T100 |
40 |
|
T101 |
53 |
|
T102 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T100 |
32 |
|
T101 |
49 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T100 |
40 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T100 |
32 |
|
T101 |
49 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T100 |
39 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T100 |
31 |
|
T101 |
49 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T100 |
39 |
|
T101 |
50 |
|
T102 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T100 |
30 |
|
T101 |
49 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T100 |
36 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T100 |
28 |
|
T101 |
46 |
|
T102 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T100 |
36 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T100 |
28 |
|
T101 |
45 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T100 |
36 |
|
T101 |
46 |
|
T102 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T100 |
28 |
|
T101 |
43 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T100 |
36 |
|
T101 |
46 |
|
T102 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T100 |
27 |
|
T101 |
41 |
|
T102 |
20 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56182 |
1 |
|
|
T100 |
1218 |
|
T101 |
1461 |
|
T102 |
1677 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49218 |
1 |
|
|
T100 |
1596 |
|
T101 |
1392 |
|
T102 |
270 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57376 |
1 |
|
|
T100 |
1167 |
|
T101 |
1650 |
|
T102 |
774 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44595 |
1 |
|
|
T100 |
1095 |
|
T101 |
1434 |
|
T102 |
376 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T100 |
54 |
|
T101 |
61 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T100 |
56 |
|
T101 |
59 |
|
T102 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T100 |
53 |
|
T101 |
61 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T100 |
55 |
|
T101 |
57 |
|
T102 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T100 |
52 |
|
T101 |
60 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T100 |
54 |
|
T101 |
56 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T100 |
47 |
|
T101 |
59 |
|
T102 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T100 |
54 |
|
T101 |
55 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T100 |
45 |
|
T101 |
58 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T100 |
54 |
|
T101 |
53 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T100 |
43 |
|
T101 |
58 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T100 |
16 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T100 |
54 |
|
T101 |
52 |
|
T102 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T100 |
43 |
|
T101 |
57 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T100 |
54 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T100 |
40 |
|
T101 |
57 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T100 |
53 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T100 |
39 |
|
T101 |
56 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T100 |
53 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T100 |
53 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T100 |
37 |
|
T101 |
54 |
|
T102 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T100 |
50 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T100 |
34 |
|
T101 |
52 |
|
T102 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T100 |
50 |
|
T101 |
48 |
|
T102 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T100 |
32 |
|
T101 |
52 |
|
T102 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T100 |
49 |
|
T101 |
48 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T100 |
31 |
|
T101 |
50 |
|
T102 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T100 |
47 |
|
T101 |
47 |
|
T102 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
16 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T100 |
31 |
|
T101 |
47 |
|
T102 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
15 |
|
T101 |
21 |
|
T102 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T100 |
44 |
|
T101 |
44 |
|
T102 |
17 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56920 |
1 |
|
|
T100 |
2230 |
|
T101 |
1300 |
|
T102 |
368 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43156 |
1 |
|
|
T100 |
958 |
|
T101 |
1840 |
|
T102 |
518 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59125 |
1 |
|
|
T100 |
1322 |
|
T101 |
1835 |
|
T102 |
682 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48408 |
1 |
|
|
T100 |
930 |
|
T101 |
1095 |
|
T102 |
1421 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T100 |
40 |
|
T101 |
57 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T100 |
39 |
|
T101 |
53 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T100 |
39 |
|
T101 |
52 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T100 |
37 |
|
T101 |
55 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T100 |
38 |
|
T101 |
51 |
|
T102 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T100 |
36 |
|
T101 |
54 |
|
T102 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T100 |
38 |
|
T101 |
50 |
|
T102 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T100 |
34 |
|
T101 |
53 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T100 |
37 |
|
T101 |
47 |
|
T102 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T100 |
33 |
|
T101 |
51 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T100 |
36 |
|
T101 |
44 |
|
T102 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T100 |
33 |
|
T101 |
51 |
|
T102 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T100 |
36 |
|
T101 |
44 |
|
T102 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T100 |
31 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T100 |
34 |
|
T101 |
43 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T100 |
30 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T100 |
34 |
|
T101 |
42 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T100 |
30 |
|
T101 |
48 |
|
T102 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
34 |
|
T101 |
42 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T100 |
30 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T100 |
33 |
|
T101 |
42 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T100 |
30 |
|
T101 |
46 |
|
T102 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T100 |
32 |
|
T101 |
40 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T100 |
30 |
|
T101 |
44 |
|
T102 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T100 |
31 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
17 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T100 |
29 |
|
T101 |
41 |
|
T102 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
17 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T100 |
31 |
|
T101 |
38 |
|
T102 |
23 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59565 |
1 |
|
|
T100 |
2445 |
|
T101 |
1797 |
|
T102 |
1783 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51195 |
1 |
|
|
T100 |
731 |
|
T101 |
987 |
|
T102 |
501 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51709 |
1 |
|
|
T100 |
1154 |
|
T101 |
1754 |
|
T102 |
431 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45716 |
1 |
|
|
T100 |
960 |
|
T101 |
1557 |
|
T102 |
517 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T100 |
32 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T100 |
32 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T100 |
38 |
|
T101 |
52 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T100 |
31 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T100 |
37 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T100 |
31 |
|
T101 |
45 |
|
T102 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T100 |
37 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T100 |
29 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T100 |
35 |
|
T101 |
46 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T100 |
29 |
|
T101 |
42 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T100 |
35 |
|
T101 |
46 |
|
T102 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T100 |
29 |
|
T101 |
41 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T100 |
36 |
|
T101 |
46 |
|
T102 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T100 |
29 |
|
T101 |
40 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T100 |
36 |
|
T101 |
46 |
|
T102 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T100 |
29 |
|
T101 |
39 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T100 |
36 |
|
T101 |
45 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T100 |
29 |
|
T101 |
37 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
35 |
|
T101 |
44 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T100 |
27 |
|
T101 |
36 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T100 |
33 |
|
T101 |
43 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T100 |
27 |
|
T101 |
34 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
32 |
|
T101 |
42 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T100 |
26 |
|
T101 |
34 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T100 |
31 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T100 |
26 |
|
T101 |
32 |
|
T102 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T100 |
28 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T100 |
28 |
|
T101 |
26 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T100 |
26 |
|
T101 |
31 |
|
T102 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T100 |
26 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64870 |
1 |
|
|
T100 |
1607 |
|
T101 |
2230 |
|
T102 |
1500 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39838 |
1 |
|
|
T100 |
1018 |
|
T101 |
1248 |
|
T102 |
682 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59019 |
1 |
|
|
T100 |
1250 |
|
T101 |
1427 |
|
T102 |
623 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45814 |
1 |
|
|
T100 |
1430 |
|
T101 |
1143 |
|
T102 |
445 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T100 |
36 |
|
T101 |
55 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T100 |
40 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T100 |
36 |
|
T101 |
53 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T100 |
39 |
|
T101 |
53 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T100 |
36 |
|
T101 |
53 |
|
T102 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T100 |
35 |
|
T101 |
51 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T100 |
35 |
|
T101 |
53 |
|
T102 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T100 |
35 |
|
T101 |
46 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T100 |
34 |
|
T101 |
52 |
|
T102 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T100 |
35 |
|
T101 |
44 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T100 |
22 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T100 |
32 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T100 |
32 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T100 |
32 |
|
T101 |
46 |
|
T102 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T100 |
32 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T100 |
33 |
|
T101 |
44 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T100 |
29 |
|
T101 |
44 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T100 |
31 |
|
T101 |
44 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T100 |
29 |
|
T101 |
43 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T100 |
31 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T100 |
27 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T100 |
31 |
|
T101 |
43 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
27 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T100 |
30 |
|
T101 |
42 |
|
T102 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T100 |
26 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T100 |
30 |
|
T101 |
42 |
|
T102 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T100 |
21 |
|
T101 |
23 |
|
T102 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T100 |
24 |
|
T101 |
41 |
|
T102 |
17 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60326 |
1 |
|
|
T100 |
974 |
|
T101 |
2249 |
|
T102 |
562 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46294 |
1 |
|
|
T100 |
1715 |
|
T101 |
1469 |
|
T102 |
1317 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57699 |
1 |
|
|
T100 |
1561 |
|
T101 |
1094 |
|
T102 |
822 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44487 |
1 |
|
|
T100 |
853 |
|
T101 |
1027 |
|
T102 |
449 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T100 |
48 |
|
T101 |
64 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T100 |
44 |
|
T101 |
67 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T100 |
47 |
|
T101 |
63 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T100 |
43 |
|
T101 |
66 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T100 |
46 |
|
T101 |
60 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T100 |
42 |
|
T101 |
66 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T100 |
46 |
|
T101 |
60 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T100 |
41 |
|
T101 |
64 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T100 |
46 |
|
T101 |
58 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T100 |
40 |
|
T101 |
62 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T100 |
46 |
|
T101 |
58 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T100 |
38 |
|
T101 |
61 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T100 |
46 |
|
T101 |
57 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T100 |
37 |
|
T101 |
56 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T100 |
44 |
|
T101 |
55 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T100 |
36 |
|
T101 |
54 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T100 |
43 |
|
T101 |
55 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
34 |
|
T101 |
53 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T100 |
42 |
|
T101 |
53 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T100 |
40 |
|
T101 |
53 |
|
T102 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
31 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T100 |
39 |
|
T101 |
50 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T100 |
31 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T100 |
38 |
|
T101 |
50 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T100 |
31 |
|
T101 |
47 |
|
T102 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T100 |
37 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T100 |
30 |
|
T101 |
46 |
|
T102 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T100 |
35 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T100 |
29 |
|
T101 |
44 |
|
T102 |
17 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59151 |
1 |
|
|
T100 |
1390 |
|
T101 |
1978 |
|
T102 |
447 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50858 |
1 |
|
|
T100 |
1611 |
|
T101 |
1111 |
|
T102 |
545 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59402 |
1 |
|
|
T100 |
1426 |
|
T101 |
1085 |
|
T102 |
1721 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40203 |
1 |
|
|
T100 |
824 |
|
T101 |
1849 |
|
T102 |
502 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T100 |
44 |
|
T101 |
60 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T100 |
40 |
|
T101 |
62 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T100 |
44 |
|
T101 |
59 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T100 |
40 |
|
T101 |
60 |
|
T102 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T100 |
44 |
|
T101 |
57 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T100 |
44 |
|
T101 |
54 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T100 |
38 |
|
T101 |
58 |
|
T102 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T100 |
44 |
|
T101 |
53 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T100 |
37 |
|
T101 |
57 |
|
T102 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T100 |
44 |
|
T101 |
52 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T100 |
37 |
|
T101 |
55 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T100 |
43 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T100 |
36 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T100 |
42 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T100 |
33 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T100 |
41 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T100 |
32 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T100 |
40 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T100 |
32 |
|
T101 |
53 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T100 |
39 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T100 |
32 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T100 |
37 |
|
T101 |
45 |
|
T102 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T100 |
31 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T100 |
36 |
|
T101 |
40 |
|
T102 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
30 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T100 |
35 |
|
T101 |
37 |
|
T102 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T100 |
29 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T100 |
34 |
|
T101 |
34 |
|
T102 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T100 |
29 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58144 |
1 |
|
|
T100 |
1122 |
|
T101 |
1718 |
|
T102 |
1475 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46046 |
1 |
|
|
T100 |
893 |
|
T101 |
1805 |
|
T102 |
548 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55998 |
1 |
|
|
T100 |
2199 |
|
T101 |
1427 |
|
T102 |
704 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48211 |
1 |
|
|
T100 |
1006 |
|
T101 |
934 |
|
T102 |
637 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1714 |
1 |
|
|
T100 |
44 |
|
T101 |
59 |
|
T102 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T100 |
46 |
|
T101 |
53 |
|
T102 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T100 |
44 |
|
T101 |
58 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T100 |
46 |
|
T101 |
53 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T100 |
43 |
|
T101 |
58 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T100 |
43 |
|
T101 |
53 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T100 |
43 |
|
T101 |
57 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T100 |
42 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T100 |
41 |
|
T101 |
57 |
|
T102 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T100 |
42 |
|
T101 |
52 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T100 |
40 |
|
T101 |
55 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T100 |
20 |
|
T101 |
28 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T100 |
42 |
|
T101 |
50 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
20 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T100 |
40 |
|
T101 |
48 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T100 |
34 |
|
T101 |
54 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
20 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T100 |
39 |
|
T101 |
47 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T100 |
34 |
|
T101 |
54 |
|
T102 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
20 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T100 |
38 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T100 |
32 |
|
T101 |
54 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
20 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T100 |
38 |
|
T101 |
43 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T100 |
32 |
|
T101 |
53 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T100 |
38 |
|
T101 |
42 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T100 |
32 |
|
T101 |
50 |
|
T102 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
38 |
|
T101 |
41 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T100 |
30 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T100 |
38 |
|
T101 |
40 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T100 |
29 |
|
T101 |
47 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T100 |
36 |
|
T101 |
38 |
|
T102 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T100 |
28 |
|
T101 |
46 |
|
T102 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
27 |
|
T102 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T100 |
36 |
|
T101 |
35 |
|
T102 |
16 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62901 |
1 |
|
|
T100 |
927 |
|
T101 |
1446 |
|
T102 |
751 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41502 |
1 |
|
|
T100 |
1125 |
|
T101 |
1222 |
|
T102 |
1287 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62822 |
1 |
|
|
T100 |
1326 |
|
T101 |
2249 |
|
T102 |
543 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43520 |
1 |
|
|
T100 |
1682 |
|
T101 |
944 |
|
T102 |
485 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T100 |
54 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T100 |
54 |
|
T101 |
55 |
|
T102 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T100 |
53 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T100 |
52 |
|
T101 |
54 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T100 |
52 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T100 |
52 |
|
T101 |
51 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T100 |
52 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T100 |
48 |
|
T101 |
49 |
|
T102 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T100 |
50 |
|
T101 |
51 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T100 |
47 |
|
T101 |
49 |
|
T102 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T100 |
50 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T100 |
46 |
|
T101 |
48 |
|
T102 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T100 |
48 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T100 |
45 |
|
T101 |
48 |
|
T102 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T100 |
47 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
43 |
|
T101 |
47 |
|
T102 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T100 |
47 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T100 |
41 |
|
T101 |
44 |
|
T102 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T100 |
47 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T100 |
40 |
|
T101 |
41 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T100 |
46 |
|
T101 |
47 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
38 |
|
T101 |
41 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T100 |
37 |
|
T101 |
41 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T100 |
44 |
|
T101 |
45 |
|
T102 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T100 |
37 |
|
T101 |
41 |
|
T102 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T100 |
42 |
|
T101 |
43 |
|
T102 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T100 |
37 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T100 |
40 |
|
T101 |
41 |
|
T102 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T100 |
18 |
|
T101 |
28 |
|
T102 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T100 |
37 |
|
T101 |
37 |
|
T102 |
22 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56963 |
1 |
|
|
T100 |
1343 |
|
T101 |
1490 |
|
T102 |
465 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53593 |
1 |
|
|
T100 |
1804 |
|
T101 |
1101 |
|
T102 |
878 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51620 |
1 |
|
|
T100 |
733 |
|
T101 |
2351 |
|
T102 |
380 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46269 |
1 |
|
|
T100 |
1196 |
|
T101 |
1114 |
|
T102 |
1377 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T100 |
57 |
|
T101 |
48 |
|
T102 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T100 |
58 |
|
T101 |
52 |
|
T102 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T100 |
55 |
|
T101 |
48 |
|
T102 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T100 |
58 |
|
T101 |
52 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T100 |
52 |
|
T101 |
47 |
|
T102 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T100 |
57 |
|
T101 |
50 |
|
T102 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T100 |
50 |
|
T101 |
46 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T100 |
57 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T100 |
48 |
|
T101 |
45 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T100 |
56 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
45 |
|
T101 |
44 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T100 |
56 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T100 |
44 |
|
T101 |
43 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T100 |
57 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T100 |
43 |
|
T101 |
41 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T100 |
56 |
|
T101 |
49 |
|
T102 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T100 |
42 |
|
T101 |
39 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T100 |
56 |
|
T101 |
46 |
|
T102 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T100 |
40 |
|
T101 |
38 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T100 |
56 |
|
T101 |
42 |
|
T102 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T100 |
38 |
|
T101 |
36 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T100 |
51 |
|
T101 |
41 |
|
T102 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T100 |
37 |
|
T101 |
36 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T100 |
51 |
|
T101 |
40 |
|
T102 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T100 |
37 |
|
T101 |
36 |
|
T102 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T100 |
50 |
|
T101 |
40 |
|
T102 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T100 |
35 |
|
T101 |
36 |
|
T102 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T100 |
50 |
|
T101 |
40 |
|
T102 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T100 |
15 |
|
T101 |
27 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T100 |
34 |
|
T101 |
35 |
|
T102 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T100 |
13 |
|
T101 |
23 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T100 |
48 |
|
T101 |
40 |
|
T102 |
18 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56274 |
1 |
|
|
T100 |
1174 |
|
T101 |
2071 |
|
T102 |
432 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43799 |
1 |
|
|
T100 |
976 |
|
T101 |
1280 |
|
T102 |
1686 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61920 |
1 |
|
|
T100 |
1393 |
|
T101 |
1610 |
|
T102 |
622 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48214 |
1 |
|
|
T100 |
1593 |
|
T101 |
1094 |
|
T102 |
445 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T100 |
48 |
|
T101 |
49 |
|
T102 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T100 |
48 |
|
T101 |
52 |
|
T102 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T100 |
48 |
|
T101 |
49 |
|
T102 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T100 |
45 |
|
T101 |
51 |
|
T102 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T100 |
48 |
|
T101 |
48 |
|
T102 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T100 |
43 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T100 |
48 |
|
T101 |
48 |
|
T102 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T100 |
43 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T100 |
47 |
|
T101 |
47 |
|
T102 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T100 |
42 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T100 |
47 |
|
T101 |
46 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T100 |
40 |
|
T101 |
47 |
|
T102 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T100 |
45 |
|
T101 |
46 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
38 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
37 |
|
T101 |
46 |
|
T102 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T100 |
44 |
|
T101 |
45 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T100 |
36 |
|
T101 |
46 |
|
T102 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T100 |
42 |
|
T101 |
43 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T100 |
35 |
|
T101 |
44 |
|
T102 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T100 |
41 |
|
T101 |
43 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T100 |
33 |
|
T101 |
43 |
|
T102 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T100 |
40 |
|
T101 |
41 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T100 |
32 |
|
T101 |
43 |
|
T102 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T100 |
40 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T100 |
31 |
|
T101 |
43 |
|
T102 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T100 |
40 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T100 |
30 |
|
T101 |
41 |
|
T102 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
20 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T100 |
40 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
21 |
|
T101 |
22 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T100 |
30 |
|
T101 |
41 |
|
T102 |
20 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57780 |
1 |
|
|
T100 |
1595 |
|
T101 |
1309 |
|
T102 |
857 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42517 |
1 |
|
|
T100 |
845 |
|
T101 |
1151 |
|
T102 |
466 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60212 |
1 |
|
|
T100 |
2266 |
|
T101 |
1413 |
|
T102 |
1414 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48724 |
1 |
|
|
T100 |
648 |
|
T101 |
1874 |
|
T102 |
395 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T100 |
41 |
|
T101 |
63 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T100 |
41 |
|
T101 |
61 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T100 |
40 |
|
T101 |
63 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T100 |
40 |
|
T101 |
60 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T100 |
40 |
|
T101 |
61 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T100 |
38 |
|
T101 |
58 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T100 |
35 |
|
T101 |
57 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T100 |
38 |
|
T101 |
57 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T100 |
35 |
|
T101 |
56 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T100 |
37 |
|
T101 |
56 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
20 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T100 |
34 |
|
T101 |
56 |
|
T102 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T100 |
37 |
|
T101 |
55 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T100 |
34 |
|
T101 |
56 |
|
T102 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T100 |
37 |
|
T101 |
54 |
|
T102 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T100 |
33 |
|
T101 |
56 |
|
T102 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T100 |
35 |
|
T101 |
52 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T100 |
32 |
|
T101 |
55 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T100 |
34 |
|
T101 |
51 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T100 |
32 |
|
T101 |
55 |
|
T102 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T100 |
31 |
|
T101 |
54 |
|
T102 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T100 |
31 |
|
T101 |
54 |
|
T102 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T100 |
33 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T100 |
30 |
|
T101 |
51 |
|
T102 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T100 |
33 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T100 |
30 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
23 |
|
T102 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T100 |
31 |
|
T101 |
47 |
|
T102 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T100 |
30 |
|
T101 |
47 |
|
T102 |
12 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59282 |
1 |
|
|
T100 |
1224 |
|
T101 |
1966 |
|
T102 |
563 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45164 |
1 |
|
|
T100 |
1784 |
|
T101 |
1102 |
|
T102 |
519 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61349 |
1 |
|
|
T100 |
1445 |
|
T101 |
1962 |
|
T102 |
590 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43743 |
1 |
|
|
T100 |
846 |
|
T101 |
878 |
|
T102 |
1496 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T100 |
45 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T100 |
43 |
|
T101 |
55 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T100 |
45 |
|
T101 |
53 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T100 |
43 |
|
T101 |
55 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T100 |
43 |
|
T101 |
53 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T100 |
42 |
|
T101 |
54 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T100 |
43 |
|
T101 |
52 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T100 |
41 |
|
T101 |
54 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
43 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T100 |
41 |
|
T101 |
52 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T100 |
43 |
|
T101 |
49 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
19 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T100 |
40 |
|
T101 |
52 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T100 |
41 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T100 |
40 |
|
T101 |
50 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T100 |
40 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T100 |
38 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T100 |
40 |
|
T101 |
47 |
|
T102 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
35 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T100 |
38 |
|
T101 |
47 |
|
T102 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T100 |
34 |
|
T101 |
46 |
|
T102 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T100 |
37 |
|
T101 |
46 |
|
T102 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T100 |
32 |
|
T101 |
43 |
|
T102 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T100 |
37 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T100 |
32 |
|
T101 |
42 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T100 |
35 |
|
T101 |
43 |
|
T102 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T100 |
31 |
|
T101 |
41 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T100 |
35 |
|
T101 |
42 |
|
T102 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T100 |
28 |
|
T101 |
40 |
|
T102 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T100 |
17 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T100 |
35 |
|
T101 |
41 |
|
T102 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T100 |
18 |
|
T101 |
26 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T100 |
26 |
|
T101 |
38 |
|
T102 |
20 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58008 |
1 |
|
|
T100 |
1364 |
|
T101 |
2054 |
|
T102 |
544 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46913 |
1 |
|
|
T100 |
1222 |
|
T101 |
1008 |
|
T102 |
409 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58012 |
1 |
|
|
T100 |
1574 |
|
T101 |
2347 |
|
T102 |
902 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48263 |
1 |
|
|
T100 |
1176 |
|
T101 |
727 |
|
T102 |
1434 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T100 |
51 |
|
T101 |
49 |
|
T102 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T100 |
47 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T100 |
49 |
|
T101 |
49 |
|
T102 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T100 |
47 |
|
T101 |
49 |
|
T102 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T100 |
49 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T100 |
47 |
|
T101 |
47 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T100 |
48 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T100 |
47 |
|
T101 |
48 |
|
T102 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T100 |
43 |
|
T101 |
45 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T100 |
45 |
|
T101 |
47 |
|
T102 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T100 |
42 |
|
T101 |
43 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T100 |
45 |
|
T101 |
46 |
|
T102 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T100 |
41 |
|
T101 |
42 |
|
T102 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
44 |
|
T101 |
45 |
|
T102 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T100 |
39 |
|
T101 |
40 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T100 |
42 |
|
T101 |
45 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T100 |
37 |
|
T101 |
39 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T100 |
15 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T100 |
36 |
|
T101 |
37 |
|
T102 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T100 |
36 |
|
T101 |
36 |
|
T102 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T100 |
41 |
|
T101 |
40 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T100 |
35 |
|
T101 |
33 |
|
T102 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T100 |
39 |
|
T101 |
39 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T100 |
35 |
|
T101 |
31 |
|
T102 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T100 |
38 |
|
T101 |
39 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T100 |
34 |
|
T101 |
31 |
|
T102 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
11 |
|
T101 |
24 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T100 |
38 |
|
T101 |
39 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
14 |
|
T101 |
24 |
|
T102 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T100 |
34 |
|
T101 |
31 |
|
T102 |
19 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60045 |
1 |
|
|
T100 |
2186 |
|
T101 |
1603 |
|
T102 |
967 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50313 |
1 |
|
|
T100 |
924 |
|
T101 |
2385 |
|
T102 |
414 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55967 |
1 |
|
|
T100 |
1268 |
|
T101 |
902 |
|
T102 |
1494 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43154 |
1 |
|
|
T100 |
774 |
|
T101 |
1207 |
|
T102 |
326 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T100 |
42 |
|
T101 |
59 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T100 |
40 |
|
T101 |
59 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T100 |
40 |
|
T101 |
59 |
|
T102 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T100 |
41 |
|
T101 |
54 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T100 |
39 |
|
T101 |
59 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T100 |
41 |
|
T101 |
53 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T100 |
40 |
|
T101 |
51 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T100 |
37 |
|
T101 |
54 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T100 |
38 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T100 |
36 |
|
T101 |
53 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T100 |
36 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T100 |
35 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T100 |
35 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T100 |
35 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T100 |
34 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T100 |
35 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T100 |
34 |
|
T101 |
47 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T100 |
35 |
|
T101 |
49 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T100 |
33 |
|
T101 |
47 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T100 |
32 |
|
T101 |
45 |
|
T102 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T100 |
33 |
|
T101 |
47 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T100 |
31 |
|
T101 |
44 |
|
T102 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T100 |
30 |
|
T101 |
45 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T100 |
31 |
|
T101 |
44 |
|
T102 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
15 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T100 |
30 |
|
T101 |
44 |
|
T102 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T100 |
30 |
|
T101 |
44 |
|
T102 |
9 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59606 |
1 |
|
|
T100 |
1553 |
|
T101 |
1504 |
|
T102 |
631 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41772 |
1 |
|
|
T100 |
831 |
|
T101 |
1111 |
|
T102 |
453 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63532 |
1 |
|
|
T100 |
2225 |
|
T101 |
2209 |
|
T102 |
1704 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44429 |
1 |
|
|
T100 |
702 |
|
T101 |
1290 |
|
T102 |
395 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T100 |
41 |
|
T101 |
54 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T100 |
39 |
|
T101 |
54 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T100 |
38 |
|
T101 |
52 |
|
T102 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T100 |
38 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T100 |
38 |
|
T101 |
52 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T100 |
38 |
|
T101 |
50 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T100 |
34 |
|
T101 |
48 |
|
T102 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T100 |
37 |
|
T101 |
49 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T100 |
32 |
|
T101 |
48 |
|
T102 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T100 |
37 |
|
T101 |
48 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T100 |
31 |
|
T101 |
48 |
|
T102 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T100 |
29 |
|
T101 |
47 |
|
T102 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T100 |
33 |
|
T101 |
48 |
|
T102 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
28 |
|
T101 |
45 |
|
T102 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T100 |
32 |
|
T101 |
43 |
|
T102 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T100 |
26 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T100 |
32 |
|
T101 |
42 |
|
T102 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T100 |
26 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T100 |
32 |
|
T101 |
42 |
|
T102 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T100 |
25 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T100 |
32 |
|
T101 |
39 |
|
T102 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T100 |
25 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T100 |
30 |
|
T101 |
38 |
|
T102 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T100 |
24 |
|
T101 |
43 |
|
T102 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T100 |
29 |
|
T101 |
36 |
|
T102 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
25 |
|
T101 |
21 |
|
T102 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T100 |
23 |
|
T101 |
41 |
|
T102 |
13 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61484 |
1 |
|
|
T100 |
1186 |
|
T101 |
1633 |
|
T102 |
931 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39765 |
1 |
|
|
T100 |
1178 |
|
T101 |
1060 |
|
T102 |
570 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60324 |
1 |
|
|
T100 |
2075 |
|
T101 |
2294 |
|
T102 |
553 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47810 |
1 |
|
|
T100 |
838 |
|
T101 |
1134 |
|
T102 |
1128 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T100 |
46 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T100 |
41 |
|
T101 |
49 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T100 |
45 |
|
T101 |
50 |
|
T102 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T100 |
41 |
|
T101 |
48 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T100 |
45 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T100 |
41 |
|
T101 |
48 |
|
T102 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T100 |
45 |
|
T101 |
49 |
|
T102 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T100 |
40 |
|
T101 |
45 |
|
T102 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T100 |
45 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T100 |
39 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T100 |
45 |
|
T101 |
47 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T100 |
39 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T100 |
44 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T100 |
38 |
|
T101 |
44 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T100 |
35 |
|
T101 |
43 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T100 |
44 |
|
T101 |
46 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T100 |
35 |
|
T101 |
42 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T100 |
42 |
|
T101 |
46 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
20 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T100 |
34 |
|
T101 |
41 |
|
T102 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T100 |
42 |
|
T101 |
44 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T100 |
33 |
|
T101 |
40 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T100 |
41 |
|
T101 |
42 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T100 |
33 |
|
T101 |
37 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
33 |
|
T101 |
34 |
|
T102 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T100 |
32 |
|
T101 |
31 |
|
T102 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
14 |
|
T101 |
22 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T100 |
29 |
|
T101 |
31 |
|
T102 |
12 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58412 |
1 |
|
|
T100 |
1351 |
|
T101 |
1810 |
|
T102 |
1573 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46643 |
1 |
|
|
T100 |
1026 |
|
T101 |
1203 |
|
T102 |
500 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60297 |
1 |
|
|
T100 |
1763 |
|
T101 |
1405 |
|
T102 |
885 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45455 |
1 |
|
|
T100 |
1037 |
|
T101 |
1706 |
|
T102 |
331 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T100 |
53 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T100 |
53 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T100 |
53 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T100 |
50 |
|
T101 |
45 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T100 |
49 |
|
T101 |
45 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T100 |
49 |
|
T101 |
45 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
14 |
|
T101 |
23 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T100 |
52 |
|
T101 |
49 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T100 |
47 |
|
T101 |
44 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T100 |
51 |
|
T101 |
47 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T100 |
46 |
|
T101 |
42 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T100 |
51 |
|
T101 |
46 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T100 |
44 |
|
T101 |
42 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T100 |
50 |
|
T101 |
46 |
|
T102 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T100 |
44 |
|
T101 |
41 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T100 |
49 |
|
T101 |
46 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T100 |
41 |
|
T101 |
41 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T100 |
47 |
|
T101 |
44 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T100 |
41 |
|
T101 |
38 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T100 |
47 |
|
T101 |
42 |
|
T102 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T100 |
39 |
|
T101 |
37 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T100 |
46 |
|
T101 |
41 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T100 |
37 |
|
T101 |
35 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T100 |
42 |
|
T101 |
39 |
|
T102 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
12 |
|
T101 |
23 |
|
T102 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T100 |
35 |
|
T101 |
35 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
13 |
|
T101 |
22 |
|
T102 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T100 |
42 |
|
T101 |
38 |
|
T102 |
10 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65090 |
1 |
|
|
T100 |
1169 |
|
T101 |
2269 |
|
T102 |
853 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44589 |
1 |
|
|
T100 |
1745 |
|
T101 |
1162 |
|
T102 |
457 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56792 |
1 |
|
|
T100 |
1418 |
|
T101 |
1420 |
|
T102 |
1569 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42659 |
1 |
|
|
T100 |
926 |
|
T101 |
990 |
|
T102 |
350 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T100 |
43 |
|
T101 |
62 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T100 |
39 |
|
T101 |
60 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T100 |
43 |
|
T101 |
61 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T100 |
43 |
|
T101 |
60 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T100 |
38 |
|
T101 |
57 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T100 |
41 |
|
T101 |
58 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T100 |
39 |
|
T101 |
57 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T100 |
38 |
|
T101 |
54 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T100 |
39 |
|
T101 |
56 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T100 |
23 |
|
T101 |
26 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T100 |
38 |
|
T101 |
51 |
|
T102 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T100 |
38 |
|
T101 |
55 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T100 |
36 |
|
T101 |
49 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T100 |
37 |
|
T101 |
54 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
35 |
|
T101 |
49 |
|
T102 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T100 |
37 |
|
T101 |
53 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T100 |
34 |
|
T101 |
47 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T100 |
36 |
|
T101 |
53 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T100 |
33 |
|
T101 |
45 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T100 |
36 |
|
T101 |
52 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T100 |
32 |
|
T101 |
43 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T100 |
36 |
|
T101 |
50 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T100 |
22 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T100 |
31 |
|
T101 |
42 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
22 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T100 |
31 |
|
T101 |
41 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T100 |
35 |
|
T101 |
48 |
|
T102 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
22 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T100 |
31 |
|
T101 |
38 |
|
T102 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
19 |
|
T101 |
24 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T100 |
33 |
|
T101 |
48 |
|
T102 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
22 |
|
T101 |
25 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T100 |
30 |
|
T101 |
36 |
|
T102 |
16 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55154 |
1 |
|
|
T100 |
1429 |
|
T101 |
2287 |
|
T102 |
546 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48268 |
1 |
|
|
T100 |
871 |
|
T101 |
809 |
|
T102 |
1363 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56870 |
1 |
|
|
T100 |
2131 |
|
T101 |
1626 |
|
T102 |
880 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48772 |
1 |
|
|
T100 |
860 |
|
T101 |
1186 |
|
T102 |
403 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T100 |
42 |
|
T101 |
60 |
|
T102 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T100 |
38 |
|
T101 |
59 |
|
T102 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T100 |
42 |
|
T101 |
57 |
|
T102 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T100 |
37 |
|
T101 |
59 |
|
T102 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T100 |
42 |
|
T101 |
55 |
|
T102 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T100 |
37 |
|
T101 |
58 |
|
T102 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T100 |
42 |
|
T101 |
53 |
|
T102 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T100 |
37 |
|
T101 |
57 |
|
T102 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T100 |
42 |
|
T101 |
50 |
|
T102 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T100 |
35 |
|
T101 |
56 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T100 |
41 |
|
T101 |
49 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T100 |
23 |
|
T101 |
25 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T100 |
35 |
|
T101 |
54 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T100 |
40 |
|
T101 |
48 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T100 |
34 |
|
T101 |
52 |
|
T102 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T100 |
38 |
|
T101 |
48 |
|
T102 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T100 |
34 |
|
T101 |
51 |
|
T102 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T100 |
36 |
|
T101 |
47 |
|
T102 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T100 |
33 |
|
T101 |
50 |
|
T102 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T100 |
35 |
|
T101 |
45 |
|
T102 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T100 |
33 |
|
T101 |
49 |
|
T102 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T100 |
34 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T100 |
33 |
|
T101 |
49 |
|
T102 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T100 |
32 |
|
T101 |
44 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T100 |
32 |
|
T101 |
48 |
|
T102 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T100 |
32 |
|
T101 |
42 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T100 |
31 |
|
T101 |
44 |
|
T102 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T100 |
31 |
|
T101 |
39 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T100 |
31 |
|
T101 |
43 |
|
T102 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
18 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T100 |
31 |
|
T101 |
37 |
|
T102 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
23 |
|
T101 |
24 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
30 |
|
T101 |
41 |
|
T102 |
16 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61002 |
1 |
|
|
T100 |
1798 |
|
T101 |
1487 |
|
T102 |
1450 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46777 |
1 |
|
|
T100 |
1052 |
|
T101 |
961 |
|
T102 |
519 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51227 |
1 |
|
|
T100 |
1487 |
|
T101 |
2596 |
|
T102 |
742 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49977 |
1 |
|
|
T100 |
974 |
|
T101 |
1062 |
|
T102 |
455 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T100 |
45 |
|
T101 |
49 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T100 |
42 |
|
T101 |
46 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T100 |
45 |
|
T101 |
48 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T100 |
42 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T100 |
45 |
|
T101 |
47 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T100 |
41 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T100 |
45 |
|
T101 |
46 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T100 |
41 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T100 |
43 |
|
T101 |
46 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T100 |
40 |
|
T101 |
44 |
|
T102 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T100 |
42 |
|
T101 |
43 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T100 |
19 |
|
T101 |
29 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T100 |
40 |
|
T101 |
44 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T100 |
40 |
|
T101 |
41 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T100 |
39 |
|
T101 |
42 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T100 |
40 |
|
T101 |
41 |
|
T102 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T100 |
36 |
|
T101 |
41 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T100 |
40 |
|
T101 |
38 |
|
T102 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T100 |
35 |
|
T101 |
40 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T100 |
37 |
|
T101 |
38 |
|
T102 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T100 |
34 |
|
T101 |
38 |
|
T102 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T100 |
35 |
|
T101 |
37 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T100 |
34 |
|
T101 |
36 |
|
T102 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T100 |
34 |
|
T101 |
37 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T100 |
33 |
|
T101 |
34 |
|
T102 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T100 |
34 |
|
T101 |
37 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T100 |
32 |
|
T101 |
34 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T100 |
33 |
|
T101 |
35 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T100 |
31 |
|
T101 |
33 |
|
T102 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T100 |
16 |
|
T101 |
25 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T100 |
32 |
|
T101 |
35 |
|
T102 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T100 |
19 |
|
T101 |
28 |
|
T102 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T100 |
30 |
|
T101 |
33 |
|
T102 |
18 |