cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52604 |
1 |
|
|
T35 |
235 |
|
T61 |
886 |
|
T62 |
670 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43151 |
1 |
|
|
T35 |
807 |
|
T61 |
1646 |
|
T62 |
1605 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59869 |
1 |
|
|
T35 |
409 |
|
T61 |
1361 |
|
T62 |
863 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51968 |
1 |
|
|
T35 |
275 |
|
T61 |
767 |
|
T62 |
850 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T35 |
8 |
|
T61 |
38 |
|
T62 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T35 |
4 |
|
T61 |
34 |
|
T62 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T35 |
4 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T35 |
4 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T35 |
3 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T35 |
3 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T35 |
3 |
|
T61 |
29 |
|
T62 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T35 |
8 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T35 |
2 |
|
T61 |
28 |
|
T62 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T35 |
2 |
|
T61 |
28 |
|
T62 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T35 |
2 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T35 |
8 |
|
T61 |
26 |
|
T62 |
24 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57155 |
1 |
|
|
T35 |
149 |
|
T61 |
1243 |
|
T62 |
1092 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44091 |
1 |
|
|
T35 |
149 |
|
T61 |
1445 |
|
T62 |
527 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59665 |
1 |
|
|
T35 |
1015 |
|
T61 |
1284 |
|
T62 |
957 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46223 |
1 |
|
|
T35 |
328 |
|
T61 |
704 |
|
T62 |
1463 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T35 |
12 |
|
T61 |
26 |
|
T62 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T35 |
12 |
|
T61 |
26 |
|
T62 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T35 |
11 |
|
T61 |
27 |
|
T62 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T35 |
10 |
|
T61 |
23 |
|
T62 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T35 |
11 |
|
T61 |
27 |
|
T62 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
24 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T35 |
11 |
|
T61 |
24 |
|
T62 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T35 |
7 |
|
T61 |
23 |
|
T62 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T35 |
7 |
|
T61 |
22 |
|
T62 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T35 |
7 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T35 |
2 |
|
T61 |
24 |
|
T62 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T35 |
2 |
|
T61 |
24 |
|
T62 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T35 |
6 |
|
T61 |
19 |
|
T62 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T35 |
2 |
|
T61 |
24 |
|
T62 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
18 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61905 |
1 |
|
|
T35 |
301 |
|
T61 |
826 |
|
T62 |
1607 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48399 |
1 |
|
|
T35 |
179 |
|
T61 |
1465 |
|
T62 |
739 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58092 |
1 |
|
|
T35 |
952 |
|
T61 |
1135 |
|
T62 |
926 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39194 |
1 |
|
|
T35 |
198 |
|
T61 |
1137 |
|
T62 |
701 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T35 |
11 |
|
T61 |
46 |
|
T62 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T35 |
10 |
|
T61 |
40 |
|
T62 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T35 |
11 |
|
T61 |
45 |
|
T62 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T35 |
9 |
|
T61 |
37 |
|
T62 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
11 |
|
T61 |
44 |
|
T62 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T35 |
11 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T35 |
11 |
|
T61 |
43 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T35 |
11 |
|
T61 |
43 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T35 |
4 |
|
T61 |
17 |
|
T62 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T35 |
11 |
|
T61 |
41 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T35 |
11 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T35 |
9 |
|
T61 |
24 |
|
T62 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T35 |
9 |
|
T61 |
24 |
|
T62 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T35 |
9 |
|
T61 |
38 |
|
T62 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T35 |
9 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T35 |
9 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T35 |
3 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T35 |
9 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56996 |
1 |
|
|
T35 |
413 |
|
T61 |
1325 |
|
T62 |
1114 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50934 |
1 |
|
|
T35 |
269 |
|
T61 |
760 |
|
T62 |
572 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53883 |
1 |
|
|
T35 |
875 |
|
T61 |
1764 |
|
T62 |
702 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45615 |
1 |
|
|
T35 |
76 |
|
T61 |
716 |
|
T62 |
1613 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T35 |
8 |
|
T61 |
31 |
|
T62 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T35 |
6 |
|
T61 |
31 |
|
T62 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T35 |
6 |
|
T61 |
30 |
|
T62 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T35 |
6 |
|
T61 |
29 |
|
T62 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T35 |
8 |
|
T61 |
31 |
|
T62 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T35 |
6 |
|
T61 |
28 |
|
T62 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T35 |
8 |
|
T61 |
30 |
|
T62 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T35 |
6 |
|
T61 |
27 |
|
T62 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T35 |
6 |
|
T61 |
26 |
|
T62 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T35 |
4 |
|
T61 |
26 |
|
T62 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T35 |
4 |
|
T61 |
26 |
|
T62 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T35 |
3 |
|
T61 |
24 |
|
T62 |
24 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56483 |
1 |
|
|
T35 |
346 |
|
T61 |
636 |
|
T62 |
627 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46625 |
1 |
|
|
T35 |
952 |
|
T61 |
747 |
|
T62 |
749 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57069 |
1 |
|
|
T35 |
327 |
|
T61 |
2126 |
|
T62 |
1028 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47561 |
1 |
|
|
T35 |
77 |
|
T61 |
1074 |
|
T62 |
1565 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T35 |
6 |
|
T61 |
51 |
|
T62 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T35 |
7 |
|
T61 |
52 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T35 |
6 |
|
T61 |
47 |
|
T62 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T35 |
7 |
|
T61 |
49 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T35 |
7 |
|
T61 |
48 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T35 |
7 |
|
T61 |
48 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T35 |
7 |
|
T61 |
48 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
4 |
|
T61 |
7 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T35 |
6 |
|
T61 |
47 |
|
T62 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T35 |
5 |
|
T61 |
44 |
|
T62 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T35 |
5 |
|
T61 |
40 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T35 |
5 |
|
T61 |
38 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T35 |
5 |
|
T61 |
43 |
|
T62 |
20 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T35 |
5 |
|
T61 |
33 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T35 |
5 |
|
T61 |
42 |
|
T62 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T35 |
5 |
|
T61 |
33 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T35 |
5 |
|
T61 |
42 |
|
T62 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
6 |
|
T61 |
7 |
|
T62 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
15 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T35 |
4 |
|
T61 |
41 |
|
T62 |
19 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57499 |
1 |
|
|
T35 |
185 |
|
T61 |
1474 |
|
T62 |
637 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47185 |
1 |
|
|
T35 |
287 |
|
T61 |
608 |
|
T62 |
814 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55607 |
1 |
|
|
T35 |
140 |
|
T61 |
1820 |
|
T62 |
1027 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47370 |
1 |
|
|
T35 |
931 |
|
T61 |
913 |
|
T62 |
1587 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T35 |
11 |
|
T61 |
27 |
|
T62 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T35 |
9 |
|
T61 |
27 |
|
T62 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T35 |
9 |
|
T61 |
27 |
|
T62 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T35 |
12 |
|
T61 |
24 |
|
T62 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T35 |
9 |
|
T61 |
22 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T35 |
9 |
|
T61 |
20 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T35 |
9 |
|
T61 |
20 |
|
T62 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T35 |
9 |
|
T61 |
19 |
|
T62 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T35 |
9 |
|
T61 |
19 |
|
T62 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T35 |
9 |
|
T61 |
19 |
|
T62 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T35 |
12 |
|
T61 |
22 |
|
T62 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T35 |
9 |
|
T61 |
19 |
|
T62 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T35 |
11 |
|
T61 |
22 |
|
T62 |
23 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62050 |
1 |
|
|
T35 |
963 |
|
T61 |
873 |
|
T62 |
807 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46163 |
1 |
|
|
T35 |
182 |
|
T61 |
935 |
|
T62 |
486 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55463 |
1 |
|
|
T35 |
284 |
|
T61 |
1774 |
|
T62 |
1221 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44514 |
1 |
|
|
T35 |
150 |
|
T61 |
957 |
|
T62 |
1660 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T35 |
11 |
|
T61 |
40 |
|
T62 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T35 |
11 |
|
T61 |
40 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T35 |
11 |
|
T61 |
40 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T35 |
11 |
|
T61 |
39 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T35 |
9 |
|
T61 |
41 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
8 |
|
T61 |
40 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T35 |
8 |
|
T61 |
39 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
6 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T35 |
11 |
|
T61 |
37 |
|
T62 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T35 |
12 |
|
T61 |
37 |
|
T62 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T35 |
12 |
|
T61 |
37 |
|
T62 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T35 |
11 |
|
T61 |
34 |
|
T62 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T35 |
10 |
|
T61 |
34 |
|
T62 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T35 |
5 |
|
T61 |
32 |
|
T62 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T35 |
5 |
|
T61 |
31 |
|
T62 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61216 |
1 |
|
|
T35 |
254 |
|
T61 |
809 |
|
T62 |
1687 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47050 |
1 |
|
|
T35 |
888 |
|
T61 |
1141 |
|
T62 |
742 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54006 |
1 |
|
|
T35 |
153 |
|
T61 |
1721 |
|
T62 |
827 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45724 |
1 |
|
|
T35 |
308 |
|
T61 |
959 |
|
T62 |
677 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T35 |
12 |
|
T61 |
45 |
|
T62 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T35 |
11 |
|
T61 |
49 |
|
T62 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T35 |
12 |
|
T61 |
44 |
|
T62 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
4 |
|
T61 |
6 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T35 |
11 |
|
T61 |
48 |
|
T62 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T35 |
11 |
|
T61 |
44 |
|
T62 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T35 |
11 |
|
T61 |
46 |
|
T62 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T35 |
11 |
|
T61 |
43 |
|
T62 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T35 |
11 |
|
T61 |
45 |
|
T62 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T35 |
11 |
|
T61 |
45 |
|
T62 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T35 |
11 |
|
T61 |
45 |
|
T62 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T35 |
10 |
|
T61 |
40 |
|
T62 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T35 |
11 |
|
T61 |
44 |
|
T62 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T35 |
9 |
|
T61 |
41 |
|
T62 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T35 |
10 |
|
T61 |
37 |
|
T62 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T35 |
8 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T35 |
10 |
|
T61 |
34 |
|
T62 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
9 |
|
T62 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
4 |
|
T61 |
5 |
|
T62 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T35 |
7 |
|
T61 |
35 |
|
T62 |
24 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56697 |
1 |
|
|
T35 |
969 |
|
T61 |
1299 |
|
T62 |
1952 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47537 |
1 |
|
|
T35 |
228 |
|
T61 |
812 |
|
T62 |
581 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61616 |
1 |
|
|
T35 |
326 |
|
T61 |
1898 |
|
T62 |
907 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42510 |
1 |
|
|
T35 |
102 |
|
T61 |
797 |
|
T62 |
665 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T35 |
7 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T35 |
9 |
|
T61 |
35 |
|
T62 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T35 |
7 |
|
T61 |
34 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
7 |
|
T61 |
35 |
|
T62 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T35 |
7 |
|
T61 |
34 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T35 |
7 |
|
T61 |
33 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T35 |
7 |
|
T61 |
33 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T35 |
5 |
|
T61 |
33 |
|
T62 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T35 |
6 |
|
T61 |
31 |
|
T62 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T35 |
5 |
|
T61 |
31 |
|
T62 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
6 |
|
T61 |
30 |
|
T62 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
9 |
|
T61 |
10 |
|
T62 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T35 |
6 |
|
T61 |
29 |
|
T62 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
8 |
|
T61 |
10 |
|
T62 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
8 |
|
T61 |
10 |
|
T62 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T35 |
5 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
8 |
|
T61 |
10 |
|
T62 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T35 |
5 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56741 |
1 |
|
|
T35 |
321 |
|
T61 |
1427 |
|
T62 |
534 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46393 |
1 |
|
|
T35 |
898 |
|
T61 |
991 |
|
T62 |
847 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57746 |
1 |
|
|
T35 |
150 |
|
T61 |
940 |
|
T62 |
673 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44735 |
1 |
|
|
T35 |
191 |
|
T61 |
1325 |
|
T62 |
1764 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T35 |
14 |
|
T61 |
36 |
|
T62 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T35 |
13 |
|
T61 |
37 |
|
T62 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T35 |
14 |
|
T61 |
36 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T35 |
13 |
|
T61 |
37 |
|
T62 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T35 |
14 |
|
T61 |
36 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T35 |
13 |
|
T61 |
38 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T35 |
14 |
|
T61 |
36 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T35 |
14 |
|
T61 |
36 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T35 |
13 |
|
T61 |
35 |
|
T62 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
11 |
|
T61 |
35 |
|
T62 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T35 |
13 |
|
T61 |
35 |
|
T62 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T35 |
11 |
|
T61 |
35 |
|
T62 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T35 |
13 |
|
T61 |
35 |
|
T62 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T35 |
10 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T35 |
8 |
|
T61 |
26 |
|
T62 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T35 |
11 |
|
T61 |
34 |
|
T62 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T35 |
8 |
|
T61 |
16 |
|
T62 |
29 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55507 |
1 |
|
|
T35 |
342 |
|
T61 |
498 |
|
T62 |
952 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47928 |
1 |
|
|
T35 |
191 |
|
T61 |
1074 |
|
T62 |
732 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53036 |
1 |
|
|
T35 |
851 |
|
T61 |
1835 |
|
T62 |
1883 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51212 |
1 |
|
|
T35 |
174 |
|
T61 |
1040 |
|
T62 |
445 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T35 |
11 |
|
T61 |
51 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T35 |
10 |
|
T61 |
50 |
|
T62 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T35 |
11 |
|
T61 |
50 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T35 |
10 |
|
T61 |
49 |
|
T62 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T35 |
11 |
|
T61 |
47 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T35 |
9 |
|
T61 |
49 |
|
T62 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T35 |
11 |
|
T61 |
47 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T35 |
9 |
|
T61 |
49 |
|
T62 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T35 |
11 |
|
T61 |
46 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T35 |
9 |
|
T61 |
46 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T35 |
9 |
|
T61 |
46 |
|
T62 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T35 |
9 |
|
T61 |
45 |
|
T62 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T35 |
9 |
|
T61 |
45 |
|
T62 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T35 |
9 |
|
T61 |
44 |
|
T62 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T35 |
7 |
|
T61 |
42 |
|
T62 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T35 |
10 |
|
T61 |
40 |
|
T62 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T35 |
7 |
|
T61 |
40 |
|
T62 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T35 |
9 |
|
T61 |
38 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T35 |
5 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T35 |
5 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
18 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T35 |
5 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
12 |
|
T62 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
16 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57412 |
1 |
|
|
T35 |
257 |
|
T61 |
1124 |
|
T62 |
1177 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46023 |
1 |
|
|
T35 |
165 |
|
T61 |
1699 |
|
T62 |
689 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63478 |
1 |
|
|
T35 |
237 |
|
T61 |
946 |
|
T62 |
1878 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41500 |
1 |
|
|
T35 |
885 |
|
T61 |
818 |
|
T62 |
388 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T35 |
14 |
|
T61 |
41 |
|
T62 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T35 |
12 |
|
T61 |
34 |
|
T62 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T35 |
14 |
|
T61 |
40 |
|
T62 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T35 |
12 |
|
T61 |
34 |
|
T62 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T35 |
14 |
|
T61 |
39 |
|
T62 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
12 |
|
T61 |
33 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T35 |
14 |
|
T61 |
39 |
|
T62 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T35 |
12 |
|
T61 |
33 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T35 |
14 |
|
T61 |
38 |
|
T62 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T35 |
11 |
|
T61 |
32 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T35 |
13 |
|
T61 |
36 |
|
T62 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T35 |
11 |
|
T61 |
32 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T35 |
13 |
|
T61 |
35 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T35 |
13 |
|
T61 |
34 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T35 |
13 |
|
T61 |
33 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T35 |
9 |
|
T61 |
27 |
|
T62 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T35 |
12 |
|
T61 |
33 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T35 |
9 |
|
T61 |
26 |
|
T62 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T35 |
12 |
|
T61 |
31 |
|
T62 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T35 |
9 |
|
T61 |
26 |
|
T62 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T35 |
11 |
|
T61 |
31 |
|
T62 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T35 |
8 |
|
T61 |
26 |
|
T62 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
15 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
14 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58300 |
1 |
|
|
T35 |
453 |
|
T61 |
1240 |
|
T62 |
761 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49758 |
1 |
|
|
T35 |
877 |
|
T61 |
1410 |
|
T62 |
533 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59805 |
1 |
|
|
T35 |
116 |
|
T61 |
1344 |
|
T62 |
1872 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41485 |
1 |
|
|
T35 |
238 |
|
T61 |
704 |
|
T62 |
792 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T35 |
10 |
|
T61 |
29 |
|
T62 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T35 |
10 |
|
T61 |
28 |
|
T62 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T35 |
10 |
|
T61 |
27 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T35 |
10 |
|
T61 |
27 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T35 |
10 |
|
T61 |
26 |
|
T62 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T35 |
8 |
|
T61 |
27 |
|
T62 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T35 |
8 |
|
T61 |
26 |
|
T62 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T35 |
8 |
|
T61 |
26 |
|
T62 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
1 |
|
T61 |
21 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T35 |
7 |
|
T61 |
24 |
|
T62 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
1 |
|
T61 |
21 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T35 |
7 |
|
T61 |
23 |
|
T62 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
1 |
|
T61 |
21 |
|
T62 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T35 |
7 |
|
T61 |
23 |
|
T62 |
26 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58231 |
1 |
|
|
T35 |
130 |
|
T61 |
995 |
|
T62 |
1846 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41677 |
1 |
|
|
T35 |
258 |
|
T61 |
759 |
|
T62 |
551 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56111 |
1 |
|
|
T35 |
168 |
|
T61 |
1966 |
|
T62 |
926 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50694 |
1 |
|
|
T35 |
985 |
|
T61 |
826 |
|
T62 |
712 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T35 |
14 |
|
T61 |
42 |
|
T62 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
3 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
3 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T35 |
15 |
|
T61 |
38 |
|
T62 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T35 |
11 |
|
T61 |
42 |
|
T62 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T35 |
11 |
|
T61 |
40 |
|
T62 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T35 |
15 |
|
T61 |
38 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T35 |
11 |
|
T61 |
38 |
|
T62 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T35 |
15 |
|
T61 |
36 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T35 |
11 |
|
T61 |
37 |
|
T62 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T35 |
15 |
|
T61 |
33 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T35 |
15 |
|
T61 |
33 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T35 |
12 |
|
T61 |
33 |
|
T62 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T35 |
15 |
|
T61 |
32 |
|
T62 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T35 |
11 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T35 |
15 |
|
T61 |
32 |
|
T62 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T35 |
15 |
|
T61 |
31 |
|
T62 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T35 |
15 |
|
T61 |
30 |
|
T62 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T35 |
8 |
|
T61 |
30 |
|
T62 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T35 |
15 |
|
T61 |
30 |
|
T62 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T35 |
3 |
|
T61 |
14 |
|
T62 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T35 |
15 |
|
T61 |
30 |
|
T62 |
20 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58436 |
1 |
|
|
T35 |
319 |
|
T61 |
1908 |
|
T62 |
1139 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40963 |
1 |
|
|
T35 |
777 |
|
T61 |
933 |
|
T62 |
787 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59965 |
1 |
|
|
T35 |
528 |
|
T61 |
1137 |
|
T62 |
729 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48305 |
1 |
|
|
T35 |
121 |
|
T61 |
727 |
|
T62 |
1346 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T35 |
5 |
|
T61 |
36 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T35 |
5 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T35 |
5 |
|
T61 |
31 |
|
T62 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T35 |
5 |
|
T61 |
31 |
|
T62 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T35 |
5 |
|
T61 |
31 |
|
T62 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T35 |
4 |
|
T61 |
34 |
|
T62 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T35 |
4 |
|
T61 |
34 |
|
T62 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T35 |
4 |
|
T61 |
27 |
|
T62 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T35 |
4 |
|
T61 |
23 |
|
T62 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T35 |
5 |
|
T61 |
29 |
|
T62 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
4 |
|
T61 |
15 |
|
T62 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T35 |
4 |
|
T61 |
21 |
|
T62 |
17 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59751 |
1 |
|
|
T35 |
854 |
|
T61 |
1727 |
|
T62 |
692 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43639 |
1 |
|
|
T35 |
274 |
|
T61 |
1007 |
|
T62 |
1708 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56451 |
1 |
|
|
T35 |
171 |
|
T61 |
985 |
|
T62 |
722 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47461 |
1 |
|
|
T35 |
271 |
|
T61 |
981 |
|
T62 |
772 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T35 |
13 |
|
T61 |
36 |
|
T62 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T35 |
14 |
|
T61 |
33 |
|
T62 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T35 |
12 |
|
T61 |
36 |
|
T62 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T35 |
14 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T35 |
12 |
|
T61 |
36 |
|
T62 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T35 |
14 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T35 |
11 |
|
T61 |
35 |
|
T62 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T35 |
14 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T35 |
10 |
|
T61 |
34 |
|
T62 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T35 |
14 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T35 |
13 |
|
T61 |
30 |
|
T62 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T35 |
13 |
|
T61 |
29 |
|
T62 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T35 |
10 |
|
T61 |
30 |
|
T62 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T35 |
10 |
|
T61 |
30 |
|
T62 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
10 |
|
T61 |
28 |
|
T62 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T35 |
10 |
|
T61 |
27 |
|
T62 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
4 |
|
T61 |
14 |
|
T62 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
16 |
|
T62 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T35 |
10 |
|
T61 |
27 |
|
T62 |
25 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57390 |
1 |
|
|
T35 |
343 |
|
T61 |
1954 |
|
T62 |
1000 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46211 |
1 |
|
|
T35 |
984 |
|
T61 |
596 |
|
T62 |
1875 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52036 |
1 |
|
|
T35 |
25 |
|
T61 |
1023 |
|
T62 |
489 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50328 |
1 |
|
|
T35 |
202 |
|
T61 |
987 |
|
T62 |
619 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T35 |
18 |
|
T61 |
41 |
|
T62 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
17 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T35 |
17 |
|
T61 |
39 |
|
T62 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T35 |
18 |
|
T61 |
41 |
|
T62 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
17 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T35 |
16 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T35 |
18 |
|
T61 |
41 |
|
T62 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T35 |
18 |
|
T61 |
39 |
|
T62 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T35 |
15 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T35 |
18 |
|
T61 |
37 |
|
T62 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T35 |
14 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T35 |
18 |
|
T61 |
35 |
|
T62 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T35 |
12 |
|
T61 |
38 |
|
T62 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T35 |
18 |
|
T61 |
34 |
|
T62 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T35 |
12 |
|
T61 |
37 |
|
T62 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
1 |
|
T61 |
15 |
|
T62 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T35 |
17 |
|
T61 |
34 |
|
T62 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T35 |
12 |
|
T61 |
36 |
|
T62 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T35 |
17 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T35 |
12 |
|
T61 |
36 |
|
T62 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T35 |
17 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T35 |
12 |
|
T61 |
35 |
|
T62 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T35 |
17 |
|
T61 |
31 |
|
T62 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T35 |
11 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T35 |
17 |
|
T61 |
30 |
|
T62 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T35 |
10 |
|
T61 |
32 |
|
T62 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T35 |
16 |
|
T61 |
28 |
|
T62 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T35 |
16 |
|
T61 |
27 |
|
T62 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T61 |
15 |
|
T62 |
16 |
|
T28 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T35 |
15 |
|
T61 |
26 |
|
T62 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
1 |
|
T61 |
16 |
|
T62 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T35 |
10 |
|
T61 |
30 |
|
T62 |
22 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55080 |
1 |
|
|
T35 |
971 |
|
T61 |
1172 |
|
T62 |
1335 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47943 |
1 |
|
|
T35 |
229 |
|
T61 |
1584 |
|
T62 |
459 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60036 |
1 |
|
|
T35 |
179 |
|
T61 |
1192 |
|
T62 |
1912 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44460 |
1 |
|
|
T35 |
155 |
|
T61 |
728 |
|
T62 |
389 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T35 |
12 |
|
T61 |
30 |
|
T62 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
5 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T35 |
12 |
|
T61 |
30 |
|
T62 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
5 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T35 |
12 |
|
T61 |
27 |
|
T62 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T35 |
12 |
|
T61 |
30 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T35 |
12 |
|
T61 |
30 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
12 |
|
T61 |
28 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T35 |
12 |
|
T61 |
26 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
6 |
|
T61 |
20 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T35 |
11 |
|
T61 |
23 |
|
T62 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T35 |
11 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T35 |
11 |
|
T61 |
25 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T35 |
10 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T35 |
10 |
|
T61 |
25 |
|
T62 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T35 |
9 |
|
T61 |
25 |
|
T62 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T35 |
10 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T35 |
8 |
|
T61 |
25 |
|
T62 |
18 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55054 |
1 |
|
|
T35 |
934 |
|
T61 |
1091 |
|
T62 |
936 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44222 |
1 |
|
|
T35 |
121 |
|
T61 |
1609 |
|
T62 |
788 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57811 |
1 |
|
|
T35 |
407 |
|
T61 |
965 |
|
T62 |
1785 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50231 |
1 |
|
|
T35 |
242 |
|
T61 |
925 |
|
T62 |
585 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T35 |
7 |
|
T61 |
34 |
|
T62 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T35 |
5 |
|
T61 |
36 |
|
T62 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T35 |
7 |
|
T61 |
34 |
|
T62 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T35 |
5 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T35 |
7 |
|
T61 |
32 |
|
T62 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T35 |
4 |
|
T61 |
33 |
|
T62 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T35 |
7 |
|
T61 |
30 |
|
T62 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T35 |
4 |
|
T61 |
33 |
|
T62 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T35 |
7 |
|
T61 |
30 |
|
T62 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T35 |
4 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T35 |
7 |
|
T61 |
30 |
|
T62 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T35 |
6 |
|
T61 |
29 |
|
T62 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T35 |
5 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T35 |
4 |
|
T61 |
30 |
|
T62 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T35 |
4 |
|
T61 |
29 |
|
T62 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T35 |
4 |
|
T61 |
29 |
|
T62 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T35 |
5 |
|
T61 |
24 |
|
T62 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T35 |
4 |
|
T61 |
28 |
|
T62 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T35 |
5 |
|
T61 |
20 |
|
T62 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T35 |
5 |
|
T61 |
23 |
|
T62 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T35 |
4 |
|
T61 |
28 |
|
T62 |
21 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55267 |
1 |
|
|
T35 |
292 |
|
T61 |
1369 |
|
T62 |
713 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46055 |
1 |
|
|
T35 |
316 |
|
T61 |
659 |
|
T62 |
1541 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58337 |
1 |
|
|
T35 |
58 |
|
T61 |
1027 |
|
T62 |
974 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47161 |
1 |
|
|
T35 |
937 |
|
T61 |
1645 |
|
T62 |
763 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
2 |
|
T61 |
21 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T35 |
11 |
|
T61 |
26 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T35 |
10 |
|
T61 |
26 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T35 |
13 |
|
T61 |
28 |
|
T62 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T35 |
9 |
|
T61 |
24 |
|
T62 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T35 |
13 |
|
T61 |
26 |
|
T62 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T35 |
9 |
|
T61 |
23 |
|
T62 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T35 |
13 |
|
T61 |
25 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T35 |
10 |
|
T61 |
23 |
|
T62 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T35 |
13 |
|
T61 |
25 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T35 |
10 |
|
T61 |
21 |
|
T62 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T35 |
12 |
|
T61 |
23 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T35 |
9 |
|
T61 |
21 |
|
T62 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T35 |
12 |
|
T61 |
23 |
|
T62 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T35 |
8 |
|
T61 |
21 |
|
T62 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
2 |
|
T61 |
20 |
|
T62 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T35 |
12 |
|
T61 |
23 |
|
T62 |
27 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55655 |
1 |
|
|
T35 |
795 |
|
T61 |
894 |
|
T62 |
2204 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46786 |
1 |
|
|
T35 |
250 |
|
T61 |
645 |
|
T62 |
630 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61083 |
1 |
|
|
T35 |
211 |
|
T61 |
2371 |
|
T62 |
862 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43731 |
1 |
|
|
T35 |
383 |
|
T61 |
680 |
|
T62 |
477 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T35 |
11 |
|
T61 |
31 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T35 |
11 |
|
T61 |
32 |
|
T62 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T35 |
11 |
|
T61 |
30 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T35 |
11 |
|
T61 |
31 |
|
T62 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T35 |
11 |
|
T61 |
30 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T35 |
11 |
|
T61 |
28 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
12 |
|
T61 |
26 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T35 |
12 |
|
T61 |
26 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T35 |
6 |
|
T61 |
28 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T35 |
12 |
|
T61 |
25 |
|
T62 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T35 |
11 |
|
T61 |
23 |
|
T62 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T35 |
11 |
|
T61 |
22 |
|
T62 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T35 |
11 |
|
T61 |
21 |
|
T62 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
18 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59357 |
1 |
|
|
T35 |
320 |
|
T61 |
1711 |
|
T62 |
1513 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45134 |
1 |
|
|
T35 |
851 |
|
T61 |
686 |
|
T62 |
611 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56275 |
1 |
|
|
T35 |
248 |
|
T61 |
999 |
|
T62 |
812 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45733 |
1 |
|
|
T35 |
176 |
|
T61 |
1413 |
|
T62 |
976 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
6 |
|
T61 |
22 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
6 |
|
T61 |
22 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T35 |
8 |
|
T61 |
24 |
|
T62 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T35 |
8 |
|
T61 |
23 |
|
T62 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T35 |
8 |
|
T61 |
21 |
|
T62 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T35 |
8 |
|
T61 |
21 |
|
T62 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T35 |
8 |
|
T61 |
20 |
|
T62 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T35 |
8 |
|
T61 |
22 |
|
T62 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T35 |
8 |
|
T61 |
20 |
|
T62 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T35 |
8 |
|
T61 |
21 |
|
T62 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T35 |
7 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T35 |
8 |
|
T61 |
16 |
|
T62 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T35 |
8 |
|
T61 |
19 |
|
T62 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T35 |
7 |
|
T61 |
16 |
|
T62 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T35 |
6 |
|
T61 |
19 |
|
T62 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T35 |
7 |
|
T61 |
16 |
|
T62 |
30 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55426 |
1 |
|
|
T35 |
285 |
|
T61 |
981 |
|
T62 |
2043 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41070 |
1 |
|
|
T35 |
236 |
|
T61 |
542 |
|
T62 |
822 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60364 |
1 |
|
|
T35 |
352 |
|
T61 |
2088 |
|
T62 |
422 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49160 |
1 |
|
|
T35 |
767 |
|
T61 |
913 |
|
T62 |
631 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T35 |
7 |
|
T61 |
44 |
|
T62 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T35 |
9 |
|
T61 |
46 |
|
T62 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T35 |
7 |
|
T61 |
42 |
|
T62 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T35 |
9 |
|
T61 |
46 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T35 |
7 |
|
T61 |
40 |
|
T62 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T35 |
7 |
|
T61 |
47 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T35 |
7 |
|
T61 |
46 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T35 |
7 |
|
T61 |
45 |
|
T62 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T35 |
7 |
|
T61 |
45 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T35 |
7 |
|
T61 |
42 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
7 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T35 |
6 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T35 |
7 |
|
T61 |
42 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T35 |
7 |
|
T61 |
42 |
|
T62 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T35 |
7 |
|
T61 |
34 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T35 |
7 |
|
T61 |
40 |
|
T62 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T35 |
7 |
|
T61 |
32 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T35 |
7 |
|
T61 |
32 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T35 |
7 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T35 |
7 |
|
T61 |
32 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T35 |
6 |
|
T61 |
35 |
|
T62 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T35 |
7 |
|
T61 |
30 |
|
T62 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T35 |
6 |
|
T61 |
34 |
|
T62 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
5 |
|
T61 |
12 |
|
T62 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
24 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53280 |
1 |
|
|
T35 |
370 |
|
T61 |
822 |
|
T62 |
964 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46216 |
1 |
|
|
T35 |
202 |
|
T61 |
744 |
|
T62 |
1717 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60617 |
1 |
|
|
T35 |
1038 |
|
T61 |
2101 |
|
T62 |
744 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47582 |
1 |
|
|
T35 |
100 |
|
T61 |
966 |
|
T62 |
513 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T35 |
4 |
|
T61 |
38 |
|
T62 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T35 |
5 |
|
T61 |
38 |
|
T62 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T35 |
4 |
|
T61 |
38 |
|
T62 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T35 |
4 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T35 |
4 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T35 |
3 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T35 |
3 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T35 |
3 |
|
T61 |
34 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
7 |
|
T61 |
13 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T35 |
3 |
|
T61 |
32 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T35 |
4 |
|
T61 |
31 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T35 |
5 |
|
T61 |
36 |
|
T62 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T35 |
4 |
|
T61 |
30 |
|
T62 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T35 |
4 |
|
T61 |
29 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T35 |
4 |
|
T61 |
29 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T35 |
4 |
|
T61 |
35 |
|
T62 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T35 |
4 |
|
T61 |
28 |
|
T62 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T35 |
4 |
|
T61 |
34 |
|
T62 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T35 |
4 |
|
T61 |
24 |
|
T62 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
6 |
|
T61 |
14 |
|
T62 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T35 |
3 |
|
T61 |
34 |
|
T62 |
20 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56801 |
1 |
|
|
T35 |
541 |
|
T61 |
801 |
|
T62 |
1716 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43016 |
1 |
|
|
T35 |
767 |
|
T61 |
1017 |
|
T62 |
780 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55064 |
1 |
|
|
T35 |
207 |
|
T61 |
586 |
|
T62 |
801 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51579 |
1 |
|
|
T35 |
98 |
|
T61 |
1914 |
|
T62 |
699 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T35 |
7 |
|
T61 |
58 |
|
T62 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T35 |
9 |
|
T61 |
55 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T35 |
7 |
|
T61 |
58 |
|
T62 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T35 |
7 |
|
T61 |
55 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T35 |
7 |
|
T61 |
58 |
|
T62 |
32 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T35 |
7 |
|
T61 |
56 |
|
T62 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T35 |
7 |
|
T61 |
57 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T35 |
6 |
|
T61 |
56 |
|
T62 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T35 |
6 |
|
T61 |
56 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T35 |
6 |
|
T61 |
54 |
|
T62 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T35 |
6 |
|
T61 |
51 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T35 |
6 |
|
T61 |
53 |
|
T62 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T35 |
6 |
|
T61 |
51 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T35 |
6 |
|
T61 |
49 |
|
T62 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T35 |
6 |
|
T61 |
51 |
|
T62 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T35 |
6 |
|
T61 |
48 |
|
T62 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T35 |
6 |
|
T61 |
50 |
|
T62 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T35 |
6 |
|
T61 |
47 |
|
T62 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T35 |
6 |
|
T61 |
49 |
|
T62 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T35 |
6 |
|
T61 |
46 |
|
T62 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T35 |
6 |
|
T61 |
43 |
|
T62 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
9 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T35 |
6 |
|
T61 |
43 |
|
T62 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T35 |
6 |
|
T61 |
39 |
|
T62 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
8 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T35 |
6 |
|
T61 |
43 |
|
T62 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T35 |
6 |
|
T61 |
38 |
|
T62 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
8 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T35 |
6 |
|
T61 |
42 |
|
T62 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T35 |
6 |
|
T61 |
38 |
|
T62 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
8 |
|
T61 |
8 |
|
T62 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T35 |
5 |
|
T61 |
40 |
|
T62 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
6 |
|
T61 |
11 |
|
T62 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
24 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52805 |
1 |
|
|
T35 |
328 |
|
T61 |
1965 |
|
T62 |
706 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52665 |
1 |
|
|
T35 |
853 |
|
T61 |
797 |
|
T62 |
650 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56501 |
1 |
|
|
T35 |
249 |
|
T61 |
858 |
|
T62 |
807 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43899 |
1 |
|
|
T35 |
166 |
|
T61 |
892 |
|
T62 |
1822 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T35 |
10 |
|
T61 |
44 |
|
T62 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
18 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T35 |
13 |
|
T61 |
41 |
|
T62 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
3 |
|
T61 |
18 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T35 |
12 |
|
T61 |
40 |
|
T62 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T35 |
12 |
|
T61 |
41 |
|
T62 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T35 |
10 |
|
T61 |
40 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T35 |
11 |
|
T61 |
41 |
|
T62 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T35 |
10 |
|
T61 |
40 |
|
T62 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T35 |
11 |
|
T61 |
41 |
|
T62 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T35 |
11 |
|
T61 |
40 |
|
T62 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T35 |
9 |
|
T61 |
36 |
|
T62 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T35 |
10 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T35 |
9 |
|
T61 |
35 |
|
T62 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T35 |
9 |
|
T61 |
34 |
|
T62 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T35 |
8 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T35 |
8 |
|
T61 |
31 |
|
T62 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T35 |
8 |
|
T61 |
30 |
|
T62 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T35 |
6 |
|
T61 |
15 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T35 |
8 |
|
T61 |
30 |
|
T62 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T35 |
3 |
|
T61 |
17 |
|
T62 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
28 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58003 |
1 |
|
|
T35 |
409 |
|
T61 |
1079 |
|
T62 |
993 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45202 |
1 |
|
|
T35 |
143 |
|
T61 |
1557 |
|
T62 |
1850 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57920 |
1 |
|
|
T35 |
992 |
|
T61 |
1149 |
|
T62 |
506 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46073 |
1 |
|
|
T35 |
112 |
|
T61 |
795 |
|
T62 |
526 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T35 |
8 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T35 |
7 |
|
T61 |
37 |
|
T62 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T35 |
7 |
|
T61 |
36 |
|
T62 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
7 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T35 |
6 |
|
T61 |
33 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T35 |
5 |
|
T61 |
33 |
|
T62 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T35 |
8 |
|
T61 |
34 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T35 |
5 |
|
T61 |
33 |
|
T62 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T35 |
5 |
|
T61 |
32 |
|
T62 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T35 |
5 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T35 |
5 |
|
T61 |
30 |
|
T62 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
5 |
|
T61 |
16 |
|
T62 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T35 |
7 |
|
T61 |
26 |
|
T62 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T35 |
5 |
|
T61 |
28 |
|
T62 |
21 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54430 |
1 |
|
|
T35 |
295 |
|
T61 |
1387 |
|
T62 |
1220 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43888 |
1 |
|
|
T35 |
301 |
|
T61 |
473 |
|
T62 |
606 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56874 |
1 |
|
|
T35 |
886 |
|
T61 |
1998 |
|
T62 |
1713 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51144 |
1 |
|
|
T35 |
125 |
|
T61 |
832 |
|
T62 |
517 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T35 |
10 |
|
T61 |
32 |
|
T62 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T35 |
9 |
|
T61 |
32 |
|
T62 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
5 |
|
T61 |
19 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T35 |
10 |
|
T61 |
32 |
|
T62 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T35 |
10 |
|
T61 |
31 |
|
T62 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T35 |
9 |
|
T61 |
30 |
|
T62 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T35 |
9 |
|
T61 |
31 |
|
T62 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T35 |
9 |
|
T61 |
28 |
|
T62 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T35 |
9 |
|
T61 |
27 |
|
T62 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T35 |
9 |
|
T61 |
29 |
|
T62 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T35 |
10 |
|
T61 |
25 |
|
T62 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T35 |
10 |
|
T61 |
24 |
|
T62 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T35 |
10 |
|
T61 |
23 |
|
T62 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T35 |
6 |
|
T61 |
29 |
|
T62 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T35 |
10 |
|
T61 |
23 |
|
T62 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T35 |
5 |
|
T61 |
27 |
|
T62 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T35 |
10 |
|
T61 |
22 |
|
T62 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T35 |
10 |
|
T61 |
21 |
|
T62 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
20 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55150 |
1 |
|
|
T35 |
310 |
|
T61 |
2101 |
|
T62 |
2017 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46069 |
1 |
|
|
T35 |
196 |
|
T61 |
602 |
|
T62 |
512 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64977 |
1 |
|
|
T35 |
1019 |
|
T61 |
1488 |
|
T62 |
707 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40658 |
1 |
|
|
T35 |
198 |
|
T61 |
642 |
|
T62 |
739 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T35 |
5 |
|
T61 |
26 |
|
T62 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T35 |
7 |
|
T61 |
24 |
|
T62 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T35 |
5 |
|
T61 |
24 |
|
T62 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T35 |
7 |
|
T61 |
24 |
|
T62 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T35 |
5 |
|
T61 |
24 |
|
T62 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T35 |
7 |
|
T61 |
24 |
|
T62 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T35 |
5 |
|
T61 |
24 |
|
T62 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T35 |
7 |
|
T61 |
24 |
|
T62 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T35 |
4 |
|
T61 |
24 |
|
T62 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T35 |
6 |
|
T61 |
23 |
|
T62 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T35 |
4 |
|
T61 |
24 |
|
T62 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T35 |
6 |
|
T61 |
23 |
|
T62 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T35 |
6 |
|
T61 |
22 |
|
T62 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T35 |
6 |
|
T61 |
22 |
|
T62 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T35 |
6 |
|
T61 |
22 |
|
T62 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
4 |
|
T61 |
22 |
|
T62 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T35 |
3 |
|
T61 |
22 |
|
T62 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T35 |
6 |
|
T61 |
18 |
|
T62 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T35 |
6 |
|
T61 |
21 |
|
T62 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T35 |
6 |
|
T61 |
19 |
|
T62 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T35 |
6 |
|
T61 |
19 |
|
T62 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
5 |
|
T61 |
18 |
|
T62 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T35 |
3 |
|
T61 |
21 |
|
T62 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
4 |
|
T61 |
20 |
|
T62 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T35 |
6 |
|
T61 |
19 |
|
T62 |
27 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56342 |
1 |
|
|
T35 |
323 |
|
T61 |
1565 |
|
T62 |
707 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44775 |
1 |
|
|
T35 |
141 |
|
T61 |
1049 |
|
T62 |
687 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58152 |
1 |
|
|
T35 |
891 |
|
T61 |
804 |
|
T62 |
1776 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47703 |
1 |
|
|
T35 |
287 |
|
T61 |
985 |
|
T62 |
666 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T35 |
7 |
|
T61 |
47 |
|
T62 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T35 |
12 |
|
T61 |
49 |
|
T62 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T35 |
7 |
|
T61 |
46 |
|
T62 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T35 |
12 |
|
T61 |
48 |
|
T62 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T35 |
12 |
|
T61 |
46 |
|
T62 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T35 |
11 |
|
T61 |
43 |
|
T62 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T35 |
11 |
|
T61 |
43 |
|
T62 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T35 |
10 |
|
T61 |
43 |
|
T62 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T35 |
10 |
|
T61 |
42 |
|
T62 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T35 |
10 |
|
T61 |
41 |
|
T62 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T35 |
10 |
|
T61 |
39 |
|
T62 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T35 |
6 |
|
T61 |
42 |
|
T62 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T35 |
10 |
|
T61 |
38 |
|
T62 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T35 |
6 |
|
T61 |
42 |
|
T62 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T35 |
10 |
|
T61 |
37 |
|
T62 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
5 |
|
T61 |
39 |
|
T62 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T35 |
10 |
|
T61 |
35 |
|
T62 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T35 |
5 |
|
T61 |
38 |
|
T62 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T35 |
10 |
|
T61 |
35 |
|
T62 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T35 |
10 |
|
T61 |
35 |
|
T62 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
7 |
|
T61 |
15 |
|
T62 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T35 |
5 |
|
T61 |
37 |
|
T62 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
2 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T35 |
10 |
|
T61 |
34 |
|
T62 |
28 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53452 |
1 |
|
|
T35 |
289 |
|
T61 |
1077 |
|
T62 |
528 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50851 |
1 |
|
|
T35 |
117 |
|
T61 |
1789 |
|
T62 |
836 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56073 |
1 |
|
|
T35 |
391 |
|
T61 |
1120 |
|
T62 |
851 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46558 |
1 |
|
|
T35 |
813 |
|
T61 |
647 |
|
T62 |
1622 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T35 |
10 |
|
T61 |
39 |
|
T62 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T35 |
8 |
|
T61 |
35 |
|
T62 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T35 |
10 |
|
T61 |
39 |
|
T62 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T35 |
7 |
|
T61 |
33 |
|
T62 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T35 |
10 |
|
T61 |
39 |
|
T62 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T35 |
7 |
|
T61 |
33 |
|
T62 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T35 |
10 |
|
T61 |
37 |
|
T62 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T35 |
7 |
|
T61 |
33 |
|
T62 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T35 |
10 |
|
T61 |
36 |
|
T62 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T35 |
7 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
5 |
|
T61 |
14 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T35 |
10 |
|
T61 |
35 |
|
T62 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T35 |
6 |
|
T61 |
32 |
|
T62 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T35 |
9 |
|
T61 |
35 |
|
T62 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T35 |
7 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T35 |
6 |
|
T61 |
31 |
|
T62 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T35 |
9 |
|
T61 |
33 |
|
T62 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T35 |
8 |
|
T61 |
32 |
|
T62 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T35 |
7 |
|
T61 |
31 |
|
T62 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T35 |
7 |
|
T61 |
30 |
|
T62 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T35 |
8 |
|
T61 |
29 |
|
T62 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T35 |
6 |
|
T61 |
17 |
|
T62 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T35 |
7 |
|
T61 |
29 |
|
T62 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T35 |
5 |
|
T61 |
13 |
|
T62 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T35 |
8 |
|
T61 |
28 |
|
T62 |
26 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60204 |
1 |
|
|
T35 |
367 |
|
T61 |
806 |
|
T62 |
918 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39399 |
1 |
|
|
T35 |
201 |
|
T61 |
1882 |
|
T62 |
1544 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60860 |
1 |
|
|
T35 |
913 |
|
T61 |
794 |
|
T62 |
832 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47452 |
1 |
|
|
T35 |
148 |
|
T61 |
1052 |
|
T62 |
732 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T35 |
7 |
|
T61 |
48 |
|
T62 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T35 |
8 |
|
T61 |
45 |
|
T62 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T35 |
7 |
|
T61 |
46 |
|
T62 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T35 |
6 |
|
T61 |
13 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T35 |
8 |
|
T61 |
44 |
|
T62 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T35 |
7 |
|
T61 |
45 |
|
T62 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T35 |
7 |
|
T61 |
45 |
|
T62 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T35 |
7 |
|
T61 |
45 |
|
T62 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T35 |
6 |
|
T61 |
45 |
|
T62 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T35 |
7 |
|
T61 |
44 |
|
T62 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T35 |
6 |
|
T61 |
44 |
|
T62 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T35 |
7 |
|
T61 |
43 |
|
T62 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T35 |
6 |
|
T61 |
42 |
|
T62 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T35 |
7 |
|
T61 |
43 |
|
T62 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T35 |
6 |
|
T61 |
40 |
|
T62 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
7 |
|
T61 |
10 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T35 |
7 |
|
T61 |
39 |
|
T62 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T35 |
6 |
|
T61 |
38 |
|
T62 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
8 |
|
T61 |
38 |
|
T62 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T35 |
6 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T35 |
8 |
|
T61 |
38 |
|
T62 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T35 |
6 |
|
T61 |
38 |
|
T62 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T35 |
8 |
|
T61 |
38 |
|
T62 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T35 |
6 |
|
T61 |
36 |
|
T62 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T35 |
6 |
|
T61 |
35 |
|
T62 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T35 |
8 |
|
T61 |
37 |
|
T62 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T35 |
6 |
|
T61 |
34 |
|
T62 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T35 |
6 |
|
T61 |
34 |
|
T62 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
6 |
|
T61 |
10 |
|
T62 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T35 |
8 |
|
T61 |
36 |
|
T62 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T35 |
6 |
|
T61 |
12 |
|
T62 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T35 |
5 |
|
T61 |
34 |
|
T62 |
24 |