cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54348 |
1 |
|
|
T22 |
1240 |
|
T26 |
917 |
|
T98 |
1682 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46001 |
1 |
|
|
T22 |
951 |
|
T26 |
1078 |
|
T98 |
1570 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55186 |
1 |
|
|
T22 |
2082 |
|
T26 |
1620 |
|
T98 |
1220 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48715 |
1 |
|
|
T22 |
1296 |
|
T26 |
2217 |
|
T98 |
1013 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T22 |
53 |
|
T26 |
70 |
|
T98 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T22 |
50 |
|
T26 |
74 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T22 |
52 |
|
T26 |
69 |
|
T98 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T22 |
50 |
|
T26 |
73 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T22 |
51 |
|
T26 |
68 |
|
T98 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T22 |
49 |
|
T26 |
73 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
51 |
|
T26 |
68 |
|
T98 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T22 |
48 |
|
T26 |
71 |
|
T98 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
50 |
|
T26 |
67 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
47 |
|
T26 |
69 |
|
T98 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T22 |
47 |
|
T26 |
63 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
47 |
|
T26 |
68 |
|
T98 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T22 |
44 |
|
T26 |
62 |
|
T98 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T22 |
46 |
|
T26 |
68 |
|
T98 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
19 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T22 |
43 |
|
T26 |
62 |
|
T98 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T22 |
45 |
|
T26 |
64 |
|
T98 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T22 |
45 |
|
T26 |
63 |
|
T98 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T22 |
43 |
|
T26 |
59 |
|
T98 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T22 |
45 |
|
T26 |
62 |
|
T98 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T22 |
42 |
|
T26 |
52 |
|
T98 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T22 |
45 |
|
T26 |
62 |
|
T98 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
41 |
|
T26 |
50 |
|
T98 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T22 |
44 |
|
T26 |
58 |
|
T98 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
40 |
|
T26 |
48 |
|
T98 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T22 |
43 |
|
T26 |
58 |
|
T98 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T22 |
40 |
|
T26 |
44 |
|
T98 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T22 |
42 |
|
T26 |
58 |
|
T98 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
17 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T22 |
38 |
|
T26 |
43 |
|
T98 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T22 |
41 |
|
T26 |
56 |
|
T98 |
31 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57743 |
1 |
|
|
T22 |
1453 |
|
T26 |
1467 |
|
T98 |
1702 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49540 |
1 |
|
|
T22 |
1014 |
|
T26 |
1125 |
|
T98 |
884 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55272 |
1 |
|
|
T22 |
1588 |
|
T26 |
2504 |
|
T98 |
1963 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42218 |
1 |
|
|
T22 |
1674 |
|
T26 |
1224 |
|
T98 |
1091 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T22 |
46 |
|
T26 |
41 |
|
T98 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T22 |
48 |
|
T26 |
48 |
|
T98 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T22 |
46 |
|
T26 |
41 |
|
T98 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T22 |
47 |
|
T26 |
46 |
|
T98 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T22 |
45 |
|
T26 |
40 |
|
T98 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T22 |
47 |
|
T26 |
45 |
|
T98 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T22 |
45 |
|
T26 |
39 |
|
T98 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T22 |
45 |
|
T26 |
43 |
|
T98 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T22 |
43 |
|
T26 |
39 |
|
T98 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T22 |
44 |
|
T26 |
43 |
|
T98 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T22 |
43 |
|
T26 |
38 |
|
T98 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
43 |
|
T26 |
43 |
|
T98 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T22 |
42 |
|
T26 |
38 |
|
T98 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T22 |
43 |
|
T26 |
42 |
|
T98 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T22 |
40 |
|
T26 |
38 |
|
T98 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
18 |
|
T26 |
19 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T22 |
42 |
|
T26 |
41 |
|
T98 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
39 |
|
T26 |
37 |
|
T98 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T22 |
41 |
|
T26 |
40 |
|
T98 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T22 |
39 |
|
T26 |
36 |
|
T98 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T22 |
40 |
|
T26 |
39 |
|
T98 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T22 |
39 |
|
T26 |
36 |
|
T98 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T22 |
40 |
|
T26 |
39 |
|
T98 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T22 |
38 |
|
T26 |
35 |
|
T98 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T22 |
40 |
|
T26 |
39 |
|
T98 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T22 |
37 |
|
T26 |
34 |
|
T98 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T22 |
38 |
|
T26 |
39 |
|
T98 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T22 |
35 |
|
T26 |
32 |
|
T98 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T22 |
38 |
|
T26 |
38 |
|
T98 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T22 |
34 |
|
T26 |
32 |
|
T98 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T22 |
36 |
|
T26 |
38 |
|
T98 |
27 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61861 |
1 |
|
|
T22 |
2026 |
|
T26 |
1384 |
|
T98 |
1046 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47156 |
1 |
|
|
T22 |
1173 |
|
T26 |
1303 |
|
T98 |
1786 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50840 |
1 |
|
|
T22 |
1389 |
|
T26 |
2057 |
|
T98 |
1276 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44436 |
1 |
|
|
T22 |
949 |
|
T26 |
1282 |
|
T98 |
1265 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T22 |
54 |
|
T26 |
53 |
|
T98 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T22 |
54 |
|
T26 |
57 |
|
T98 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T22 |
54 |
|
T26 |
52 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T22 |
50 |
|
T26 |
56 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T22 |
53 |
|
T26 |
52 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T22 |
47 |
|
T26 |
56 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
52 |
|
T26 |
50 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T22 |
46 |
|
T26 |
55 |
|
T98 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T22 |
51 |
|
T26 |
50 |
|
T98 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T22 |
46 |
|
T26 |
53 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T22 |
50 |
|
T26 |
50 |
|
T98 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T22 |
44 |
|
T26 |
53 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T22 |
48 |
|
T26 |
49 |
|
T98 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T22 |
43 |
|
T26 |
53 |
|
T98 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
22 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T22 |
47 |
|
T26 |
48 |
|
T98 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T22 |
43 |
|
T26 |
50 |
|
T98 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T22 |
47 |
|
T26 |
45 |
|
T98 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T22 |
42 |
|
T26 |
49 |
|
T98 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T22 |
47 |
|
T26 |
43 |
|
T98 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T22 |
41 |
|
T26 |
46 |
|
T98 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T22 |
47 |
|
T26 |
43 |
|
T98 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T22 |
40 |
|
T26 |
45 |
|
T98 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
45 |
|
T26 |
43 |
|
T98 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T22 |
38 |
|
T26 |
44 |
|
T98 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T22 |
44 |
|
T26 |
43 |
|
T98 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T22 |
38 |
|
T26 |
44 |
|
T98 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T22 |
43 |
|
T26 |
43 |
|
T98 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
21 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T22 |
41 |
|
T26 |
43 |
|
T98 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T22 |
36 |
|
T26 |
41 |
|
T98 |
43 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54444 |
1 |
|
|
T22 |
2306 |
|
T26 |
1206 |
|
T98 |
1670 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53625 |
1 |
|
|
T22 |
1481 |
|
T26 |
2265 |
|
T98 |
696 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51575 |
1 |
|
|
T22 |
1281 |
|
T26 |
792 |
|
T98 |
1820 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45281 |
1 |
|
|
T22 |
687 |
|
T26 |
1622 |
|
T98 |
1510 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T22 |
35 |
|
T26 |
73 |
|
T98 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T22 |
38 |
|
T26 |
75 |
|
T98 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T22 |
35 |
|
T26 |
72 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T22 |
38 |
|
T26 |
73 |
|
T98 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T22 |
35 |
|
T26 |
69 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T22 |
38 |
|
T26 |
70 |
|
T98 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T22 |
34 |
|
T26 |
68 |
|
T98 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T22 |
38 |
|
T26 |
69 |
|
T98 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T22 |
34 |
|
T26 |
67 |
|
T98 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T22 |
35 |
|
T26 |
69 |
|
T98 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T22 |
34 |
|
T26 |
65 |
|
T98 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T22 |
34 |
|
T26 |
67 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T22 |
33 |
|
T26 |
65 |
|
T98 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T22 |
33 |
|
T26 |
67 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T22 |
32 |
|
T26 |
63 |
|
T98 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
25 |
|
T26 |
11 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
32 |
|
T26 |
67 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
31 |
|
T26 |
60 |
|
T98 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T22 |
32 |
|
T26 |
65 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T22 |
31 |
|
T26 |
58 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T22 |
32 |
|
T26 |
64 |
|
T98 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T22 |
31 |
|
T26 |
57 |
|
T98 |
23 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T22 |
30 |
|
T26 |
63 |
|
T98 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T22 |
31 |
|
T26 |
55 |
|
T98 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T22 |
30 |
|
T26 |
63 |
|
T98 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T22 |
31 |
|
T26 |
53 |
|
T98 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T22 |
29 |
|
T26 |
59 |
|
T98 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T22 |
29 |
|
T26 |
53 |
|
T98 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T22 |
27 |
|
T26 |
58 |
|
T98 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
29 |
|
T26 |
13 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T22 |
29 |
|
T26 |
51 |
|
T98 |
22 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
10 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T22 |
26 |
|
T26 |
56 |
|
T98 |
25 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60516 |
1 |
|
|
T22 |
2094 |
|
T26 |
2514 |
|
T98 |
1105 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45649 |
1 |
|
|
T22 |
929 |
|
T26 |
985 |
|
T98 |
1235 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54428 |
1 |
|
|
T22 |
1366 |
|
T26 |
1158 |
|
T98 |
1790 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42567 |
1 |
|
|
T22 |
1122 |
|
T26 |
1152 |
|
T98 |
1134 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T22 |
49 |
|
T26 |
58 |
|
T98 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T22 |
53 |
|
T26 |
59 |
|
T98 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T22 |
49 |
|
T26 |
58 |
|
T98 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T22 |
52 |
|
T26 |
59 |
|
T98 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T22 |
46 |
|
T26 |
57 |
|
T98 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T22 |
51 |
|
T26 |
55 |
|
T98 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T22 |
45 |
|
T26 |
55 |
|
T98 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T22 |
50 |
|
T26 |
54 |
|
T98 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T22 |
44 |
|
T26 |
54 |
|
T98 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T22 |
49 |
|
T26 |
54 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T22 |
44 |
|
T26 |
54 |
|
T98 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
49 |
|
T26 |
53 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T22 |
44 |
|
T26 |
54 |
|
T98 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T22 |
48 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T22 |
44 |
|
T26 |
52 |
|
T98 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
20 |
|
T26 |
27 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
47 |
|
T26 |
52 |
|
T98 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T22 |
43 |
|
T26 |
49 |
|
T98 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T22 |
46 |
|
T26 |
52 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T22 |
42 |
|
T26 |
46 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T22 |
46 |
|
T26 |
51 |
|
T98 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T22 |
46 |
|
T26 |
50 |
|
T98 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T22 |
41 |
|
T26 |
43 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
40 |
|
T26 |
40 |
|
T98 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T22 |
38 |
|
T26 |
40 |
|
T98 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T22 |
24 |
|
T26 |
28 |
|
T98 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T22 |
35 |
|
T26 |
39 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T22 |
20 |
|
T26 |
26 |
|
T98 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T22 |
43 |
|
T26 |
46 |
|
T98 |
37 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50986 |
1 |
|
|
T22 |
1635 |
|
T26 |
1334 |
|
T98 |
1119 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42101 |
1 |
|
|
T22 |
927 |
|
T26 |
1046 |
|
T98 |
1589 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61178 |
1 |
|
|
T22 |
1917 |
|
T26 |
2558 |
|
T98 |
1666 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49713 |
1 |
|
|
T22 |
1242 |
|
T26 |
1369 |
|
T98 |
992 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T22 |
45 |
|
T26 |
55 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T22 |
41 |
|
T26 |
46 |
|
T98 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T22 |
45 |
|
T26 |
55 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T22 |
44 |
|
T26 |
53 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
43 |
|
T26 |
53 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T22 |
42 |
|
T26 |
52 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T22 |
36 |
|
T26 |
39 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T22 |
40 |
|
T26 |
51 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T22 |
36 |
|
T26 |
39 |
|
T98 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T22 |
40 |
|
T26 |
50 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
23 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
36 |
|
T26 |
38 |
|
T98 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
22 |
|
T26 |
14 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T22 |
40 |
|
T26 |
49 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T22 |
36 |
|
T26 |
37 |
|
T98 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T22 |
40 |
|
T26 |
49 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T22 |
36 |
|
T26 |
36 |
|
T98 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T22 |
35 |
|
T26 |
36 |
|
T98 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T22 |
34 |
|
T26 |
36 |
|
T98 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T22 |
34 |
|
T26 |
35 |
|
T98 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T22 |
38 |
|
T26 |
47 |
|
T98 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
33 |
|
T26 |
34 |
|
T98 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T22 |
38 |
|
T26 |
47 |
|
T98 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
22 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T22 |
32 |
|
T26 |
32 |
|
T98 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
22 |
|
T26 |
13 |
|
T98 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T22 |
37 |
|
T26 |
46 |
|
T98 |
37 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55495 |
1 |
|
|
T22 |
1526 |
|
T26 |
1448 |
|
T98 |
1359 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46500 |
1 |
|
|
T22 |
1240 |
|
T26 |
907 |
|
T98 |
1271 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55275 |
1 |
|
|
T22 |
2137 |
|
T26 |
1871 |
|
T98 |
1699 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46475 |
1 |
|
|
T22 |
821 |
|
T26 |
1881 |
|
T98 |
1267 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T22 |
44 |
|
T26 |
46 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T22 |
47 |
|
T26 |
44 |
|
T98 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T22 |
44 |
|
T26 |
45 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T22 |
47 |
|
T26 |
44 |
|
T98 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T22 |
44 |
|
T26 |
44 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T22 |
44 |
|
T26 |
43 |
|
T98 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T22 |
42 |
|
T26 |
44 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T22 |
43 |
|
T26 |
43 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T22 |
42 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T22 |
39 |
|
T26 |
44 |
|
T98 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T22 |
40 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T22 |
37 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T22 |
37 |
|
T26 |
41 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
21 |
|
T26 |
29 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T22 |
37 |
|
T26 |
41 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T22 |
34 |
|
T26 |
42 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
37 |
|
T26 |
40 |
|
T98 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T22 |
34 |
|
T26 |
41 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T22 |
37 |
|
T26 |
40 |
|
T98 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T22 |
33 |
|
T26 |
39 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T22 |
32 |
|
T26 |
37 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
36 |
|
T26 |
38 |
|
T98 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
30 |
|
T26 |
36 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T22 |
36 |
|
T26 |
36 |
|
T98 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
30 |
|
T26 |
35 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
24 |
|
T26 |
26 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
36 |
|
T26 |
36 |
|
T98 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
21 |
|
T26 |
28 |
|
T98 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T22 |
28 |
|
T26 |
34 |
|
T98 |
40 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56317 |
1 |
|
|
T22 |
1593 |
|
T26 |
1103 |
|
T98 |
1914 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48427 |
1 |
|
|
T22 |
1219 |
|
T26 |
1951 |
|
T98 |
1570 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56662 |
1 |
|
|
T22 |
1470 |
|
T26 |
1482 |
|
T98 |
1154 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43283 |
1 |
|
|
T22 |
1249 |
|
T26 |
1320 |
|
T98 |
1153 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T22 |
58 |
|
T26 |
59 |
|
T98 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T22 |
57 |
|
T26 |
56 |
|
T98 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T22 |
58 |
|
T26 |
56 |
|
T98 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T22 |
53 |
|
T26 |
56 |
|
T98 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T22 |
56 |
|
T26 |
55 |
|
T98 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T22 |
51 |
|
T26 |
54 |
|
T98 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T22 |
56 |
|
T26 |
54 |
|
T98 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T22 |
50 |
|
T26 |
52 |
|
T98 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T22 |
55 |
|
T26 |
52 |
|
T98 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T22 |
49 |
|
T26 |
49 |
|
T98 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
53 |
|
T26 |
51 |
|
T98 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T22 |
48 |
|
T26 |
48 |
|
T98 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T22 |
51 |
|
T26 |
49 |
|
T98 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
47 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T22 |
51 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
45 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T22 |
50 |
|
T26 |
47 |
|
T98 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T22 |
48 |
|
T26 |
47 |
|
T98 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T22 |
44 |
|
T26 |
47 |
|
T98 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T22 |
46 |
|
T26 |
47 |
|
T98 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
43 |
|
T26 |
46 |
|
T98 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T22 |
40 |
|
T26 |
45 |
|
T98 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T22 |
43 |
|
T26 |
45 |
|
T98 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T22 |
39 |
|
T26 |
44 |
|
T98 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T22 |
42 |
|
T26 |
45 |
|
T98 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T22 |
38 |
|
T26 |
44 |
|
T98 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T22 |
42 |
|
T26 |
42 |
|
T98 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
29 |
|
T98 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T22 |
38 |
|
T26 |
43 |
|
T98 |
33 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61940 |
1 |
|
|
T22 |
1497 |
|
T26 |
1439 |
|
T98 |
1447 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42954 |
1 |
|
|
T22 |
945 |
|
T26 |
2002 |
|
T98 |
1576 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59881 |
1 |
|
|
T22 |
2381 |
|
T26 |
1489 |
|
T98 |
1842 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40918 |
1 |
|
|
T22 |
881 |
|
T26 |
1065 |
|
T98 |
763 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T22 |
41 |
|
T26 |
58 |
|
T98 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T22 |
39 |
|
T26 |
60 |
|
T98 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
39 |
|
T26 |
57 |
|
T98 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T22 |
39 |
|
T26 |
59 |
|
T98 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T22 |
38 |
|
T26 |
56 |
|
T98 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T22 |
39 |
|
T26 |
57 |
|
T98 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T22 |
38 |
|
T26 |
55 |
|
T98 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T22 |
39 |
|
T26 |
55 |
|
T98 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T22 |
38 |
|
T26 |
55 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T22 |
38 |
|
T26 |
55 |
|
T98 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T22 |
37 |
|
T26 |
54 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T22 |
37 |
|
T26 |
53 |
|
T98 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T22 |
37 |
|
T26 |
54 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T22 |
37 |
|
T26 |
51 |
|
T98 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T22 |
37 |
|
T26 |
54 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T22 |
36 |
|
T26 |
49 |
|
T98 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T22 |
35 |
|
T26 |
52 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T22 |
36 |
|
T26 |
49 |
|
T98 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T22 |
34 |
|
T26 |
52 |
|
T98 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T22 |
36 |
|
T26 |
47 |
|
T98 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T22 |
34 |
|
T26 |
52 |
|
T98 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
36 |
|
T26 |
45 |
|
T98 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T22 |
34 |
|
T26 |
50 |
|
T98 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T22 |
35 |
|
T26 |
43 |
|
T98 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T22 |
34 |
|
T26 |
47 |
|
T98 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T22 |
34 |
|
T26 |
41 |
|
T98 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T22 |
33 |
|
T26 |
46 |
|
T98 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T22 |
33 |
|
T26 |
40 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T22 |
32 |
|
T26 |
42 |
|
T98 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T22 |
26 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T22 |
33 |
|
T26 |
39 |
|
T98 |
28 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52455 |
1 |
|
|
T22 |
1610 |
|
T26 |
1325 |
|
T98 |
1115 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46891 |
1 |
|
|
T22 |
1087 |
|
T26 |
1335 |
|
T98 |
1178 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59636 |
1 |
|
|
T22 |
2199 |
|
T26 |
2027 |
|
T98 |
1180 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44936 |
1 |
|
|
T22 |
802 |
|
T26 |
1412 |
|
T98 |
1878 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T22 |
42 |
|
T26 |
60 |
|
T98 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T22 |
41 |
|
T26 |
59 |
|
T98 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T22 |
42 |
|
T26 |
58 |
|
T98 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T22 |
41 |
|
T26 |
57 |
|
T98 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T22 |
42 |
|
T26 |
57 |
|
T98 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T22 |
40 |
|
T26 |
56 |
|
T98 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T22 |
41 |
|
T26 |
56 |
|
T98 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T22 |
40 |
|
T26 |
55 |
|
T98 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T22 |
39 |
|
T26 |
56 |
|
T98 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T22 |
35 |
|
T26 |
55 |
|
T98 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T22 |
38 |
|
T26 |
53 |
|
T98 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T22 |
33 |
|
T26 |
54 |
|
T98 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T22 |
36 |
|
T26 |
53 |
|
T98 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T22 |
33 |
|
T26 |
53 |
|
T98 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
36 |
|
T26 |
51 |
|
T98 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
32 |
|
T26 |
53 |
|
T98 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T22 |
35 |
|
T26 |
49 |
|
T98 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T22 |
31 |
|
T26 |
52 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T22 |
35 |
|
T26 |
48 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T22 |
30 |
|
T26 |
49 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T22 |
34 |
|
T26 |
47 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T22 |
29 |
|
T26 |
47 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T22 |
34 |
|
T26 |
47 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T22 |
29 |
|
T26 |
46 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T22 |
34 |
|
T26 |
47 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T22 |
28 |
|
T26 |
45 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T22 |
34 |
|
T26 |
46 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T22 |
26 |
|
T26 |
45 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
16 |
|
T98 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T22 |
33 |
|
T26 |
44 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T22 |
26 |
|
T26 |
45 |
|
T98 |
37 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56675 |
1 |
|
|
T22 |
1654 |
|
T26 |
2335 |
|
T98 |
1028 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49348 |
1 |
|
|
T22 |
874 |
|
T26 |
1256 |
|
T98 |
1011 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55388 |
1 |
|
|
T22 |
2011 |
|
T26 |
1133 |
|
T98 |
2312 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42999 |
1 |
|
|
T22 |
1101 |
|
T26 |
1148 |
|
T98 |
1124 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T22 |
48 |
|
T26 |
62 |
|
T98 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T22 |
48 |
|
T26 |
66 |
|
T98 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T22 |
47 |
|
T26 |
60 |
|
T98 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T22 |
47 |
|
T26 |
66 |
|
T98 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T22 |
47 |
|
T26 |
59 |
|
T98 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T22 |
47 |
|
T26 |
65 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T22 |
47 |
|
T26 |
58 |
|
T98 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T22 |
47 |
|
T26 |
62 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
47 |
|
T26 |
58 |
|
T98 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T22 |
46 |
|
T26 |
61 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T22 |
47 |
|
T26 |
57 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T22 |
45 |
|
T26 |
61 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
46 |
|
T26 |
56 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T22 |
44 |
|
T26 |
60 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
20 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T22 |
46 |
|
T26 |
53 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T22 |
43 |
|
T26 |
56 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T22 |
46 |
|
T26 |
53 |
|
T98 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T22 |
43 |
|
T26 |
54 |
|
T98 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T22 |
43 |
|
T26 |
53 |
|
T98 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
41 |
|
T26 |
52 |
|
T98 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T22 |
43 |
|
T26 |
52 |
|
T98 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T22 |
40 |
|
T26 |
50 |
|
T98 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T22 |
41 |
|
T26 |
52 |
|
T98 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T22 |
40 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T22 |
39 |
|
T26 |
51 |
|
T98 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T22 |
39 |
|
T26 |
49 |
|
T98 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
23 |
|
T98 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
20 |
|
T26 |
19 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
39 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56763 |
1 |
|
|
T22 |
1479 |
|
T26 |
2536 |
|
T98 |
1620 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44593 |
1 |
|
|
T22 |
794 |
|
T26 |
1401 |
|
T98 |
1598 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61425 |
1 |
|
|
T22 |
1497 |
|
T26 |
1372 |
|
T98 |
1508 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40824 |
1 |
|
|
T22 |
1709 |
|
T26 |
901 |
|
T98 |
830 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T22 |
49 |
|
T26 |
52 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T22 |
51 |
|
T26 |
56 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T22 |
49 |
|
T26 |
50 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T22 |
48 |
|
T26 |
55 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T22 |
48 |
|
T26 |
49 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T22 |
47 |
|
T26 |
51 |
|
T98 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T22 |
47 |
|
T26 |
49 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T22 |
47 |
|
T26 |
49 |
|
T98 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T22 |
46 |
|
T26 |
49 |
|
T98 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
45 |
|
T26 |
48 |
|
T98 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
46 |
|
T26 |
46 |
|
T98 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T22 |
43 |
|
T26 |
47 |
|
T98 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T22 |
46 |
|
T26 |
45 |
|
T98 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
27 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T22 |
40 |
|
T26 |
47 |
|
T98 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
25 |
|
T26 |
17 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T22 |
45 |
|
T26 |
45 |
|
T98 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T22 |
38 |
|
T26 |
47 |
|
T98 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T22 |
45 |
|
T26 |
43 |
|
T98 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
38 |
|
T26 |
46 |
|
T98 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
44 |
|
T26 |
42 |
|
T98 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T22 |
37 |
|
T26 |
46 |
|
T98 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T22 |
43 |
|
T26 |
40 |
|
T98 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T22 |
37 |
|
T26 |
46 |
|
T98 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T22 |
42 |
|
T26 |
38 |
|
T98 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T22 |
33 |
|
T26 |
46 |
|
T98 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T22 |
42 |
|
T26 |
37 |
|
T98 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T22 |
33 |
|
T26 |
46 |
|
T98 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T22 |
42 |
|
T26 |
36 |
|
T98 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T22 |
32 |
|
T26 |
46 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
25 |
|
T26 |
16 |
|
T98 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T22 |
41 |
|
T26 |
34 |
|
T98 |
30 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58878 |
1 |
|
|
T22 |
1427 |
|
T26 |
970 |
|
T98 |
2114 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42299 |
1 |
|
|
T22 |
1220 |
|
T26 |
1142 |
|
T98 |
976 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57949 |
1 |
|
|
T22 |
1144 |
|
T26 |
1708 |
|
T98 |
1425 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44694 |
1 |
|
|
T22 |
1532 |
|
T26 |
2222 |
|
T98 |
1042 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T22 |
66 |
|
T26 |
61 |
|
T98 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T22 |
66 |
|
T26 |
58 |
|
T98 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T22 |
63 |
|
T26 |
59 |
|
T98 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T22 |
66 |
|
T26 |
58 |
|
T98 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T22 |
62 |
|
T26 |
58 |
|
T98 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T22 |
64 |
|
T26 |
57 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T22 |
62 |
|
T26 |
54 |
|
T98 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T22 |
63 |
|
T26 |
55 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T22 |
60 |
|
T26 |
54 |
|
T98 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T22 |
61 |
|
T26 |
54 |
|
T98 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T22 |
57 |
|
T26 |
52 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T22 |
60 |
|
T26 |
52 |
|
T98 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
56 |
|
T26 |
49 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
60 |
|
T26 |
52 |
|
T98 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T22 |
53 |
|
T26 |
47 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
17 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T22 |
58 |
|
T26 |
51 |
|
T98 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T22 |
52 |
|
T26 |
47 |
|
T98 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T22 |
58 |
|
T26 |
51 |
|
T98 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T22 |
49 |
|
T26 |
46 |
|
T98 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T22 |
58 |
|
T26 |
50 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T22 |
47 |
|
T26 |
45 |
|
T98 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T22 |
57 |
|
T26 |
49 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T22 |
47 |
|
T26 |
44 |
|
T98 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T22 |
57 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T22 |
45 |
|
T26 |
41 |
|
T98 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
55 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T22 |
45 |
|
T26 |
41 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T22 |
52 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
18 |
|
T26 |
18 |
|
T98 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T22 |
44 |
|
T26 |
41 |
|
T98 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
17 |
|
T26 |
21 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T22 |
51 |
|
T26 |
47 |
|
T98 |
34 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65234 |
1 |
|
|
T22 |
1250 |
|
T26 |
1242 |
|
T98 |
2077 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44397 |
1 |
|
|
T22 |
1081 |
|
T26 |
2244 |
|
T98 |
896 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52677 |
1 |
|
|
T22 |
1390 |
|
T26 |
1336 |
|
T98 |
1714 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40864 |
1 |
|
|
T22 |
1682 |
|
T26 |
1176 |
|
T98 |
1008 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T22 |
56 |
|
T26 |
61 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T22 |
51 |
|
T26 |
59 |
|
T98 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T22 |
56 |
|
T26 |
59 |
|
T98 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T22 |
48 |
|
T26 |
58 |
|
T98 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T22 |
56 |
|
T26 |
59 |
|
T98 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T22 |
47 |
|
T26 |
55 |
|
T98 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T22 |
56 |
|
T26 |
57 |
|
T98 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T22 |
46 |
|
T26 |
55 |
|
T98 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T22 |
55 |
|
T26 |
56 |
|
T98 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T22 |
45 |
|
T26 |
51 |
|
T98 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T22 |
55 |
|
T26 |
55 |
|
T98 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T22 |
44 |
|
T26 |
50 |
|
T98 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T22 |
53 |
|
T26 |
52 |
|
T98 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T22 |
42 |
|
T26 |
49 |
|
T98 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T22 |
50 |
|
T26 |
51 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
42 |
|
T26 |
49 |
|
T98 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T22 |
48 |
|
T26 |
48 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T22 |
41 |
|
T26 |
49 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T22 |
47 |
|
T26 |
48 |
|
T98 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
39 |
|
T26 |
48 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T22 |
47 |
|
T26 |
47 |
|
T98 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T22 |
37 |
|
T26 |
47 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T22 |
47 |
|
T26 |
47 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T22 |
36 |
|
T26 |
46 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
44 |
|
T26 |
47 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T22 |
36 |
|
T26 |
45 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
42 |
|
T26 |
46 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T22 |
34 |
|
T26 |
43 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
20 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T22 |
41 |
|
T26 |
46 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
28 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T22 |
33 |
|
T26 |
41 |
|
T98 |
33 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59232 |
1 |
|
|
T22 |
1609 |
|
T26 |
2744 |
|
T98 |
1173 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46458 |
1 |
|
|
T22 |
1126 |
|
T26 |
1117 |
|
T98 |
1741 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52620 |
1 |
|
|
T22 |
1286 |
|
T26 |
1284 |
|
T98 |
1234 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46037 |
1 |
|
|
T22 |
1700 |
|
T26 |
1079 |
|
T98 |
1425 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T22 |
45 |
|
T26 |
49 |
|
T98 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T22 |
47 |
|
T26 |
50 |
|
T98 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T22 |
45 |
|
T26 |
48 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T22 |
45 |
|
T26 |
49 |
|
T98 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T22 |
44 |
|
T26 |
47 |
|
T98 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T22 |
43 |
|
T26 |
46 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T22 |
44 |
|
T26 |
46 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
42 |
|
T26 |
46 |
|
T98 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T22 |
43 |
|
T26 |
45 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
42 |
|
T26 |
46 |
|
T98 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T22 |
39 |
|
T26 |
42 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T22 |
41 |
|
T26 |
45 |
|
T98 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T22 |
38 |
|
T26 |
42 |
|
T98 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T22 |
41 |
|
T26 |
45 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
20 |
|
T26 |
21 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T22 |
40 |
|
T26 |
43 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T22 |
36 |
|
T26 |
41 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T22 |
35 |
|
T26 |
38 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
39 |
|
T26 |
42 |
|
T98 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
34 |
|
T26 |
37 |
|
T98 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T22 |
39 |
|
T26 |
40 |
|
T98 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T22 |
34 |
|
T26 |
36 |
|
T98 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T22 |
38 |
|
T26 |
40 |
|
T98 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T22 |
32 |
|
T26 |
36 |
|
T98 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
22 |
|
T26 |
22 |
|
T98 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T22 |
36 |
|
T26 |
38 |
|
T98 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
20 |
|
T98 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T22 |
32 |
|
T26 |
35 |
|
T98 |
44 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55371 |
1 |
|
|
T22 |
1724 |
|
T26 |
1610 |
|
T98 |
1876 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44318 |
1 |
|
|
T22 |
1332 |
|
T26 |
1301 |
|
T98 |
1044 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58427 |
1 |
|
|
T22 |
1075 |
|
T26 |
1160 |
|
T98 |
1762 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45400 |
1 |
|
|
T22 |
1212 |
|
T26 |
2012 |
|
T98 |
1003 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T22 |
62 |
|
T26 |
55 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T22 |
65 |
|
T26 |
55 |
|
T98 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T22 |
62 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T22 |
65 |
|
T26 |
54 |
|
T98 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T22 |
60 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T22 |
65 |
|
T26 |
51 |
|
T98 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T22 |
58 |
|
T26 |
52 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T22 |
64 |
|
T26 |
50 |
|
T98 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T22 |
58 |
|
T26 |
49 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T22 |
63 |
|
T26 |
49 |
|
T98 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T22 |
57 |
|
T26 |
49 |
|
T98 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T22 |
61 |
|
T26 |
46 |
|
T98 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T22 |
56 |
|
T26 |
47 |
|
T98 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T22 |
60 |
|
T26 |
46 |
|
T98 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T22 |
55 |
|
T26 |
47 |
|
T98 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T22 |
58 |
|
T26 |
44 |
|
T98 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
53 |
|
T26 |
45 |
|
T98 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
57 |
|
T26 |
43 |
|
T98 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T22 |
52 |
|
T26 |
44 |
|
T98 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T22 |
53 |
|
T26 |
43 |
|
T98 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
52 |
|
T26 |
44 |
|
T98 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
53 |
|
T26 |
42 |
|
T98 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T22 |
51 |
|
T26 |
44 |
|
T98 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T22 |
51 |
|
T26 |
42 |
|
T98 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T22 |
51 |
|
T26 |
44 |
|
T98 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T22 |
51 |
|
T26 |
41 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
51 |
|
T26 |
41 |
|
T98 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T22 |
48 |
|
T26 |
41 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T22 |
50 |
|
T26 |
41 |
|
T98 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
15 |
|
T26 |
23 |
|
T98 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T22 |
47 |
|
T26 |
39 |
|
T98 |
27 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57863 |
1 |
|
|
T22 |
1524 |
|
T26 |
1959 |
|
T98 |
1587 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46368 |
1 |
|
|
T22 |
740 |
|
T26 |
1459 |
|
T98 |
1750 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59359 |
1 |
|
|
T22 |
2238 |
|
T26 |
1241 |
|
T98 |
1165 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41288 |
1 |
|
|
T22 |
1048 |
|
T26 |
1246 |
|
T98 |
976 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T22 |
46 |
|
T26 |
59 |
|
T98 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T22 |
46 |
|
T26 |
61 |
|
T98 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T22 |
44 |
|
T26 |
58 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T22 |
44 |
|
T26 |
61 |
|
T98 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T22 |
43 |
|
T26 |
57 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
40 |
|
T26 |
56 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T22 |
40 |
|
T26 |
56 |
|
T98 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T22 |
43 |
|
T26 |
59 |
|
T98 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T22 |
40 |
|
T26 |
53 |
|
T98 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T22 |
43 |
|
T26 |
57 |
|
T98 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
39 |
|
T26 |
53 |
|
T98 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T22 |
43 |
|
T26 |
57 |
|
T98 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
38 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
27 |
|
T26 |
20 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T22 |
42 |
|
T26 |
56 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
37 |
|
T26 |
53 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T22 |
40 |
|
T26 |
56 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T22 |
37 |
|
T26 |
53 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
40 |
|
T26 |
54 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T22 |
36 |
|
T26 |
52 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T22 |
39 |
|
T26 |
51 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
35 |
|
T26 |
51 |
|
T98 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T22 |
38 |
|
T26 |
50 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T22 |
33 |
|
T26 |
51 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T22 |
38 |
|
T26 |
49 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T22 |
32 |
|
T26 |
50 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T22 |
36 |
|
T26 |
46 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T22 |
27 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T22 |
29 |
|
T26 |
47 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
27 |
|
T26 |
19 |
|
T98 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T22 |
35 |
|
T26 |
45 |
|
T98 |
36 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52653 |
1 |
|
|
T22 |
1467 |
|
T26 |
1971 |
|
T98 |
1826 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46905 |
1 |
|
|
T22 |
1284 |
|
T26 |
1357 |
|
T98 |
1129 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65719 |
1 |
|
|
T22 |
1713 |
|
T26 |
1209 |
|
T98 |
1326 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39653 |
1 |
|
|
T22 |
1023 |
|
T26 |
1326 |
|
T98 |
1058 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T22 |
48 |
|
T26 |
68 |
|
T98 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T22 |
49 |
|
T26 |
63 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T22 |
48 |
|
T26 |
67 |
|
T98 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T22 |
47 |
|
T26 |
61 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T22 |
48 |
|
T26 |
66 |
|
T98 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T22 |
47 |
|
T26 |
60 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T22 |
48 |
|
T26 |
65 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T22 |
46 |
|
T26 |
59 |
|
T98 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T22 |
48 |
|
T26 |
64 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T22 |
44 |
|
T26 |
57 |
|
T98 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T22 |
48 |
|
T26 |
64 |
|
T98 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T22 |
39 |
|
T26 |
55 |
|
T98 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
48 |
|
T26 |
61 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T22 |
38 |
|
T26 |
54 |
|
T98 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
27 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T22 |
47 |
|
T26 |
58 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T22 |
38 |
|
T26 |
54 |
|
T98 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T22 |
45 |
|
T26 |
57 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T22 |
38 |
|
T26 |
53 |
|
T98 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T22 |
45 |
|
T26 |
56 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T22 |
36 |
|
T26 |
50 |
|
T98 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
45 |
|
T26 |
55 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T22 |
34 |
|
T26 |
48 |
|
T98 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T22 |
43 |
|
T26 |
50 |
|
T98 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T22 |
33 |
|
T26 |
48 |
|
T98 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T22 |
43 |
|
T26 |
50 |
|
T98 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T22 |
32 |
|
T26 |
46 |
|
T98 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T22 |
42 |
|
T26 |
48 |
|
T98 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T22 |
30 |
|
T26 |
45 |
|
T98 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T22 |
40 |
|
T26 |
47 |
|
T98 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T22 |
26 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T22 |
30 |
|
T26 |
45 |
|
T98 |
35 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51797 |
1 |
|
|
T22 |
1133 |
|
T26 |
1706 |
|
T98 |
1355 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44223 |
1 |
|
|
T22 |
1740 |
|
T26 |
1009 |
|
T98 |
1109 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58800 |
1 |
|
|
T22 |
1744 |
|
T26 |
1557 |
|
T98 |
2251 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50035 |
1 |
|
|
T22 |
1033 |
|
T26 |
2163 |
|
T98 |
1008 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T22 |
51 |
|
T26 |
43 |
|
T98 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T22 |
51 |
|
T26 |
43 |
|
T98 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T22 |
51 |
|
T26 |
43 |
|
T98 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T22 |
41 |
|
T26 |
43 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T22 |
51 |
|
T26 |
41 |
|
T98 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T22 |
41 |
|
T26 |
43 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T22 |
50 |
|
T26 |
41 |
|
T98 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T22 |
38 |
|
T26 |
43 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T22 |
49 |
|
T26 |
40 |
|
T98 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
38 |
|
T26 |
42 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T22 |
49 |
|
T26 |
39 |
|
T98 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T22 |
37 |
|
T26 |
40 |
|
T98 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
17 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T22 |
48 |
|
T26 |
37 |
|
T98 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T22 |
26 |
|
T26 |
19 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T22 |
46 |
|
T26 |
36 |
|
T98 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
46 |
|
T26 |
36 |
|
T98 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T22 |
37 |
|
T26 |
38 |
|
T98 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T22 |
45 |
|
T26 |
35 |
|
T98 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T22 |
34 |
|
T26 |
36 |
|
T98 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T22 |
44 |
|
T26 |
34 |
|
T98 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
33 |
|
T26 |
36 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T22 |
43 |
|
T26 |
32 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T22 |
31 |
|
T26 |
36 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T22 |
42 |
|
T26 |
32 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T22 |
31 |
|
T26 |
35 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
16 |
|
T26 |
19 |
|
T98 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T22 |
41 |
|
T26 |
30 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
26 |
|
T26 |
18 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T22 |
30 |
|
T26 |
34 |
|
T98 |
27 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53052 |
1 |
|
|
T22 |
1372 |
|
T26 |
2108 |
|
T98 |
1333 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46487 |
1 |
|
|
T22 |
1884 |
|
T26 |
883 |
|
T98 |
1697 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57424 |
1 |
|
|
T22 |
1212 |
|
T26 |
2575 |
|
T98 |
1394 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46593 |
1 |
|
|
T22 |
1002 |
|
T26 |
861 |
|
T98 |
1047 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T22 |
58 |
|
T26 |
37 |
|
T98 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T22 |
56 |
|
T26 |
40 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T22 |
57 |
|
T26 |
36 |
|
T98 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T22 |
56 |
|
T26 |
39 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T22 |
56 |
|
T26 |
34 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T22 |
55 |
|
T26 |
38 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T22 |
56 |
|
T26 |
34 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T22 |
55 |
|
T26 |
38 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T22 |
54 |
|
T26 |
34 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T22 |
53 |
|
T26 |
38 |
|
T98 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T22 |
52 |
|
T26 |
34 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T22 |
53 |
|
T26 |
38 |
|
T98 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T22 |
51 |
|
T26 |
34 |
|
T98 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T22 |
52 |
|
T26 |
38 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T22 |
50 |
|
T26 |
34 |
|
T98 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
52 |
|
T26 |
38 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
50 |
|
T26 |
33 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T22 |
51 |
|
T26 |
38 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T22 |
49 |
|
T26 |
33 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T22 |
48 |
|
T26 |
38 |
|
T98 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T22 |
49 |
|
T26 |
29 |
|
T98 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T22 |
47 |
|
T26 |
36 |
|
T98 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T22 |
48 |
|
T26 |
29 |
|
T98 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T22 |
44 |
|
T26 |
34 |
|
T98 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T22 |
48 |
|
T26 |
29 |
|
T98 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
43 |
|
T26 |
33 |
|
T98 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T22 |
48 |
|
T26 |
27 |
|
T98 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T22 |
42 |
|
T26 |
33 |
|
T98 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
18 |
|
T26 |
24 |
|
T98 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T22 |
45 |
|
T26 |
26 |
|
T98 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
19 |
|
T26 |
22 |
|
T98 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T22 |
39 |
|
T26 |
33 |
|
T98 |
35 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56170 |
1 |
|
|
T22 |
1459 |
|
T26 |
1574 |
|
T98 |
1308 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45475 |
1 |
|
|
T22 |
1954 |
|
T26 |
1787 |
|
T98 |
1854 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55187 |
1 |
|
|
T22 |
1296 |
|
T26 |
1490 |
|
T98 |
1536 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46824 |
1 |
|
|
T22 |
964 |
|
T26 |
1191 |
|
T98 |
888 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T22 |
56 |
|
T26 |
50 |
|
T98 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T22 |
52 |
|
T26 |
51 |
|
T98 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T22 |
56 |
|
T26 |
48 |
|
T98 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T22 |
49 |
|
T26 |
51 |
|
T98 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T22 |
55 |
|
T26 |
45 |
|
T98 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T22 |
48 |
|
T26 |
51 |
|
T98 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T22 |
52 |
|
T26 |
45 |
|
T98 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T22 |
46 |
|
T26 |
51 |
|
T98 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T22 |
52 |
|
T26 |
45 |
|
T98 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T22 |
44 |
|
T26 |
51 |
|
T98 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T22 |
51 |
|
T26 |
45 |
|
T98 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T22 |
43 |
|
T26 |
51 |
|
T98 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T22 |
48 |
|
T26 |
44 |
|
T98 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T22 |
43 |
|
T26 |
51 |
|
T98 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T22 |
47 |
|
T26 |
44 |
|
T98 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T22 |
19 |
|
T26 |
25 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T22 |
41 |
|
T26 |
51 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T22 |
47 |
|
T26 |
43 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T22 |
40 |
|
T26 |
50 |
|
T98 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T22 |
47 |
|
T26 |
41 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T22 |
37 |
|
T26 |
48 |
|
T98 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T22 |
47 |
|
T26 |
40 |
|
T98 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T22 |
36 |
|
T26 |
44 |
|
T98 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T22 |
46 |
|
T26 |
40 |
|
T98 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T22 |
33 |
|
T26 |
41 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
45 |
|
T26 |
38 |
|
T98 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T22 |
33 |
|
T26 |
41 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T22 |
45 |
|
T26 |
38 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T22 |
31 |
|
T26 |
39 |
|
T98 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
16 |
|
T26 |
26 |
|
T98 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
44 |
|
T26 |
38 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T22 |
19 |
|
T26 |
24 |
|
T98 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T22 |
30 |
|
T26 |
37 |
|
T98 |
34 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51864 |
1 |
|
|
T22 |
1796 |
|
T26 |
1287 |
|
T98 |
2066 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43317 |
1 |
|
|
T22 |
882 |
|
T26 |
1066 |
|
T98 |
799 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57749 |
1 |
|
|
T22 |
1244 |
|
T26 |
1544 |
|
T98 |
1786 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50419 |
1 |
|
|
T22 |
1628 |
|
T26 |
2244 |
|
T98 |
1044 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T22 |
48 |
|
T26 |
52 |
|
T98 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T22 |
53 |
|
T26 |
53 |
|
T98 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T22 |
47 |
|
T26 |
52 |
|
T98 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T22 |
51 |
|
T26 |
52 |
|
T98 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T22 |
46 |
|
T26 |
51 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T22 |
51 |
|
T26 |
52 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T22 |
50 |
|
T26 |
52 |
|
T98 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T22 |
46 |
|
T26 |
47 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T22 |
49 |
|
T26 |
50 |
|
T98 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T22 |
46 |
|
T26 |
47 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T22 |
47 |
|
T26 |
50 |
|
T98 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T22 |
45 |
|
T26 |
44 |
|
T98 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T22 |
45 |
|
T26 |
43 |
|
T98 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T22 |
42 |
|
T26 |
49 |
|
T98 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T22 |
42 |
|
T26 |
42 |
|
T98 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T22 |
41 |
|
T26 |
49 |
|
T98 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T22 |
41 |
|
T26 |
42 |
|
T98 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T22 |
39 |
|
T26 |
48 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T22 |
41 |
|
T26 |
41 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T22 |
38 |
|
T26 |
45 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T22 |
40 |
|
T26 |
40 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T22 |
38 |
|
T26 |
45 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
37 |
|
T26 |
38 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T22 |
35 |
|
T26 |
45 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T22 |
35 |
|
T26 |
36 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T22 |
35 |
|
T26 |
45 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
26 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T22 |
33 |
|
T26 |
35 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
21 |
|
T26 |
20 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T22 |
35 |
|
T26 |
45 |
|
T98 |
27 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54944 |
1 |
|
|
T22 |
1573 |
|
T26 |
2169 |
|
T98 |
2092 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43150 |
1 |
|
|
T22 |
1156 |
|
T26 |
1298 |
|
T98 |
1163 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58985 |
1 |
|
|
T22 |
1788 |
|
T26 |
1454 |
|
T98 |
986 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47394 |
1 |
|
|
T22 |
1110 |
|
T26 |
1003 |
|
T98 |
1101 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T22 |
51 |
|
T26 |
61 |
|
T98 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T22 |
50 |
|
T26 |
57 |
|
T98 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T22 |
48 |
|
T26 |
60 |
|
T98 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T22 |
50 |
|
T26 |
56 |
|
T98 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T22 |
47 |
|
T26 |
58 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T22 |
50 |
|
T26 |
55 |
|
T98 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T22 |
46 |
|
T26 |
58 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T22 |
48 |
|
T26 |
53 |
|
T98 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T22 |
45 |
|
T26 |
54 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T22 |
47 |
|
T26 |
52 |
|
T98 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T22 |
43 |
|
T26 |
54 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T22 |
45 |
|
T26 |
51 |
|
T98 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T22 |
42 |
|
T26 |
53 |
|
T98 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
44 |
|
T26 |
49 |
|
T98 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T22 |
41 |
|
T26 |
51 |
|
T98 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
44 |
|
T26 |
47 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T22 |
40 |
|
T26 |
51 |
|
T98 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T22 |
42 |
|
T26 |
47 |
|
T98 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T22 |
39 |
|
T26 |
50 |
|
T98 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T22 |
40 |
|
T26 |
47 |
|
T98 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
38 |
|
T26 |
46 |
|
T98 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T22 |
38 |
|
T26 |
43 |
|
T98 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T22 |
37 |
|
T26 |
46 |
|
T98 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T22 |
38 |
|
T26 |
41 |
|
T98 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
37 |
|
T26 |
46 |
|
T98 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T22 |
38 |
|
T26 |
41 |
|
T98 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T22 |
20 |
|
T26 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T22 |
36 |
|
T26 |
46 |
|
T98 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
22 |
|
T26 |
26 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
45 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54676 |
1 |
|
|
T22 |
1716 |
|
T26 |
2389 |
|
T98 |
1585 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47680 |
1 |
|
|
T22 |
1244 |
|
T26 |
1085 |
|
T98 |
1684 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52276 |
1 |
|
|
T22 |
1143 |
|
T26 |
1329 |
|
T98 |
1705 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49580 |
1 |
|
|
T22 |
1362 |
|
T26 |
1219 |
|
T98 |
687 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T22 |
58 |
|
T26 |
59 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T22 |
61 |
|
T26 |
57 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T22 |
55 |
|
T26 |
59 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T22 |
59 |
|
T26 |
57 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T22 |
53 |
|
T26 |
58 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T22 |
58 |
|
T26 |
56 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T22 |
51 |
|
T26 |
56 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T22 |
58 |
|
T26 |
56 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T22 |
48 |
|
T26 |
55 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T22 |
55 |
|
T26 |
55 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T22 |
47 |
|
T26 |
53 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T22 |
52 |
|
T26 |
53 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
45 |
|
T26 |
52 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T22 |
50 |
|
T26 |
53 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T22 |
43 |
|
T26 |
50 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T22 |
50 |
|
T26 |
53 |
|
T98 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T22 |
40 |
|
T26 |
50 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T22 |
49 |
|
T26 |
53 |
|
T98 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
40 |
|
T26 |
49 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
48 |
|
T26 |
53 |
|
T98 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T22 |
40 |
|
T26 |
47 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T22 |
48 |
|
T26 |
52 |
|
T98 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T22 |
40 |
|
T26 |
46 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T22 |
46 |
|
T26 |
51 |
|
T98 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T22 |
39 |
|
T26 |
46 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T22 |
46 |
|
T26 |
49 |
|
T98 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T22 |
39 |
|
T26 |
43 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T22 |
46 |
|
T26 |
49 |
|
T98 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
38 |
|
T26 |
43 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
20 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52133 |
1 |
|
|
T22 |
1198 |
|
T26 |
1552 |
|
T98 |
987 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45745 |
1 |
|
|
T22 |
1033 |
|
T26 |
1469 |
|
T98 |
861 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56333 |
1 |
|
|
T22 |
1772 |
|
T26 |
908 |
|
T98 |
1871 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50567 |
1 |
|
|
T22 |
1623 |
|
T26 |
2119 |
|
T98 |
1784 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T22 |
52 |
|
T26 |
65 |
|
T98 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T22 |
47 |
|
T26 |
66 |
|
T98 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T22 |
51 |
|
T26 |
62 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T22 |
47 |
|
T26 |
63 |
|
T98 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T22 |
51 |
|
T26 |
60 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T22 |
47 |
|
T26 |
60 |
|
T98 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T22 |
50 |
|
T26 |
60 |
|
T98 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T22 |
47 |
|
T26 |
59 |
|
T98 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
49 |
|
T26 |
59 |
|
T98 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
46 |
|
T26 |
59 |
|
T98 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T22 |
48 |
|
T26 |
58 |
|
T98 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T22 |
44 |
|
T26 |
57 |
|
T98 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T22 |
48 |
|
T26 |
58 |
|
T98 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
44 |
|
T26 |
56 |
|
T98 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T22 |
47 |
|
T26 |
56 |
|
T98 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
44 |
|
T26 |
52 |
|
T98 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
47 |
|
T26 |
55 |
|
T98 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T22 |
43 |
|
T26 |
48 |
|
T98 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T22 |
46 |
|
T26 |
53 |
|
T98 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T22 |
40 |
|
T26 |
47 |
|
T98 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T22 |
39 |
|
T26 |
46 |
|
T98 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T22 |
44 |
|
T26 |
49 |
|
T98 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T22 |
36 |
|
T26 |
46 |
|
T98 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
44 |
|
T26 |
49 |
|
T98 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T22 |
34 |
|
T26 |
46 |
|
T98 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T22 |
44 |
|
T26 |
49 |
|
T98 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T22 |
32 |
|
T26 |
45 |
|
T98 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T22 |
17 |
|
T26 |
16 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T22 |
43 |
|
T26 |
48 |
|
T98 |
34 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
22 |
|
T26 |
16 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T22 |
32 |
|
T26 |
43 |
|
T98 |
33 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57305 |
1 |
|
|
T22 |
1867 |
|
T26 |
1349 |
|
T98 |
1370 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46638 |
1 |
|
|
T22 |
1174 |
|
T26 |
1353 |
|
T98 |
731 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56077 |
1 |
|
|
T22 |
1337 |
|
T26 |
1986 |
|
T98 |
1538 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45184 |
1 |
|
|
T22 |
1253 |
|
T26 |
1418 |
|
T98 |
1882 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T22 |
54 |
|
T26 |
64 |
|
T98 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T22 |
55 |
|
T26 |
65 |
|
T98 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T22 |
54 |
|
T26 |
64 |
|
T98 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T22 |
52 |
|
T26 |
63 |
|
T98 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T22 |
52 |
|
T26 |
61 |
|
T98 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T22 |
52 |
|
T26 |
61 |
|
T98 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
52 |
|
T26 |
60 |
|
T98 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
51 |
|
T26 |
61 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T22 |
51 |
|
T26 |
58 |
|
T98 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T22 |
51 |
|
T26 |
60 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T22 |
51 |
|
T26 |
55 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
51 |
|
T26 |
59 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T22 |
51 |
|
T26 |
54 |
|
T98 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
48 |
|
T26 |
56 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
50 |
|
T26 |
54 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T22 |
48 |
|
T26 |
55 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T22 |
46 |
|
T26 |
50 |
|
T98 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T22 |
48 |
|
T26 |
55 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T22 |
46 |
|
T26 |
53 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T22 |
45 |
|
T26 |
53 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
42 |
|
T26 |
44 |
|
T98 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T22 |
44 |
|
T26 |
52 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T22 |
41 |
|
T26 |
42 |
|
T98 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T22 |
43 |
|
T26 |
51 |
|
T98 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T22 |
40 |
|
T26 |
40 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T22 |
42 |
|
T26 |
50 |
|
T98 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
17 |
|
T26 |
14 |
|
T98 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T22 |
40 |
|
T26 |
39 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T22 |
15 |
|
T26 |
14 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T22 |
41 |
|
T26 |
50 |
|
T98 |
38 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58314 |
1 |
|
|
T22 |
2300 |
|
T26 |
1144 |
|
T98 |
1403 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42132 |
1 |
|
|
T22 |
1004 |
|
T26 |
1125 |
|
T98 |
1625 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55693 |
1 |
|
|
T22 |
1644 |
|
T26 |
1418 |
|
T98 |
1270 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47516 |
1 |
|
|
T22 |
807 |
|
T26 |
2177 |
|
T98 |
1126 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T22 |
40 |
|
T26 |
57 |
|
T98 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T22 |
39 |
|
T26 |
57 |
|
T98 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T22 |
39 |
|
T26 |
57 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T22 |
43 |
|
T26 |
60 |
|
T98 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
39 |
|
T26 |
56 |
|
T98 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T22 |
41 |
|
T26 |
60 |
|
T98 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T22 |
38 |
|
T26 |
55 |
|
T98 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T22 |
41 |
|
T26 |
59 |
|
T98 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T22 |
37 |
|
T26 |
55 |
|
T98 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T22 |
38 |
|
T26 |
59 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T22 |
36 |
|
T26 |
53 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T22 |
37 |
|
T26 |
58 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T22 |
25 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T22 |
36 |
|
T26 |
53 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T22 |
21 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T22 |
37 |
|
T26 |
56 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
36 |
|
T26 |
52 |
|
T98 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T22 |
37 |
|
T26 |
55 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
36 |
|
T26 |
51 |
|
T98 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T22 |
35 |
|
T26 |
53 |
|
T98 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T22 |
36 |
|
T26 |
51 |
|
T98 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T22 |
34 |
|
T26 |
51 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
35 |
|
T26 |
49 |
|
T98 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T22 |
33 |
|
T26 |
50 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T22 |
34 |
|
T26 |
46 |
|
T98 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T22 |
32 |
|
T26 |
49 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T22 |
34 |
|
T26 |
45 |
|
T98 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T22 |
31 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T22 |
24 |
|
T26 |
24 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T22 |
33 |
|
T26 |
43 |
|
T98 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
21 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T22 |
31 |
|
T26 |
47 |
|
T98 |
36 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57803 |
1 |
|
|
T22 |
1161 |
|
T26 |
1413 |
|
T98 |
2107 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49144 |
1 |
|
|
T22 |
1754 |
|
T26 |
1260 |
|
T98 |
935 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54547 |
1 |
|
|
T22 |
1630 |
|
T26 |
2419 |
|
T98 |
1513 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42345 |
1 |
|
|
T22 |
1084 |
|
T26 |
1039 |
|
T98 |
995 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T22 |
54 |
|
T26 |
54 |
|
T98 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T22 |
54 |
|
T26 |
53 |
|
T98 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T22 |
54 |
|
T26 |
54 |
|
T98 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T22 |
51 |
|
T26 |
51 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T22 |
52 |
|
T26 |
53 |
|
T98 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T22 |
51 |
|
T26 |
51 |
|
T98 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T22 |
50 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T22 |
50 |
|
T26 |
49 |
|
T98 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T22 |
49 |
|
T26 |
53 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T22 |
49 |
|
T26 |
47 |
|
T98 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
47 |
|
T26 |
52 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
48 |
|
T26 |
47 |
|
T98 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T22 |
47 |
|
T26 |
51 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T22 |
48 |
|
T26 |
46 |
|
T98 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
19 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T22 |
18 |
|
T26 |
22 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
46 |
|
T26 |
45 |
|
T98 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T22 |
44 |
|
T26 |
50 |
|
T98 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T22 |
46 |
|
T26 |
42 |
|
T98 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T22 |
40 |
|
T26 |
49 |
|
T98 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T22 |
45 |
|
T26 |
39 |
|
T98 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
40 |
|
T26 |
48 |
|
T98 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T22 |
43 |
|
T26 |
38 |
|
T98 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T22 |
39 |
|
T26 |
46 |
|
T98 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T22 |
41 |
|
T26 |
38 |
|
T98 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
39 |
|
T26 |
45 |
|
T98 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T22 |
41 |
|
T26 |
36 |
|
T98 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T22 |
38 |
|
T26 |
45 |
|
T98 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T22 |
38 |
|
T26 |
35 |
|
T98 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
18 |
|
T26 |
20 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T22 |
38 |
|
T26 |
45 |
|
T98 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
18 |
|
T26 |
21 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T22 |
38 |
|
T26 |
33 |
|
T98 |
32 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59259 |
1 |
|
|
T22 |
1566 |
|
T26 |
1248 |
|
T98 |
1769 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49172 |
1 |
|
|
T22 |
1015 |
|
T26 |
1151 |
|
T98 |
622 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52866 |
1 |
|
|
T22 |
2219 |
|
T26 |
1885 |
|
T98 |
1840 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43088 |
1 |
|
|
T22 |
1032 |
|
T26 |
1747 |
|
T98 |
1415 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T22 |
35 |
|
T26 |
55 |
|
T98 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T22 |
40 |
|
T26 |
54 |
|
T98 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T22 |
35 |
|
T26 |
54 |
|
T98 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T22 |
40 |
|
T26 |
53 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T22 |
33 |
|
T26 |
54 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T22 |
40 |
|
T26 |
52 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T22 |
33 |
|
T26 |
53 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T22 |
40 |
|
T26 |
51 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T22 |
33 |
|
T26 |
50 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T22 |
39 |
|
T26 |
50 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
33 |
|
T26 |
48 |
|
T98 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T22 |
39 |
|
T26 |
49 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T22 |
32 |
|
T26 |
48 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T22 |
38 |
|
T26 |
48 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T22 |
32 |
|
T26 |
47 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T22 |
37 |
|
T26 |
48 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T22 |
32 |
|
T26 |
43 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T22 |
36 |
|
T26 |
47 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
31 |
|
T26 |
42 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T22 |
36 |
|
T26 |
46 |
|
T98 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T22 |
31 |
|
T26 |
41 |
|
T98 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
36 |
|
T26 |
44 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
30 |
|
T26 |
40 |
|
T98 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T22 |
36 |
|
T26 |
43 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
30 |
|
T26 |
40 |
|
T98 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T22 |
35 |
|
T26 |
42 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T22 |
28 |
|
T26 |
39 |
|
T98 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T22 |
34 |
|
T26 |
41 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T22 |
25 |
|
T26 |
23 |
|
T98 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T22 |
28 |
|
T26 |
39 |
|
T98 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
20 |
|
T26 |
25 |
|
T98 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T22 |
33 |
|
T26 |
40 |
|
T98 |
21 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54630 |
1 |
|
|
T22 |
1404 |
|
T26 |
2334 |
|
T98 |
2138 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49735 |
1 |
|
|
T22 |
1117 |
|
T26 |
1055 |
|
T98 |
1199 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58085 |
1 |
|
|
T22 |
1422 |
|
T26 |
1891 |
|
T98 |
1290 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41927 |
1 |
|
|
T22 |
1768 |
|
T26 |
912 |
|
T98 |
966 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T22 |
50 |
|
T26 |
48 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T22 |
45 |
|
T26 |
50 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T22 |
50 |
|
T26 |
46 |
|
T98 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T22 |
44 |
|
T26 |
48 |
|
T98 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T22 |
49 |
|
T26 |
45 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T22 |
43 |
|
T26 |
46 |
|
T98 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T22 |
48 |
|
T26 |
44 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T22 |
43 |
|
T26 |
45 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T22 |
46 |
|
T26 |
42 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
43 |
|
T26 |
45 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T22 |
46 |
|
T26 |
39 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T22 |
43 |
|
T26 |
44 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
45 |
|
T26 |
39 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T22 |
41 |
|
T26 |
43 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T22 |
44 |
|
T26 |
39 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
41 |
|
T26 |
42 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T22 |
43 |
|
T26 |
39 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T22 |
40 |
|
T26 |
42 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T22 |
42 |
|
T26 |
38 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T22 |
39 |
|
T26 |
41 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T22 |
40 |
|
T26 |
38 |
|
T98 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T22 |
39 |
|
T26 |
40 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T22 |
40 |
|
T26 |
35 |
|
T98 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T22 |
38 |
|
T26 |
39 |
|
T98 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T22 |
40 |
|
T26 |
35 |
|
T98 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T22 |
37 |
|
T26 |
39 |
|
T98 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T22 |
39 |
|
T26 |
32 |
|
T98 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T22 |
21 |
|
T26 |
23 |
|
T98 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T22 |
35 |
|
T26 |
38 |
|
T98 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T22 |
16 |
|
T26 |
25 |
|
T98 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T22 |
38 |
|
T26 |
29 |
|
T98 |
33 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52590 |
1 |
|
|
T22 |
1597 |
|
T26 |
1240 |
|
T98 |
1283 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46720 |
1 |
|
|
T22 |
662 |
|
T26 |
1875 |
|
T98 |
1164 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57892 |
1 |
|
|
T22 |
2561 |
|
T26 |
1889 |
|
T98 |
1296 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47420 |
1 |
|
|
T22 |
795 |
|
T26 |
1189 |
|
T98 |
1830 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T22 |
37 |
|
T26 |
45 |
|
T98 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T22 |
38 |
|
T26 |
50 |
|
T98 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T22 |
37 |
|
T26 |
45 |
|
T98 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T22 |
38 |
|
T26 |
50 |
|
T98 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T22 |
37 |
|
T26 |
45 |
|
T98 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T22 |
38 |
|
T26 |
50 |
|
T98 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T22 |
37 |
|
T26 |
45 |
|
T98 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T22 |
37 |
|
T26 |
50 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T22 |
36 |
|
T26 |
42 |
|
T98 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T22 |
37 |
|
T26 |
49 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T22 |
34 |
|
T26 |
42 |
|
T98 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
37 |
|
T26 |
49 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T22 |
32 |
|
T26 |
42 |
|
T98 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T22 |
36 |
|
T26 |
49 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T22 |
32 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T22 |
31 |
|
T26 |
42 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T22 |
31 |
|
T26 |
19 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
36 |
|
T26 |
49 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T22 |
30 |
|
T26 |
39 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T22 |
35 |
|
T26 |
49 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T22 |
30 |
|
T26 |
37 |
|
T98 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
34 |
|
T26 |
48 |
|
T98 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T22 |
28 |
|
T26 |
37 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
33 |
|
T26 |
47 |
|
T98 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
26 |
|
T26 |
36 |
|
T98 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T22 |
32 |
|
T26 |
47 |
|
T98 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
26 |
|
T26 |
34 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
30 |
|
T26 |
46 |
|
T98 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T22 |
25 |
|
T26 |
34 |
|
T98 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T22 |
30 |
|
T26 |
45 |
|
T98 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T22 |
31 |
|
T26 |
24 |
|
T98 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T22 |
22 |
|
T26 |
34 |
|
T98 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T22 |
31 |
|
T26 |
18 |
|
T98 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T22 |
30 |
|
T26 |
44 |
|
T98 |
31 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56796 |
1 |
|
|
T22 |
2068 |
|
T26 |
1138 |
|
T98 |
1887 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46469 |
1 |
|
|
T22 |
1306 |
|
T26 |
1326 |
|
T98 |
902 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56803 |
1 |
|
|
T22 |
1406 |
|
T26 |
2612 |
|
T98 |
1737 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44188 |
1 |
|
|
T22 |
803 |
|
T26 |
1203 |
|
T98 |
900 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T22 |
47 |
|
T26 |
51 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T22 |
45 |
|
T26 |
49 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T22 |
47 |
|
T26 |
50 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T22 |
45 |
|
T26 |
45 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T22 |
43 |
|
T26 |
44 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T22 |
46 |
|
T26 |
48 |
|
T98 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T22 |
41 |
|
T26 |
44 |
|
T98 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T22 |
45 |
|
T26 |
47 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T22 |
40 |
|
T26 |
44 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T22 |
45 |
|
T26 |
46 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T22 |
40 |
|
T26 |
42 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T22 |
45 |
|
T26 |
45 |
|
T98 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
39 |
|
T26 |
41 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T22 |
45 |
|
T26 |
42 |
|
T98 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T22 |
38 |
|
T26 |
40 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T22 |
45 |
|
T26 |
42 |
|
T98 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T22 |
36 |
|
T26 |
40 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T22 |
45 |
|
T26 |
42 |
|
T98 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T22 |
36 |
|
T26 |
39 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T22 |
45 |
|
T26 |
42 |
|
T98 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T22 |
35 |
|
T26 |
39 |
|
T98 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T22 |
44 |
|
T26 |
42 |
|
T98 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T22 |
35 |
|
T26 |
38 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
44 |
|
T26 |
42 |
|
T98 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
35 |
|
T26 |
38 |
|
T98 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T22 |
44 |
|
T26 |
42 |
|
T98 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T22 |
35 |
|
T26 |
37 |
|
T98 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
23 |
|
T26 |
18 |
|
T98 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T22 |
43 |
|
T26 |
42 |
|
T98 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T22 |
24 |
|
T26 |
21 |
|
T98 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T22 |
35 |
|
T26 |
37 |
|
T98 |
33 |