cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63743 |
1 |
|
|
T27 |
1454 |
|
T31 |
2134 |
|
T39 |
1455 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46937 |
1 |
|
|
T27 |
730 |
|
T31 |
860 |
|
T39 |
2312 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64364 |
1 |
|
|
T27 |
2251 |
|
T31 |
962 |
|
T39 |
1772 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42714 |
1 |
|
|
T27 |
1172 |
|
T31 |
573 |
|
T39 |
1000 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T27 |
25 |
|
T31 |
15 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T27 |
40 |
|
T31 |
39 |
|
T39 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T27 |
44 |
|
T31 |
35 |
|
T39 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T27 |
25 |
|
T31 |
15 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T27 |
39 |
|
T31 |
39 |
|
T39 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T27 |
44 |
|
T31 |
33 |
|
T39 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T27 |
37 |
|
T31 |
40 |
|
T39 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T27 |
44 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T27 |
37 |
|
T31 |
40 |
|
T39 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T27 |
34 |
|
T31 |
40 |
|
T39 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T27 |
42 |
|
T31 |
30 |
|
T39 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T27 |
33 |
|
T31 |
40 |
|
T39 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T27 |
42 |
|
T31 |
27 |
|
T39 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T27 |
33 |
|
T31 |
39 |
|
T39 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T27 |
42 |
|
T31 |
26 |
|
T39 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T27 |
31 |
|
T31 |
39 |
|
T39 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T27 |
42 |
|
T31 |
25 |
|
T39 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T27 |
29 |
|
T31 |
37 |
|
T39 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T27 |
41 |
|
T31 |
24 |
|
T39 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T27 |
28 |
|
T31 |
37 |
|
T39 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T27 |
41 |
|
T31 |
23 |
|
T39 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T27 |
26 |
|
T31 |
37 |
|
T39 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T27 |
39 |
|
T31 |
22 |
|
T39 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T27 |
26 |
|
T31 |
36 |
|
T39 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T27 |
39 |
|
T31 |
22 |
|
T39 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T27 |
25 |
|
T31 |
35 |
|
T39 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T27 |
37 |
|
T31 |
22 |
|
T39 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T27 |
25 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T27 |
37 |
|
T31 |
20 |
|
T39 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T27 |
25 |
|
T31 |
33 |
|
T39 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
18 |
|
T39 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T27 |
37 |
|
T31 |
19 |
|
T39 |
37 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65014 |
1 |
|
|
T27 |
1186 |
|
T31 |
1039 |
|
T39 |
1702 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45177 |
1 |
|
|
T27 |
874 |
|
T31 |
1468 |
|
T39 |
900 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59013 |
1 |
|
|
T27 |
1330 |
|
T31 |
1254 |
|
T39 |
1611 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47513 |
1 |
|
|
T27 |
2032 |
|
T31 |
724 |
|
T39 |
2292 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
23 |
|
T31 |
15 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T27 |
48 |
|
T31 |
41 |
|
T39 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T27 |
44 |
|
T31 |
37 |
|
T39 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
23 |
|
T31 |
15 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T27 |
47 |
|
T31 |
40 |
|
T39 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T27 |
44 |
|
T31 |
35 |
|
T39 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T27 |
44 |
|
T31 |
41 |
|
T39 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T27 |
43 |
|
T31 |
35 |
|
T39 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T27 |
44 |
|
T31 |
41 |
|
T39 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T27 |
40 |
|
T31 |
33 |
|
T39 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T27 |
44 |
|
T31 |
40 |
|
T39 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T27 |
40 |
|
T31 |
32 |
|
T39 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T27 |
44 |
|
T31 |
40 |
|
T39 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T27 |
39 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T27 |
43 |
|
T31 |
38 |
|
T39 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T27 |
43 |
|
T31 |
38 |
|
T39 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T27 |
38 |
|
T31 |
29 |
|
T39 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T27 |
42 |
|
T31 |
38 |
|
T39 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T27 |
38 |
|
T31 |
28 |
|
T39 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T27 |
40 |
|
T31 |
37 |
|
T39 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T27 |
38 |
|
T31 |
27 |
|
T39 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T27 |
38 |
|
T31 |
35 |
|
T39 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T27 |
38 |
|
T31 |
25 |
|
T39 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T27 |
36 |
|
T31 |
33 |
|
T39 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T27 |
37 |
|
T31 |
25 |
|
T39 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T27 |
34 |
|
T31 |
32 |
|
T39 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T27 |
36 |
|
T31 |
25 |
|
T39 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T27 |
35 |
|
T31 |
25 |
|
T39 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T27 |
33 |
|
T31 |
31 |
|
T39 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T27 |
28 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T27 |
35 |
|
T31 |
25 |
|
T39 |
40 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59332 |
1 |
|
|
T27 |
1164 |
|
T31 |
849 |
|
T39 |
1585 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49863 |
1 |
|
|
T27 |
1914 |
|
T31 |
983 |
|
T39 |
1173 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60579 |
1 |
|
|
T27 |
1442 |
|
T31 |
1823 |
|
T39 |
2948 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47764 |
1 |
|
|
T27 |
1114 |
|
T31 |
687 |
|
T39 |
941 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T27 |
49 |
|
T31 |
44 |
|
T39 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T27 |
42 |
|
T31 |
42 |
|
T39 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T27 |
47 |
|
T31 |
43 |
|
T39 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T27 |
41 |
|
T31 |
42 |
|
T39 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T27 |
46 |
|
T31 |
42 |
|
T39 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T27 |
41 |
|
T31 |
42 |
|
T39 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T27 |
44 |
|
T31 |
41 |
|
T39 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T27 |
41 |
|
T31 |
41 |
|
T39 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T27 |
43 |
|
T31 |
39 |
|
T39 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T27 |
41 |
|
T31 |
40 |
|
T39 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T27 |
43 |
|
T31 |
39 |
|
T39 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T27 |
40 |
|
T31 |
40 |
|
T39 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T27 |
41 |
|
T31 |
39 |
|
T39 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T27 |
40 |
|
T31 |
37 |
|
T39 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T27 |
41 |
|
T31 |
38 |
|
T39 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T27 |
40 |
|
T31 |
36 |
|
T39 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T27 |
40 |
|
T31 |
35 |
|
T39 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T27 |
39 |
|
T31 |
34 |
|
T39 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T27 |
40 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T27 |
34 |
|
T31 |
32 |
|
T39 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T27 |
39 |
|
T31 |
35 |
|
T39 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T27 |
32 |
|
T31 |
31 |
|
T39 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T27 |
37 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T27 |
30 |
|
T31 |
30 |
|
T39 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
15 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T27 |
37 |
|
T31 |
33 |
|
T39 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T27 |
29 |
|
T31 |
29 |
|
T39 |
34 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62894 |
1 |
|
|
T27 |
934 |
|
T31 |
1546 |
|
T39 |
2024 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45478 |
1 |
|
|
T27 |
1876 |
|
T31 |
743 |
|
T39 |
2076 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59620 |
1 |
|
|
T27 |
1574 |
|
T31 |
1085 |
|
T39 |
1675 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48404 |
1 |
|
|
T27 |
991 |
|
T31 |
869 |
|
T39 |
807 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T27 |
58 |
|
T31 |
43 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1754 |
1 |
|
|
T27 |
60 |
|
T31 |
41 |
|
T39 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T27 |
57 |
|
T31 |
43 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T27 |
58 |
|
T31 |
40 |
|
T39 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T27 |
55 |
|
T31 |
42 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T27 |
57 |
|
T31 |
39 |
|
T39 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T27 |
54 |
|
T31 |
41 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T27 |
57 |
|
T31 |
38 |
|
T39 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T27 |
52 |
|
T31 |
40 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T27 |
56 |
|
T31 |
37 |
|
T39 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T27 |
49 |
|
T31 |
39 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T27 |
17 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T27 |
55 |
|
T31 |
37 |
|
T39 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T27 |
47 |
|
T31 |
38 |
|
T39 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T27 |
54 |
|
T31 |
35 |
|
T39 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T27 |
46 |
|
T31 |
37 |
|
T39 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T27 |
53 |
|
T31 |
34 |
|
T39 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T27 |
44 |
|
T31 |
36 |
|
T39 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T27 |
50 |
|
T31 |
33 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T27 |
43 |
|
T31 |
34 |
|
T39 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T27 |
48 |
|
T31 |
33 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T27 |
43 |
|
T31 |
34 |
|
T39 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T27 |
36 |
|
T31 |
29 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T27 |
19 |
|
T31 |
21 |
|
T39 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T27 |
35 |
|
T31 |
29 |
|
T39 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
16 |
|
T31 |
22 |
|
T39 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T27 |
45 |
|
T31 |
33 |
|
T39 |
32 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58089 |
1 |
|
|
T27 |
1066 |
|
T31 |
853 |
|
T39 |
1530 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46728 |
1 |
|
|
T27 |
1257 |
|
T31 |
1445 |
|
T39 |
2469 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57492 |
1 |
|
|
T27 |
1706 |
|
T31 |
1284 |
|
T39 |
1538 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54768 |
1 |
|
|
T27 |
1441 |
|
T31 |
895 |
|
T39 |
1026 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
15 |
|
T31 |
15 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1759 |
1 |
|
|
T27 |
56 |
|
T31 |
41 |
|
T39 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T27 |
58 |
|
T31 |
43 |
|
T39 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
15 |
|
T31 |
15 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T27 |
56 |
|
T31 |
41 |
|
T39 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T27 |
57 |
|
T31 |
42 |
|
T39 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T27 |
56 |
|
T31 |
41 |
|
T39 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T27 |
55 |
|
T31 |
41 |
|
T39 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T27 |
55 |
|
T31 |
40 |
|
T39 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T27 |
54 |
|
T31 |
40 |
|
T39 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T27 |
52 |
|
T31 |
37 |
|
T39 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T27 |
54 |
|
T31 |
40 |
|
T39 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T27 |
51 |
|
T31 |
37 |
|
T39 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T27 |
53 |
|
T31 |
38 |
|
T39 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T27 |
49 |
|
T31 |
36 |
|
T39 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T27 |
50 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T27 |
49 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T27 |
48 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T27 |
48 |
|
T31 |
34 |
|
T39 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T27 |
48 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T27 |
47 |
|
T31 |
34 |
|
T39 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T27 |
47 |
|
T31 |
35 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T27 |
46 |
|
T31 |
34 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T27 |
47 |
|
T31 |
35 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T27 |
43 |
|
T31 |
34 |
|
T39 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T27 |
41 |
|
T31 |
34 |
|
T39 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T27 |
38 |
|
T31 |
33 |
|
T39 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T27 |
46 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
15 |
|
T31 |
14 |
|
T39 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
14 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
41 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63338 |
1 |
|
|
T27 |
1311 |
|
T31 |
827 |
|
T39 |
1920 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50929 |
1 |
|
|
T27 |
1054 |
|
T31 |
1673 |
|
T39 |
2167 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55002 |
1 |
|
|
T27 |
2206 |
|
T31 |
948 |
|
T39 |
1560 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47505 |
1 |
|
|
T27 |
943 |
|
T31 |
861 |
|
T39 |
897 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T27 |
53 |
|
T31 |
48 |
|
T39 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T27 |
50 |
|
T31 |
45 |
|
T39 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
14 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1729 |
1 |
|
|
T27 |
51 |
|
T31 |
48 |
|
T39 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T27 |
49 |
|
T31 |
45 |
|
T39 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T27 |
49 |
|
T31 |
48 |
|
T39 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T27 |
49 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T27 |
46 |
|
T31 |
46 |
|
T39 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T27 |
49 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T27 |
45 |
|
T31 |
46 |
|
T39 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T27 |
47 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T27 |
45 |
|
T31 |
44 |
|
T39 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
22 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T27 |
45 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T27 |
43 |
|
T31 |
42 |
|
T39 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T27 |
44 |
|
T31 |
41 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T27 |
42 |
|
T31 |
41 |
|
T39 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T27 |
43 |
|
T31 |
39 |
|
T39 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T27 |
40 |
|
T31 |
41 |
|
T39 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T27 |
40 |
|
T31 |
40 |
|
T39 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T27 |
40 |
|
T31 |
35 |
|
T39 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T27 |
39 |
|
T31 |
40 |
|
T39 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T27 |
39 |
|
T31 |
34 |
|
T39 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T27 |
39 |
|
T31 |
39 |
|
T39 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T27 |
38 |
|
T31 |
33 |
|
T39 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T27 |
38 |
|
T31 |
39 |
|
T39 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T27 |
35 |
|
T31 |
39 |
|
T39 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T27 |
34 |
|
T31 |
39 |
|
T39 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T27 |
35 |
|
T31 |
31 |
|
T39 |
28 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65558 |
1 |
|
|
T27 |
1281 |
|
T31 |
891 |
|
T39 |
1897 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50356 |
1 |
|
|
T27 |
971 |
|
T31 |
850 |
|
T39 |
2115 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55993 |
1 |
|
|
T27 |
1536 |
|
T31 |
1026 |
|
T39 |
1552 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46582 |
1 |
|
|
T27 |
2006 |
|
T31 |
1544 |
|
T39 |
841 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
21 |
|
T31 |
13 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T27 |
36 |
|
T31 |
49 |
|
T39 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T27 |
39 |
|
T31 |
49 |
|
T39 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
21 |
|
T31 |
13 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T27 |
36 |
|
T31 |
47 |
|
T39 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T27 |
38 |
|
T31 |
48 |
|
T39 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T27 |
36 |
|
T31 |
48 |
|
T39 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T27 |
37 |
|
T31 |
48 |
|
T39 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T27 |
35 |
|
T31 |
47 |
|
T39 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T27 |
35 |
|
T31 |
47 |
|
T39 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T27 |
34 |
|
T31 |
46 |
|
T39 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T27 |
35 |
|
T31 |
47 |
|
T39 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T27 |
33 |
|
T31 |
46 |
|
T39 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T27 |
35 |
|
T31 |
46 |
|
T39 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T27 |
31 |
|
T31 |
44 |
|
T39 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T27 |
35 |
|
T31 |
45 |
|
T39 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T27 |
29 |
|
T31 |
44 |
|
T39 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T27 |
35 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T27 |
29 |
|
T31 |
42 |
|
T39 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T27 |
35 |
|
T31 |
44 |
|
T39 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T27 |
29 |
|
T31 |
40 |
|
T39 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T27 |
35 |
|
T31 |
42 |
|
T39 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T27 |
28 |
|
T31 |
36 |
|
T39 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T27 |
35 |
|
T31 |
40 |
|
T39 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T27 |
28 |
|
T31 |
35 |
|
T39 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T27 |
34 |
|
T31 |
40 |
|
T39 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T27 |
26 |
|
T31 |
34 |
|
T39 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T27 |
34 |
|
T31 |
38 |
|
T39 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T27 |
26 |
|
T31 |
33 |
|
T39 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T27 |
34 |
|
T31 |
38 |
|
T39 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T27 |
21 |
|
T31 |
12 |
|
T39 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T27 |
26 |
|
T31 |
33 |
|
T39 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T27 |
33 |
|
T31 |
38 |
|
T39 |
34 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58787 |
1 |
|
|
T27 |
1180 |
|
T31 |
1204 |
|
T39 |
1537 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53892 |
1 |
|
|
T27 |
1893 |
|
T31 |
680 |
|
T39 |
1032 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58482 |
1 |
|
|
T27 |
1307 |
|
T31 |
1923 |
|
T39 |
1829 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45571 |
1 |
|
|
T27 |
1141 |
|
T31 |
717 |
|
T39 |
2157 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
25 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1773 |
1 |
|
|
T27 |
52 |
|
T31 |
28 |
|
T39 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T27 |
49 |
|
T31 |
34 |
|
T39 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
25 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1739 |
1 |
|
|
T27 |
52 |
|
T31 |
27 |
|
T39 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T27 |
48 |
|
T31 |
34 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T27 |
52 |
|
T31 |
28 |
|
T39 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T27 |
52 |
|
T31 |
27 |
|
T39 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T27 |
45 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
20 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T27 |
42 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T27 |
49 |
|
T31 |
24 |
|
T39 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T27 |
41 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T27 |
49 |
|
T31 |
21 |
|
T39 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T27 |
39 |
|
T31 |
32 |
|
T39 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T27 |
48 |
|
T31 |
20 |
|
T39 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T27 |
46 |
|
T31 |
19 |
|
T39 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T27 |
36 |
|
T31 |
30 |
|
T39 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T27 |
45 |
|
T31 |
18 |
|
T39 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T27 |
36 |
|
T31 |
28 |
|
T39 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T27 |
43 |
|
T31 |
18 |
|
T39 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T27 |
36 |
|
T31 |
28 |
|
T39 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T27 |
43 |
|
T31 |
18 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T27 |
36 |
|
T31 |
28 |
|
T39 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T27 |
42 |
|
T31 |
18 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T27 |
36 |
|
T31 |
27 |
|
T39 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
24 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T27 |
41 |
|
T31 |
18 |
|
T39 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T27 |
33 |
|
T31 |
27 |
|
T39 |
43 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63360 |
1 |
|
|
T27 |
1343 |
|
T31 |
778 |
|
T39 |
3071 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46474 |
1 |
|
|
T27 |
1234 |
|
T31 |
920 |
|
T39 |
769 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56405 |
1 |
|
|
T27 |
1703 |
|
T31 |
1108 |
|
T39 |
1824 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51882 |
1 |
|
|
T27 |
1123 |
|
T31 |
1700 |
|
T39 |
1086 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T27 |
58 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T27 |
64 |
|
T31 |
48 |
|
T39 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T27 |
58 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T27 |
62 |
|
T31 |
47 |
|
T39 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T27 |
57 |
|
T31 |
43 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T27 |
60 |
|
T31 |
46 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T27 |
56 |
|
T31 |
41 |
|
T39 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T27 |
57 |
|
T31 |
46 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T27 |
56 |
|
T31 |
37 |
|
T39 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T27 |
54 |
|
T31 |
45 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T27 |
17 |
|
T31 |
12 |
|
T39 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T27 |
54 |
|
T31 |
36 |
|
T39 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T27 |
12 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T27 |
53 |
|
T31 |
44 |
|
T39 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T27 |
53 |
|
T31 |
35 |
|
T39 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T27 |
51 |
|
T31 |
43 |
|
T39 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T27 |
51 |
|
T31 |
34 |
|
T39 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T27 |
51 |
|
T31 |
43 |
|
T39 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T27 |
50 |
|
T31 |
33 |
|
T39 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T27 |
51 |
|
T31 |
40 |
|
T39 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T27 |
49 |
|
T31 |
33 |
|
T39 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T27 |
50 |
|
T31 |
40 |
|
T39 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T27 |
48 |
|
T31 |
31 |
|
T39 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T27 |
49 |
|
T31 |
40 |
|
T39 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T27 |
47 |
|
T31 |
31 |
|
T39 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T27 |
48 |
|
T31 |
40 |
|
T39 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T27 |
43 |
|
T31 |
30 |
|
T39 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T27 |
48 |
|
T31 |
39 |
|
T39 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T27 |
42 |
|
T31 |
30 |
|
T39 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T27 |
48 |
|
T31 |
39 |
|
T39 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
17 |
|
T31 |
11 |
|
T39 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T27 |
41 |
|
T31 |
30 |
|
T39 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
11 |
|
T31 |
8 |
|
T39 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T27 |
47 |
|
T31 |
37 |
|
T39 |
35 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55045 |
1 |
|
|
T27 |
1466 |
|
T31 |
1345 |
|
T39 |
1560 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46793 |
1 |
|
|
T27 |
1961 |
|
T31 |
763 |
|
T39 |
1191 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60836 |
1 |
|
|
T27 |
1205 |
|
T31 |
1179 |
|
T39 |
1092 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54585 |
1 |
|
|
T27 |
933 |
|
T31 |
1161 |
|
T39 |
2563 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1794 |
1 |
|
|
T27 |
45 |
|
T31 |
31 |
|
T39 |
61 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1790 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
60 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T27 |
44 |
|
T31 |
31 |
|
T39 |
61 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T27 |
43 |
|
T31 |
29 |
|
T39 |
60 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
60 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T27 |
43 |
|
T31 |
29 |
|
T39 |
60 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T27 |
43 |
|
T31 |
28 |
|
T39 |
59 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
57 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T27 |
43 |
|
T31 |
27 |
|
T39 |
58 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T27 |
42 |
|
T31 |
30 |
|
T39 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
23 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T27 |
39 |
|
T31 |
27 |
|
T39 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T27 |
42 |
|
T31 |
29 |
|
T39 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T27 |
37 |
|
T31 |
24 |
|
T39 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T27 |
42 |
|
T31 |
28 |
|
T39 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T27 |
36 |
|
T31 |
24 |
|
T39 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T27 |
42 |
|
T31 |
28 |
|
T39 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T27 |
35 |
|
T31 |
24 |
|
T39 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T27 |
39 |
|
T31 |
28 |
|
T39 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T27 |
34 |
|
T31 |
23 |
|
T39 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T27 |
39 |
|
T31 |
27 |
|
T39 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T27 |
34 |
|
T31 |
23 |
|
T39 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T27 |
38 |
|
T31 |
27 |
|
T39 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T27 |
34 |
|
T31 |
22 |
|
T39 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T27 |
36 |
|
T31 |
27 |
|
T39 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T27 |
33 |
|
T31 |
22 |
|
T39 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T27 |
34 |
|
T31 |
27 |
|
T39 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T27 |
33 |
|
T31 |
22 |
|
T39 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T27 |
34 |
|
T31 |
27 |
|
T39 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T27 |
33 |
|
T31 |
19 |
|
T39 |
48 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58275 |
1 |
|
|
T27 |
1552 |
|
T31 |
1053 |
|
T39 |
1373 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52529 |
1 |
|
|
T27 |
800 |
|
T31 |
1607 |
|
T39 |
2282 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60958 |
1 |
|
|
T27 |
2426 |
|
T31 |
920 |
|
T39 |
1588 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45644 |
1 |
|
|
T27 |
1022 |
|
T31 |
823 |
|
T39 |
1351 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
23 |
|
T31 |
17 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T27 |
35 |
|
T31 |
42 |
|
T39 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1744 |
1 |
|
|
T27 |
42 |
|
T31 |
41 |
|
T39 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
23 |
|
T31 |
17 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T27 |
35 |
|
T31 |
40 |
|
T39 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T27 |
41 |
|
T31 |
41 |
|
T39 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T27 |
34 |
|
T31 |
40 |
|
T39 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T27 |
40 |
|
T31 |
39 |
|
T39 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T27 |
33 |
|
T31 |
40 |
|
T39 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T27 |
39 |
|
T31 |
38 |
|
T39 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T27 |
33 |
|
T31 |
40 |
|
T39 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T27 |
37 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T27 |
33 |
|
T31 |
40 |
|
T39 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T27 |
36 |
|
T31 |
35 |
|
T39 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T27 |
31 |
|
T31 |
38 |
|
T39 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T27 |
34 |
|
T31 |
34 |
|
T39 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T27 |
29 |
|
T31 |
37 |
|
T39 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T27 |
34 |
|
T31 |
33 |
|
T39 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T27 |
29 |
|
T31 |
37 |
|
T39 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T27 |
28 |
|
T31 |
37 |
|
T39 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T27 |
32 |
|
T31 |
31 |
|
T39 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T27 |
28 |
|
T31 |
37 |
|
T39 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T27 |
32 |
|
T31 |
30 |
|
T39 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T27 |
28 |
|
T31 |
35 |
|
T39 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T27 |
32 |
|
T31 |
28 |
|
T39 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T27 |
28 |
|
T31 |
35 |
|
T39 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T27 |
32 |
|
T31 |
28 |
|
T39 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T27 |
27 |
|
T31 |
35 |
|
T39 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T27 |
31 |
|
T31 |
28 |
|
T39 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
16 |
|
T39 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T27 |
27 |
|
T31 |
34 |
|
T39 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T27 |
31 |
|
T31 |
27 |
|
T39 |
41 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60202 |
1 |
|
|
T27 |
1465 |
|
T31 |
1114 |
|
T39 |
1402 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45128 |
1 |
|
|
T27 |
1932 |
|
T31 |
1476 |
|
T39 |
1355 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63864 |
1 |
|
|
T27 |
1071 |
|
T31 |
1069 |
|
T39 |
1307 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48927 |
1 |
|
|
T27 |
950 |
|
T31 |
656 |
|
T39 |
2419 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T27 |
51 |
|
T31 |
37 |
|
T39 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T27 |
52 |
|
T31 |
38 |
|
T39 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T27 |
50 |
|
T31 |
37 |
|
T39 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T27 |
51 |
|
T31 |
36 |
|
T39 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T27 |
48 |
|
T31 |
38 |
|
T39 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T27 |
50 |
|
T31 |
36 |
|
T39 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T27 |
47 |
|
T31 |
35 |
|
T39 |
57 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T27 |
50 |
|
T31 |
35 |
|
T39 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T27 |
46 |
|
T31 |
35 |
|
T39 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T27 |
48 |
|
T31 |
34 |
|
T39 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T27 |
44 |
|
T31 |
34 |
|
T39 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T27 |
46 |
|
T31 |
33 |
|
T39 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T27 |
44 |
|
T31 |
33 |
|
T39 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T27 |
44 |
|
T31 |
33 |
|
T39 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T27 |
43 |
|
T31 |
32 |
|
T39 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T27 |
44 |
|
T31 |
33 |
|
T39 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T27 |
43 |
|
T31 |
32 |
|
T39 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T27 |
43 |
|
T31 |
33 |
|
T39 |
52 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T27 |
43 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T27 |
42 |
|
T31 |
33 |
|
T39 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T27 |
42 |
|
T31 |
32 |
|
T39 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T27 |
42 |
|
T31 |
29 |
|
T39 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T27 |
41 |
|
T31 |
31 |
|
T39 |
49 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T27 |
39 |
|
T31 |
28 |
|
T39 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T27 |
38 |
|
T31 |
27 |
|
T39 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T27 |
39 |
|
T31 |
29 |
|
T39 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T27 |
38 |
|
T31 |
26 |
|
T39 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
22 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T27 |
36 |
|
T31 |
28 |
|
T39 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T27 |
38 |
|
T31 |
24 |
|
T39 |
44 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56625 |
1 |
|
|
T27 |
2049 |
|
T31 |
1017 |
|
T39 |
1364 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43524 |
1 |
|
|
T27 |
1106 |
|
T31 |
833 |
|
T39 |
1269 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63856 |
1 |
|
|
T27 |
1156 |
|
T31 |
1367 |
|
T39 |
2610 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52344 |
1 |
|
|
T27 |
1078 |
|
T31 |
1315 |
|
T39 |
1153 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T27 |
51 |
|
T31 |
28 |
|
T39 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T27 |
53 |
|
T31 |
29 |
|
T39 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T27 |
50 |
|
T31 |
28 |
|
T39 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T27 |
52 |
|
T31 |
28 |
|
T39 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T27 |
50 |
|
T31 |
28 |
|
T39 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T27 |
50 |
|
T31 |
27 |
|
T39 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T27 |
49 |
|
T31 |
28 |
|
T39 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T27 |
48 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T27 |
46 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T27 |
47 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T27 |
46 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T27 |
45 |
|
T31 |
26 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T27 |
44 |
|
T31 |
27 |
|
T39 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T27 |
44 |
|
T31 |
26 |
|
T39 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T27 |
43 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T27 |
44 |
|
T31 |
24 |
|
T39 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T27 |
42 |
|
T31 |
25 |
|
T39 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T27 |
44 |
|
T31 |
24 |
|
T39 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T27 |
42 |
|
T31 |
25 |
|
T39 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T27 |
43 |
|
T31 |
24 |
|
T39 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T27 |
42 |
|
T31 |
24 |
|
T39 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T27 |
42 |
|
T31 |
22 |
|
T39 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T27 |
41 |
|
T31 |
24 |
|
T39 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T27 |
41 |
|
T31 |
22 |
|
T39 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T27 |
40 |
|
T31 |
23 |
|
T39 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T27 |
40 |
|
T31 |
22 |
|
T39 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T27 |
40 |
|
T31 |
23 |
|
T39 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T27 |
40 |
|
T31 |
22 |
|
T39 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
23 |
|
T31 |
23 |
|
T39 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T27 |
38 |
|
T31 |
23 |
|
T39 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T27 |
21 |
|
T31 |
22 |
|
T39 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T27 |
39 |
|
T31 |
22 |
|
T39 |
40 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65077 |
1 |
|
|
T27 |
1177 |
|
T31 |
1064 |
|
T39 |
1399 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48236 |
1 |
|
|
T27 |
1020 |
|
T31 |
716 |
|
T39 |
1331 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57064 |
1 |
|
|
T27 |
1159 |
|
T31 |
1701 |
|
T39 |
1356 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47746 |
1 |
|
|
T27 |
2066 |
|
T31 |
1115 |
|
T39 |
2393 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T27 |
52 |
|
T31 |
26 |
|
T39 |
65 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T27 |
52 |
|
T31 |
26 |
|
T39 |
63 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T27 |
50 |
|
T31 |
24 |
|
T39 |
63 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T27 |
52 |
|
T31 |
26 |
|
T39 |
61 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
59 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T27 |
51 |
|
T31 |
26 |
|
T39 |
60 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T27 |
50 |
|
T31 |
26 |
|
T39 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T27 |
47 |
|
T31 |
25 |
|
T39 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T27 |
47 |
|
T31 |
26 |
|
T39 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T27 |
46 |
|
T31 |
23 |
|
T39 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T27 |
22 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T27 |
44 |
|
T31 |
26 |
|
T39 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T27 |
45 |
|
T31 |
21 |
|
T39 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T27 |
43 |
|
T31 |
26 |
|
T39 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T27 |
45 |
|
T31 |
19 |
|
T39 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T27 |
43 |
|
T31 |
25 |
|
T39 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T27 |
42 |
|
T31 |
18 |
|
T39 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T27 |
43 |
|
T31 |
24 |
|
T39 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T27 |
41 |
|
T31 |
18 |
|
T39 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T27 |
43 |
|
T31 |
23 |
|
T39 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T27 |
40 |
|
T31 |
16 |
|
T39 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T27 |
41 |
|
T31 |
21 |
|
T39 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T27 |
40 |
|
T31 |
16 |
|
T39 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T27 |
40 |
|
T31 |
21 |
|
T39 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T27 |
39 |
|
T31 |
16 |
|
T39 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T27 |
40 |
|
T31 |
21 |
|
T39 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T27 |
39 |
|
T31 |
16 |
|
T39 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T27 |
39 |
|
T31 |
21 |
|
T39 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T27 |
38 |
|
T31 |
16 |
|
T39 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
21 |
|
T31 |
24 |
|
T39 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T27 |
37 |
|
T31 |
21 |
|
T39 |
45 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56211 |
1 |
|
|
T27 |
2300 |
|
T31 |
1453 |
|
T39 |
1376 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50851 |
1 |
|
|
T27 |
1236 |
|
T31 |
1299 |
|
T39 |
1139 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57679 |
1 |
|
|
T27 |
1216 |
|
T31 |
931 |
|
T39 |
2826 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52920 |
1 |
|
|
T27 |
884 |
|
T31 |
808 |
|
T39 |
1292 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T27 |
18 |
|
T31 |
20 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T27 |
46 |
|
T31 |
35 |
|
T39 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T27 |
45 |
|
T31 |
35 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T27 |
18 |
|
T31 |
20 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T27 |
46 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T27 |
45 |
|
T31 |
33 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T27 |
45 |
|
T31 |
35 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T27 |
44 |
|
T31 |
32 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T27 |
44 |
|
T31 |
34 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T27 |
43 |
|
T31 |
32 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T27 |
44 |
|
T31 |
31 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T27 |
42 |
|
T31 |
30 |
|
T39 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T27 |
42 |
|
T31 |
31 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
19 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T27 |
42 |
|
T31 |
31 |
|
T39 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T27 |
42 |
|
T31 |
30 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T27 |
41 |
|
T31 |
29 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T27 |
37 |
|
T31 |
29 |
|
T39 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T27 |
41 |
|
T31 |
29 |
|
T39 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T27 |
35 |
|
T31 |
29 |
|
T39 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T27 |
40 |
|
T31 |
29 |
|
T39 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T27 |
35 |
|
T31 |
29 |
|
T39 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T27 |
40 |
|
T31 |
27 |
|
T39 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T27 |
34 |
|
T31 |
29 |
|
T39 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T27 |
39 |
|
T31 |
26 |
|
T39 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T27 |
34 |
|
T31 |
28 |
|
T39 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T27 |
38 |
|
T31 |
26 |
|
T39 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T27 |
33 |
|
T31 |
28 |
|
T39 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T27 |
36 |
|
T31 |
24 |
|
T39 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T27 |
33 |
|
T31 |
27 |
|
T39 |
37 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56930 |
1 |
|
|
T27 |
2400 |
|
T31 |
977 |
|
T39 |
1450 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48690 |
1 |
|
|
T27 |
831 |
|
T31 |
711 |
|
T39 |
1251 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59324 |
1 |
|
|
T27 |
1321 |
|
T31 |
1837 |
|
T39 |
2605 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51435 |
1 |
|
|
T27 |
935 |
|
T31 |
1002 |
|
T39 |
1138 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
25 |
|
T31 |
15 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1791 |
1 |
|
|
T27 |
45 |
|
T31 |
37 |
|
T39 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1807 |
1 |
|
|
T27 |
46 |
|
T31 |
38 |
|
T39 |
62 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
25 |
|
T31 |
15 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T27 |
45 |
|
T31 |
37 |
|
T39 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T27 |
46 |
|
T31 |
37 |
|
T39 |
61 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T27 |
44 |
|
T31 |
37 |
|
T39 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T27 |
45 |
|
T31 |
37 |
|
T39 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T27 |
42 |
|
T31 |
37 |
|
T39 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T27 |
39 |
|
T31 |
36 |
|
T39 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
24 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T27 |
38 |
|
T31 |
36 |
|
T39 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T27 |
38 |
|
T31 |
36 |
|
T39 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T27 |
41 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T27 |
37 |
|
T31 |
36 |
|
T39 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T27 |
40 |
|
T31 |
34 |
|
T39 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T27 |
37 |
|
T31 |
34 |
|
T39 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T27 |
37 |
|
T31 |
33 |
|
T39 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T27 |
36 |
|
T31 |
33 |
|
T39 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T27 |
38 |
|
T31 |
30 |
|
T39 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T27 |
35 |
|
T31 |
30 |
|
T39 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T27 |
34 |
|
T31 |
28 |
|
T39 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T27 |
25 |
|
T31 |
14 |
|
T39 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T27 |
33 |
|
T31 |
28 |
|
T39 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
42 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67782 |
1 |
|
|
T27 |
2053 |
|
T31 |
708 |
|
T39 |
2382 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45894 |
1 |
|
|
T27 |
1284 |
|
T31 |
1573 |
|
T39 |
912 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57673 |
1 |
|
|
T27 |
1287 |
|
T31 |
965 |
|
T39 |
1997 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45807 |
1 |
|
|
T27 |
898 |
|
T31 |
998 |
|
T39 |
1152 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T27 |
50 |
|
T31 |
50 |
|
T39 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T27 |
50 |
|
T31 |
52 |
|
T39 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T27 |
50 |
|
T31 |
49 |
|
T39 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T27 |
49 |
|
T31 |
52 |
|
T39 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T27 |
50 |
|
T31 |
48 |
|
T39 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T27 |
47 |
|
T31 |
52 |
|
T39 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T27 |
49 |
|
T31 |
48 |
|
T39 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T27 |
47 |
|
T31 |
50 |
|
T39 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T27 |
49 |
|
T31 |
46 |
|
T39 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T27 |
47 |
|
T31 |
50 |
|
T39 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
19 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T27 |
48 |
|
T31 |
46 |
|
T39 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T27 |
47 |
|
T31 |
50 |
|
T39 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T27 |
46 |
|
T31 |
46 |
|
T39 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T27 |
43 |
|
T31 |
49 |
|
T39 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T27 |
46 |
|
T31 |
46 |
|
T39 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T27 |
41 |
|
T31 |
47 |
|
T39 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T27 |
45 |
|
T31 |
45 |
|
T39 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T27 |
40 |
|
T31 |
45 |
|
T39 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T27 |
43 |
|
T31 |
44 |
|
T39 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T27 |
39 |
|
T31 |
44 |
|
T39 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T27 |
42 |
|
T31 |
42 |
|
T39 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T27 |
38 |
|
T31 |
43 |
|
T39 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T27 |
41 |
|
T31 |
41 |
|
T39 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T27 |
36 |
|
T31 |
42 |
|
T39 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T27 |
40 |
|
T31 |
39 |
|
T39 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T27 |
35 |
|
T31 |
41 |
|
T39 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T27 |
40 |
|
T31 |
39 |
|
T39 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T27 |
32 |
|
T31 |
37 |
|
T39 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T27 |
40 |
|
T31 |
37 |
|
T39 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
18 |
|
T31 |
11 |
|
T39 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T27 |
32 |
|
T31 |
36 |
|
T39 |
47 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59041 |
1 |
|
|
T27 |
2490 |
|
T31 |
1153 |
|
T39 |
2804 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46300 |
1 |
|
|
T27 |
1110 |
|
T31 |
964 |
|
T39 |
1219 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63725 |
1 |
|
|
T27 |
1210 |
|
T31 |
832 |
|
T39 |
1717 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47383 |
1 |
|
|
T27 |
691 |
|
T31 |
1346 |
|
T39 |
939 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T27 |
23 |
|
T31 |
15 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T27 |
47 |
|
T31 |
48 |
|
T39 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T27 |
46 |
|
T31 |
44 |
|
T39 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T27 |
23 |
|
T31 |
15 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T27 |
46 |
|
T31 |
47 |
|
T39 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T27 |
45 |
|
T31 |
43 |
|
T39 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T27 |
44 |
|
T31 |
47 |
|
T39 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T27 |
44 |
|
T31 |
42 |
|
T39 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T27 |
43 |
|
T31 |
46 |
|
T39 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T27 |
44 |
|
T31 |
42 |
|
T39 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T27 |
41 |
|
T31 |
46 |
|
T39 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T27 |
44 |
|
T31 |
42 |
|
T39 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T27 |
40 |
|
T31 |
45 |
|
T39 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T27 |
24 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T27 |
42 |
|
T31 |
40 |
|
T39 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T27 |
40 |
|
T31 |
43 |
|
T39 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T27 |
41 |
|
T31 |
39 |
|
T39 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T27 |
39 |
|
T31 |
41 |
|
T39 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T27 |
40 |
|
T31 |
38 |
|
T39 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T27 |
38 |
|
T31 |
38 |
|
T39 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T27 |
40 |
|
T31 |
38 |
|
T39 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T27 |
38 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T27 |
38 |
|
T31 |
37 |
|
T39 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T27 |
38 |
|
T31 |
35 |
|
T39 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T27 |
38 |
|
T31 |
35 |
|
T39 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T27 |
35 |
|
T31 |
35 |
|
T39 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T27 |
36 |
|
T31 |
33 |
|
T39 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T27 |
34 |
|
T31 |
34 |
|
T39 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T27 |
33 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T27 |
33 |
|
T31 |
32 |
|
T39 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
23 |
|
T31 |
14 |
|
T39 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T27 |
32 |
|
T31 |
32 |
|
T39 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
23 |
|
T31 |
19 |
|
T39 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T27 |
33 |
|
T31 |
31 |
|
T39 |
34 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55840 |
1 |
|
|
T27 |
779 |
|
T31 |
1372 |
|
T39 |
1139 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51173 |
1 |
|
|
T27 |
1443 |
|
T31 |
660 |
|
T39 |
1453 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56100 |
1 |
|
|
T27 |
907 |
|
T31 |
1179 |
|
T39 |
2421 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53651 |
1 |
|
|
T27 |
2159 |
|
T31 |
1378 |
|
T39 |
1444 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T27 |
59 |
|
T31 |
35 |
|
T39 |
69 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T27 |
65 |
|
T31 |
34 |
|
T39 |
68 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T27 |
57 |
|
T31 |
34 |
|
T39 |
68 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T27 |
64 |
|
T31 |
33 |
|
T39 |
67 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T27 |
57 |
|
T31 |
34 |
|
T39 |
68 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T27 |
64 |
|
T31 |
33 |
|
T39 |
67 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T27 |
57 |
|
T31 |
34 |
|
T39 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T27 |
63 |
|
T31 |
30 |
|
T39 |
65 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T27 |
56 |
|
T31 |
33 |
|
T39 |
60 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T27 |
62 |
|
T31 |
29 |
|
T39 |
65 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T27 |
56 |
|
T31 |
33 |
|
T39 |
58 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
12 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T27 |
60 |
|
T31 |
29 |
|
T39 |
64 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T27 |
55 |
|
T31 |
31 |
|
T39 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T27 |
60 |
|
T31 |
28 |
|
T39 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T27 |
54 |
|
T31 |
29 |
|
T39 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T27 |
59 |
|
T31 |
28 |
|
T39 |
62 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T27 |
53 |
|
T31 |
28 |
|
T39 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T27 |
59 |
|
T31 |
26 |
|
T39 |
62 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T27 |
52 |
|
T31 |
28 |
|
T39 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T27 |
57 |
|
T31 |
25 |
|
T39 |
61 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T27 |
49 |
|
T31 |
26 |
|
T39 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T27 |
56 |
|
T31 |
25 |
|
T39 |
59 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T27 |
54 |
|
T31 |
24 |
|
T39 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T27 |
52 |
|
T31 |
24 |
|
T39 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T27 |
49 |
|
T31 |
25 |
|
T39 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T27 |
50 |
|
T31 |
24 |
|
T39 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T27 |
45 |
|
T31 |
25 |
|
T39 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T27 |
11 |
|
T31 |
18 |
|
T39 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T27 |
49 |
|
T31 |
24 |
|
T39 |
56 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67817 |
1 |
|
|
T27 |
1353 |
|
T31 |
1542 |
|
T39 |
2557 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48348 |
1 |
|
|
T27 |
1175 |
|
T31 |
879 |
|
T39 |
1279 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57209 |
1 |
|
|
T27 |
1839 |
|
T31 |
1228 |
|
T39 |
1083 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44375 |
1 |
|
|
T27 |
993 |
|
T31 |
866 |
|
T39 |
1530 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T27 |
58 |
|
T31 |
37 |
|
T39 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T27 |
57 |
|
T31 |
35 |
|
T39 |
68 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T27 |
57 |
|
T31 |
37 |
|
T39 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T27 |
55 |
|
T31 |
34 |
|
T39 |
67 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T27 |
54 |
|
T31 |
36 |
|
T39 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T27 |
54 |
|
T31 |
34 |
|
T39 |
65 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T27 |
54 |
|
T31 |
35 |
|
T39 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T27 |
54 |
|
T31 |
34 |
|
T39 |
63 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T27 |
53 |
|
T31 |
34 |
|
T39 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T27 |
52 |
|
T31 |
34 |
|
T39 |
62 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T27 |
52 |
|
T31 |
32 |
|
T39 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T27 |
52 |
|
T31 |
34 |
|
T39 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T27 |
51 |
|
T31 |
31 |
|
T39 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T27 |
50 |
|
T31 |
33 |
|
T39 |
59 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T27 |
51 |
|
T31 |
28 |
|
T39 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T27 |
49 |
|
T31 |
33 |
|
T39 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T27 |
49 |
|
T31 |
28 |
|
T39 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T27 |
48 |
|
T31 |
28 |
|
T39 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T27 |
48 |
|
T31 |
28 |
|
T39 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T27 |
48 |
|
T31 |
28 |
|
T39 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T27 |
45 |
|
T31 |
29 |
|
T39 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T27 |
47 |
|
T31 |
27 |
|
T39 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T27 |
43 |
|
T31 |
28 |
|
T39 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T27 |
45 |
|
T31 |
27 |
|
T39 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T27 |
40 |
|
T31 |
26 |
|
T39 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T27 |
44 |
|
T31 |
27 |
|
T39 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T27 |
19 |
|
T31 |
18 |
|
T39 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T27 |
37 |
|
T31 |
26 |
|
T39 |
50 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61168 |
1 |
|
|
T27 |
1277 |
|
T31 |
1177 |
|
T39 |
1640 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49793 |
1 |
|
|
T27 |
2040 |
|
T31 |
638 |
|
T39 |
2456 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55044 |
1 |
|
|
T27 |
1212 |
|
T31 |
1050 |
|
T39 |
1363 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51825 |
1 |
|
|
T27 |
1010 |
|
T31 |
1520 |
|
T39 |
1055 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T27 |
51 |
|
T31 |
41 |
|
T39 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T27 |
48 |
|
T31 |
40 |
|
T39 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T27 |
18 |
|
T31 |
19 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T27 |
50 |
|
T31 |
38 |
|
T39 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T27 |
47 |
|
T31 |
38 |
|
T39 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T27 |
49 |
|
T31 |
36 |
|
T39 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T27 |
47 |
|
T31 |
38 |
|
T39 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T27 |
48 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T27 |
46 |
|
T31 |
38 |
|
T39 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T27 |
47 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T27 |
43 |
|
T31 |
37 |
|
T39 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T27 |
47 |
|
T31 |
30 |
|
T39 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T27 |
39 |
|
T31 |
37 |
|
T39 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T27 |
46 |
|
T31 |
29 |
|
T39 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T27 |
38 |
|
T31 |
37 |
|
T39 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T27 |
46 |
|
T31 |
29 |
|
T39 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T27 |
35 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T27 |
46 |
|
T31 |
28 |
|
T39 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T27 |
33 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T27 |
46 |
|
T31 |
27 |
|
T39 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T27 |
33 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T27 |
46 |
|
T31 |
27 |
|
T39 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T27 |
31 |
|
T31 |
36 |
|
T39 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T27 |
44 |
|
T31 |
27 |
|
T39 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T27 |
31 |
|
T31 |
35 |
|
T39 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T27 |
43 |
|
T31 |
25 |
|
T39 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T27 |
31 |
|
T31 |
34 |
|
T39 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T27 |
18 |
|
T31 |
18 |
|
T39 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T27 |
41 |
|
T31 |
21 |
|
T39 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T27 |
30 |
|
T31 |
33 |
|
T39 |
38 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57006 |
1 |
|
|
T27 |
2343 |
|
T31 |
1089 |
|
T39 |
1876 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50835 |
1 |
|
|
T27 |
936 |
|
T31 |
617 |
|
T39 |
2075 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64530 |
1 |
|
|
T27 |
1053 |
|
T31 |
1969 |
|
T39 |
1589 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44767 |
1 |
|
|
T27 |
1145 |
|
T31 |
871 |
|
T39 |
1143 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T27 |
53 |
|
T31 |
35 |
|
T39 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T27 |
52 |
|
T31 |
38 |
|
T39 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T27 |
52 |
|
T31 |
35 |
|
T39 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T27 |
52 |
|
T31 |
38 |
|
T39 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T27 |
52 |
|
T31 |
35 |
|
T39 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T27 |
52 |
|
T31 |
38 |
|
T39 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T27 |
50 |
|
T31 |
35 |
|
T39 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T27 |
51 |
|
T31 |
38 |
|
T39 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T27 |
47 |
|
T31 |
34 |
|
T39 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T27 |
46 |
|
T31 |
33 |
|
T39 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T27 |
19 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T27 |
46 |
|
T31 |
31 |
|
T39 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T27 |
43 |
|
T31 |
28 |
|
T39 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T27 |
47 |
|
T31 |
37 |
|
T39 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T27 |
42 |
|
T31 |
28 |
|
T39 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T27 |
46 |
|
T31 |
36 |
|
T39 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T27 |
41 |
|
T31 |
28 |
|
T39 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T27 |
46 |
|
T31 |
35 |
|
T39 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T27 |
39 |
|
T31 |
27 |
|
T39 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T27 |
44 |
|
T31 |
35 |
|
T39 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T27 |
36 |
|
T31 |
26 |
|
T39 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T27 |
43 |
|
T31 |
35 |
|
T39 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T27 |
36 |
|
T31 |
24 |
|
T39 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T27 |
43 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T27 |
36 |
|
T31 |
24 |
|
T39 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T27 |
18 |
|
T31 |
16 |
|
T39 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T27 |
34 |
|
T31 |
23 |
|
T39 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T27 |
18 |
|
T31 |
13 |
|
T39 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T27 |
43 |
|
T31 |
31 |
|
T39 |
39 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65490 |
1 |
|
|
T27 |
2571 |
|
T31 |
1055 |
|
T39 |
1779 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46619 |
1 |
|
|
T27 |
970 |
|
T31 |
741 |
|
T39 |
1208 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62441 |
1 |
|
|
T27 |
1211 |
|
T31 |
1186 |
|
T39 |
2585 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43469 |
1 |
|
|
T27 |
941 |
|
T31 |
1351 |
|
T39 |
1032 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T27 |
41 |
|
T31 |
39 |
|
T39 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T27 |
40 |
|
T31 |
39 |
|
T39 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
825 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T27 |
40 |
|
T31 |
38 |
|
T39 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
825 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T27 |
39 |
|
T31 |
37 |
|
T39 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T27 |
40 |
|
T31 |
35 |
|
T39 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T27 |
39 |
|
T31 |
35 |
|
T39 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T27 |
39 |
|
T31 |
35 |
|
T39 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
821 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T27 |
38 |
|
T31 |
35 |
|
T39 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T27 |
21 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T27 |
37 |
|
T31 |
34 |
|
T39 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T27 |
38 |
|
T31 |
34 |
|
T39 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T27 |
37 |
|
T31 |
32 |
|
T39 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T27 |
38 |
|
T31 |
34 |
|
T39 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T27 |
37 |
|
T31 |
34 |
|
T39 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T27 |
34 |
|
T31 |
34 |
|
T39 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T27 |
34 |
|
T31 |
33 |
|
T39 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T27 |
30 |
|
T31 |
31 |
|
T39 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T27 |
34 |
|
T31 |
33 |
|
T39 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T27 |
29 |
|
T31 |
29 |
|
T39 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T27 |
34 |
|
T31 |
32 |
|
T39 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T27 |
28 |
|
T31 |
28 |
|
T39 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T27 |
27 |
|
T31 |
28 |
|
T39 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T27 |
21 |
|
T31 |
19 |
|
T39 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
20 |
|
T31 |
23 |
|
T39 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T27 |
27 |
|
T31 |
27 |
|
T39 |
37 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64250 |
1 |
|
|
T27 |
2074 |
|
T31 |
1990 |
|
T39 |
1474 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40528 |
1 |
|
|
T27 |
1110 |
|
T31 |
804 |
|
T39 |
839 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65118 |
1 |
|
|
T27 |
1366 |
|
T31 |
899 |
|
T39 |
2061 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48169 |
1 |
|
|
T27 |
1066 |
|
T31 |
831 |
|
T39 |
2300 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
17 |
|
T31 |
18 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T27 |
49 |
|
T31 |
35 |
|
T39 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T27 |
46 |
|
T31 |
38 |
|
T39 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T27 |
17 |
|
T31 |
18 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T27 |
46 |
|
T31 |
33 |
|
T39 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T27 |
45 |
|
T31 |
37 |
|
T39 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T27 |
44 |
|
T31 |
33 |
|
T39 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T27 |
45 |
|
T31 |
37 |
|
T39 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T27 |
41 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T27 |
45 |
|
T31 |
36 |
|
T39 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T27 |
40 |
|
T31 |
33 |
|
T39 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T27 |
44 |
|
T31 |
36 |
|
T39 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T27 |
39 |
|
T31 |
33 |
|
T39 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T27 |
43 |
|
T31 |
35 |
|
T39 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T27 |
39 |
|
T31 |
32 |
|
T39 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T27 |
42 |
|
T31 |
34 |
|
T39 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T27 |
39 |
|
T31 |
32 |
|
T39 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T27 |
42 |
|
T31 |
34 |
|
T39 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T27 |
39 |
|
T31 |
31 |
|
T39 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T27 |
40 |
|
T31 |
33 |
|
T39 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T27 |
38 |
|
T31 |
33 |
|
T39 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T27 |
38 |
|
T31 |
33 |
|
T39 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T27 |
38 |
|
T31 |
32 |
|
T39 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T27 |
37 |
|
T31 |
29 |
|
T39 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T27 |
36 |
|
T31 |
32 |
|
T39 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T27 |
36 |
|
T31 |
26 |
|
T39 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T27 |
35 |
|
T31 |
30 |
|
T39 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T27 |
36 |
|
T31 |
26 |
|
T39 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
20 |
|
T31 |
14 |
|
T39 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T27 |
35 |
|
T31 |
29 |
|
T39 |
40 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57923 |
1 |
|
|
T27 |
997 |
|
T31 |
1921 |
|
T39 |
2551 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50526 |
1 |
|
|
T27 |
1069 |
|
T31 |
677 |
|
T39 |
1229 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58347 |
1 |
|
|
T27 |
1547 |
|
T31 |
1289 |
|
T39 |
1398 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49654 |
1 |
|
|
T27 |
1802 |
|
T31 |
550 |
|
T39 |
1374 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1832 |
1 |
|
|
T27 |
56 |
|
T31 |
36 |
|
T39 |
61 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1819 |
1 |
|
|
T27 |
54 |
|
T31 |
36 |
|
T39 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1789 |
1 |
|
|
T27 |
55 |
|
T31 |
36 |
|
T39 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1787 |
1 |
|
|
T27 |
54 |
|
T31 |
36 |
|
T39 |
62 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T27 |
55 |
|
T31 |
36 |
|
T39 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T27 |
52 |
|
T31 |
35 |
|
T39 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T27 |
53 |
|
T31 |
36 |
|
T39 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T27 |
51 |
|
T31 |
35 |
|
T39 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T27 |
52 |
|
T31 |
35 |
|
T39 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T27 |
48 |
|
T31 |
32 |
|
T39 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T27 |
50 |
|
T31 |
34 |
|
T39 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T27 |
46 |
|
T31 |
31 |
|
T39 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T27 |
50 |
|
T31 |
33 |
|
T39 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T27 |
43 |
|
T31 |
30 |
|
T39 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T27 |
48 |
|
T31 |
33 |
|
T39 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T27 |
43 |
|
T31 |
26 |
|
T39 |
57 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T27 |
43 |
|
T31 |
26 |
|
T39 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T27 |
46 |
|
T31 |
31 |
|
T39 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T27 |
42 |
|
T31 |
24 |
|
T39 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T27 |
46 |
|
T31 |
31 |
|
T39 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T27 |
41 |
|
T31 |
24 |
|
T39 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T27 |
45 |
|
T31 |
30 |
|
T39 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T27 |
40 |
|
T31 |
23 |
|
T39 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T27 |
42 |
|
T31 |
29 |
|
T39 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T27 |
37 |
|
T31 |
23 |
|
T39 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T27 |
41 |
|
T31 |
29 |
|
T39 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T27 |
37 |
|
T31 |
22 |
|
T39 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T27 |
18 |
|
T31 |
21 |
|
T39 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T27 |
41 |
|
T31 |
28 |
|
T39 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T27 |
20 |
|
T31 |
20 |
|
T39 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T27 |
37 |
|
T31 |
22 |
|
T39 |
47 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58356 |
1 |
|
|
T27 |
1984 |
|
T31 |
999 |
|
T39 |
1901 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44878 |
1 |
|
|
T27 |
1212 |
|
T31 |
878 |
|
T39 |
885 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60641 |
1 |
|
|
T27 |
1307 |
|
T31 |
1290 |
|
T39 |
1777 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54005 |
1 |
|
|
T27 |
1027 |
|
T31 |
1304 |
|
T39 |
2140 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T27 |
53 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T27 |
47 |
|
T31 |
34 |
|
T39 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T27 |
53 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T27 |
47 |
|
T31 |
33 |
|
T39 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T27 |
52 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T27 |
45 |
|
T31 |
31 |
|
T39 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T27 |
50 |
|
T31 |
36 |
|
T39 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T27 |
45 |
|
T31 |
31 |
|
T39 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T27 |
50 |
|
T31 |
35 |
|
T39 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T27 |
44 |
|
T31 |
30 |
|
T39 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T27 |
15 |
|
T31 |
18 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T27 |
49 |
|
T31 |
34 |
|
T39 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T27 |
40 |
|
T31 |
30 |
|
T39 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T27 |
48 |
|
T31 |
33 |
|
T39 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T27 |
48 |
|
T31 |
33 |
|
T39 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T27 |
48 |
|
T31 |
33 |
|
T39 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T27 |
38 |
|
T31 |
29 |
|
T39 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T27 |
48 |
|
T31 |
31 |
|
T39 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T27 |
36 |
|
T31 |
28 |
|
T39 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T27 |
47 |
|
T31 |
31 |
|
T39 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T27 |
34 |
|
T31 |
28 |
|
T39 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T27 |
47 |
|
T31 |
31 |
|
T39 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T27 |
34 |
|
T31 |
28 |
|
T39 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T27 |
46 |
|
T31 |
30 |
|
T39 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T27 |
33 |
|
T31 |
28 |
|
T39 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T27 |
46 |
|
T31 |
28 |
|
T39 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T27 |
32 |
|
T31 |
27 |
|
T39 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T27 |
15 |
|
T31 |
17 |
|
T39 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T27 |
45 |
|
T31 |
28 |
|
T39 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T27 |
21 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T27 |
32 |
|
T31 |
26 |
|
T39 |
35 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65889 |
1 |
|
|
T27 |
902 |
|
T31 |
1582 |
|
T39 |
1526 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47937 |
1 |
|
|
T27 |
1984 |
|
T31 |
674 |
|
T39 |
1416 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58550 |
1 |
|
|
T27 |
1219 |
|
T31 |
1417 |
|
T39 |
2348 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43179 |
1 |
|
|
T27 |
1364 |
|
T31 |
619 |
|
T39 |
1093 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T27 |
18 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T27 |
52 |
|
T31 |
39 |
|
T39 |
65 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1777 |
1 |
|
|
T27 |
55 |
|
T31 |
40 |
|
T39 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T27 |
18 |
|
T31 |
23 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T27 |
52 |
|
T31 |
37 |
|
T39 |
65 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T27 |
55 |
|
T31 |
39 |
|
T39 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T27 |
52 |
|
T31 |
38 |
|
T39 |
64 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T27 |
54 |
|
T31 |
39 |
|
T39 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T27 |
51 |
|
T31 |
36 |
|
T39 |
64 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T27 |
54 |
|
T31 |
39 |
|
T39 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T27 |
49 |
|
T31 |
36 |
|
T39 |
63 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T27 |
53 |
|
T31 |
37 |
|
T39 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T27 |
48 |
|
T31 |
36 |
|
T39 |
63 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T27 |
53 |
|
T31 |
37 |
|
T39 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T27 |
45 |
|
T31 |
34 |
|
T39 |
61 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T27 |
53 |
|
T31 |
37 |
|
T39 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T27 |
42 |
|
T31 |
34 |
|
T39 |
60 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T27 |
52 |
|
T31 |
35 |
|
T39 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T27 |
41 |
|
T31 |
33 |
|
T39 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T27 |
52 |
|
T31 |
33 |
|
T39 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T27 |
52 |
|
T31 |
33 |
|
T39 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T27 |
51 |
|
T31 |
33 |
|
T39 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T27 |
38 |
|
T31 |
30 |
|
T39 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T27 |
48 |
|
T31 |
32 |
|
T39 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T27 |
36 |
|
T31 |
29 |
|
T39 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T27 |
46 |
|
T31 |
32 |
|
T39 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T27 |
33 |
|
T31 |
28 |
|
T39 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T27 |
46 |
|
T31 |
31 |
|
T39 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T27 |
18 |
|
T31 |
22 |
|
T39 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T27 |
33 |
|
T31 |
27 |
|
T39 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T27 |
15 |
|
T31 |
21 |
|
T39 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T27 |
45 |
|
T31 |
31 |
|
T39 |
33 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56045 |
1 |
|
|
T27 |
1156 |
|
T31 |
986 |
|
T39 |
1608 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50728 |
1 |
|
|
T27 |
1043 |
|
T31 |
896 |
|
T39 |
1117 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55707 |
1 |
|
|
T27 |
2066 |
|
T31 |
1496 |
|
T39 |
2593 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52378 |
1 |
|
|
T27 |
1059 |
|
T31 |
1046 |
|
T39 |
1120 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
10 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1844 |
1 |
|
|
T27 |
53 |
|
T31 |
49 |
|
T39 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1878 |
1 |
|
|
T27 |
55 |
|
T31 |
47 |
|
T39 |
60 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
22 |
|
T31 |
10 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1802 |
1 |
|
|
T27 |
52 |
|
T31 |
49 |
|
T39 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1835 |
1 |
|
|
T27 |
54 |
|
T31 |
47 |
|
T39 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T27 |
52 |
|
T31 |
50 |
|
T39 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T27 |
53 |
|
T31 |
46 |
|
T39 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T27 |
50 |
|
T31 |
49 |
|
T39 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1762 |
1 |
|
|
T27 |
53 |
|
T31 |
43 |
|
T39 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T27 |
46 |
|
T31 |
48 |
|
T39 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T27 |
53 |
|
T31 |
41 |
|
T39 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T27 |
45 |
|
T31 |
47 |
|
T39 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T27 |
21 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T27 |
53 |
|
T31 |
40 |
|
T39 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T27 |
44 |
|
T31 |
42 |
|
T39 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T27 |
51 |
|
T31 |
40 |
|
T39 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T27 |
44 |
|
T31 |
42 |
|
T39 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T27 |
51 |
|
T31 |
39 |
|
T39 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T27 |
42 |
|
T31 |
42 |
|
T39 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T27 |
51 |
|
T31 |
39 |
|
T39 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T27 |
42 |
|
T31 |
41 |
|
T39 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T27 |
42 |
|
T31 |
39 |
|
T39 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T27 |
47 |
|
T31 |
37 |
|
T39 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T27 |
46 |
|
T31 |
36 |
|
T39 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T27 |
40 |
|
T31 |
36 |
|
T39 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T27 |
45 |
|
T31 |
35 |
|
T39 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T27 |
22 |
|
T31 |
9 |
|
T39 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T27 |
37 |
|
T31 |
33 |
|
T39 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T27 |
20 |
|
T31 |
11 |
|
T39 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T27 |
44 |
|
T31 |
34 |
|
T39 |
44 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60297 |
1 |
|
|
T27 |
1244 |
|
T31 |
1116 |
|
T39 |
1464 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48436 |
1 |
|
|
T27 |
1000 |
|
T31 |
1435 |
|
T39 |
1149 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59762 |
1 |
|
|
T27 |
2521 |
|
T31 |
1146 |
|
T39 |
1230 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49073 |
1 |
|
|
T27 |
835 |
|
T31 |
820 |
|
T39 |
2716 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T27 |
24 |
|
T31 |
18 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
66 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T27 |
44 |
|
T31 |
36 |
|
T39 |
64 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T27 |
24 |
|
T31 |
18 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T27 |
41 |
|
T31 |
36 |
|
T39 |
62 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T27 |
43 |
|
T31 |
35 |
|
T39 |
63 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T27 |
41 |
|
T31 |
35 |
|
T39 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T27 |
43 |
|
T31 |
35 |
|
T39 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T27 |
38 |
|
T31 |
35 |
|
T39 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T27 |
42 |
|
T31 |
34 |
|
T39 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T27 |
35 |
|
T31 |
34 |
|
T39 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T27 |
41 |
|
T31 |
33 |
|
T39 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T27 |
34 |
|
T31 |
33 |
|
T39 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T27 |
41 |
|
T31 |
32 |
|
T39 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T27 |
33 |
|
T31 |
32 |
|
T39 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T27 |
33 |
|
T31 |
32 |
|
T39 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T27 |
38 |
|
T31 |
30 |
|
T39 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T27 |
33 |
|
T31 |
32 |
|
T39 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T27 |
37 |
|
T31 |
29 |
|
T39 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T27 |
33 |
|
T31 |
31 |
|
T39 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T27 |
37 |
|
T31 |
29 |
|
T39 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T27 |
31 |
|
T31 |
31 |
|
T39 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T27 |
37 |
|
T31 |
29 |
|
T39 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T27 |
30 |
|
T31 |
31 |
|
T39 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T27 |
37 |
|
T31 |
28 |
|
T39 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T27 |
29 |
|
T31 |
28 |
|
T39 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T27 |
36 |
|
T31 |
27 |
|
T39 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T27 |
28 |
|
T31 |
26 |
|
T39 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T27 |
36 |
|
T31 |
26 |
|
T39 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T27 |
24 |
|
T31 |
17 |
|
T39 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T27 |
28 |
|
T31 |
26 |
|
T39 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T27 |
22 |
|
T31 |
17 |
|
T39 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T27 |
35 |
|
T31 |
25 |
|
T39 |
48 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63012 |
1 |
|
|
T27 |
2151 |
|
T31 |
1127 |
|
T39 |
3196 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51996 |
1 |
|
|
T27 |
1011 |
|
T31 |
1444 |
|
T39 |
1055 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56058 |
1 |
|
|
T27 |
1478 |
|
T31 |
996 |
|
T39 |
1710 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45672 |
1 |
|
|
T27 |
889 |
|
T31 |
799 |
|
T39 |
725 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1764 |
1 |
|
|
T27 |
53 |
|
T31 |
40 |
|
T39 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T27 |
49 |
|
T31 |
43 |
|
T39 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T27 |
52 |
|
T31 |
40 |
|
T39 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T27 |
48 |
|
T31 |
43 |
|
T39 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T27 |
51 |
|
T31 |
40 |
|
T39 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T27 |
47 |
|
T31 |
41 |
|
T39 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T27 |
49 |
|
T31 |
38 |
|
T39 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T27 |
46 |
|
T31 |
41 |
|
T39 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T27 |
48 |
|
T31 |
37 |
|
T39 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T27 |
43 |
|
T31 |
40 |
|
T39 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T27 |
47 |
|
T31 |
36 |
|
T39 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T27 |
21 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T27 |
42 |
|
T31 |
39 |
|
T39 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T27 |
46 |
|
T31 |
35 |
|
T39 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T27 |
42 |
|
T31 |
38 |
|
T39 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T27 |
45 |
|
T31 |
34 |
|
T39 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T27 |
41 |
|
T31 |
37 |
|
T39 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T27 |
42 |
|
T31 |
33 |
|
T39 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T27 |
40 |
|
T31 |
36 |
|
T39 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T27 |
42 |
|
T31 |
33 |
|
T39 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T27 |
39 |
|
T31 |
33 |
|
T39 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T27 |
42 |
|
T31 |
32 |
|
T39 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T27 |
39 |
|
T31 |
31 |
|
T39 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T27 |
42 |
|
T31 |
31 |
|
T39 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T27 |
38 |
|
T31 |
31 |
|
T39 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T27 |
41 |
|
T31 |
31 |
|
T39 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T27 |
35 |
|
T31 |
29 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T27 |
34 |
|
T31 |
29 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
20 |
|
T39 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
20 |
|
T31 |
16 |
|
T39 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T27 |
33 |
|
T31 |
28 |
|
T39 |
30 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64942 |
1 |
|
|
T27 |
2412 |
|
T31 |
1238 |
|
T39 |
1635 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52788 |
1 |
|
|
T27 |
849 |
|
T31 |
831 |
|
T39 |
2233 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56988 |
1 |
|
|
T27 |
1500 |
|
T31 |
1404 |
|
T39 |
1595 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42130 |
1 |
|
|
T27 |
794 |
|
T31 |
912 |
|
T39 |
977 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
26 |
|
T31 |
17 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1776 |
1 |
|
|
T27 |
41 |
|
T31 |
41 |
|
T39 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T27 |
40 |
|
T31 |
44 |
|
T39 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T27 |
26 |
|
T31 |
17 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T27 |
41 |
|
T31 |
39 |
|
T39 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T27 |
38 |
|
T31 |
44 |
|
T39 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T27 |
38 |
|
T31 |
40 |
|
T39 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T27 |
36 |
|
T31 |
44 |
|
T39 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T27 |
38 |
|
T31 |
40 |
|
T39 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T27 |
36 |
|
T31 |
44 |
|
T39 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T27 |
37 |
|
T31 |
37 |
|
T39 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T27 |
35 |
|
T31 |
43 |
|
T39 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T27 |
35 |
|
T31 |
37 |
|
T39 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T27 |
27 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T27 |
35 |
|
T31 |
42 |
|
T39 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T27 |
35 |
|
T31 |
35 |
|
T39 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T27 |
35 |
|
T31 |
42 |
|
T39 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T27 |
34 |
|
T31 |
34 |
|
T39 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T27 |
35 |
|
T31 |
42 |
|
T39 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T27 |
34 |
|
T31 |
34 |
|
T39 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T27 |
34 |
|
T31 |
42 |
|
T39 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T27 |
33 |
|
T31 |
42 |
|
T39 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T27 |
34 |
|
T31 |
29 |
|
T39 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T27 |
33 |
|
T31 |
42 |
|
T39 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T27 |
32 |
|
T31 |
27 |
|
T39 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T27 |
33 |
|
T31 |
42 |
|
T39 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T27 |
32 |
|
T31 |
27 |
|
T39 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T27 |
32 |
|
T31 |
40 |
|
T39 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T27 |
32 |
|
T31 |
24 |
|
T39 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T27 |
30 |
|
T31 |
39 |
|
T39 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T27 |
26 |
|
T31 |
16 |
|
T39 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T27 |
32 |
|
T31 |
24 |
|
T39 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T27 |
26 |
|
T31 |
14 |
|
T39 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T27 |
30 |
|
T31 |
38 |
|
T39 |
34 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61715 |
1 |
|
|
T27 |
1727 |
|
T31 |
1885 |
|
T39 |
1501 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48212 |
1 |
|
|
T27 |
933 |
|
T31 |
777 |
|
T39 |
2006 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60276 |
1 |
|
|
T27 |
1210 |
|
T31 |
1107 |
|
T39 |
2023 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46097 |
1 |
|
|
T27 |
1804 |
|
T31 |
684 |
|
T39 |
884 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1775 |
1 |
|
|
T27 |
47 |
|
T31 |
42 |
|
T39 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1781 |
1 |
|
|
T27 |
48 |
|
T31 |
39 |
|
T39 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T27 |
17 |
|
T31 |
17 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T27 |
47 |
|
T31 |
41 |
|
T39 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T27 |
47 |
|
T31 |
38 |
|
T39 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T27 |
43 |
|
T31 |
38 |
|
T39 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T27 |
47 |
|
T31 |
36 |
|
T39 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T27 |
42 |
|
T31 |
37 |
|
T39 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T27 |
46 |
|
T31 |
36 |
|
T39 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T27 |
40 |
|
T31 |
37 |
|
T39 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T27 |
46 |
|
T31 |
34 |
|
T39 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T27 |
39 |
|
T31 |
35 |
|
T39 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T27 |
43 |
|
T31 |
33 |
|
T39 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T27 |
39 |
|
T31 |
34 |
|
T39 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T27 |
41 |
|
T31 |
32 |
|
T39 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T27 |
39 |
|
T31 |
33 |
|
T39 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T27 |
41 |
|
T31 |
32 |
|
T39 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T27 |
39 |
|
T31 |
33 |
|
T39 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T27 |
40 |
|
T31 |
31 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T27 |
38 |
|
T31 |
31 |
|
T39 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T27 |
39 |
|
T31 |
30 |
|
T39 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T27 |
36 |
|
T31 |
31 |
|
T39 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T27 |
39 |
|
T31 |
28 |
|
T39 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T27 |
37 |
|
T31 |
27 |
|
T39 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T27 |
34 |
|
T31 |
31 |
|
T39 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T27 |
36 |
|
T31 |
27 |
|
T39 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T27 |
33 |
|
T31 |
30 |
|
T39 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T27 |
35 |
|
T31 |
25 |
|
T39 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T27 |
17 |
|
T31 |
16 |
|
T39 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T27 |
33 |
|
T31 |
29 |
|
T39 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T27 |
17 |
|
T31 |
19 |
|
T39 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T27 |
33 |
|
T31 |
25 |
|
T39 |
30 |