Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3667821 |
1 |
|
|
T19 |
944 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1928659 |
1 |
|
|
T19 |
1082 |
|
T22 |
4 |
|
T29 |
17379 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5360179 |
1 |
|
|
T19 |
1997 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
236301 |
1 |
|
|
T19 |
29 |
|
T29 |
2245 |
|
T100 |
146 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3689655 |
1 |
|
|
T19 |
1181 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1906825 |
1 |
|
|
T19 |
845 |
|
T22 |
4 |
|
T29 |
18441 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
838806 |
1 |
|
|
T19 |
443 |
|
T22 |
4 |
|
T29 |
8570 |
| auto[1] |
auto[0] |
auto[1] |
118866 |
1 |
|
|
T19 |
16 |
|
T29 |
1178 |
|
T100 |
61 |
| auto[1] |
auto[1] |
auto[0] |
831718 |
1 |
|
|
T19 |
373 |
|
T29 |
7626 |
|
T100 |
400 |
| auto[1] |
auto[1] |
auto[1] |
117435 |
1 |
|
|
T19 |
13 |
|
T29 |
1067 |
|
T100 |
85 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |