Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3693053 |
1 |
|
|
T19 |
1145 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1903427 |
1 |
|
|
T19 |
881 |
|
T22 |
4 |
|
T29 |
17998 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5358205 |
1 |
|
|
T19 |
1994 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
238275 |
1 |
|
|
T19 |
32 |
|
T29 |
2172 |
|
T100 |
172 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3672379 |
1 |
|
|
T19 |
1102 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1924101 |
1 |
|
|
T19 |
924 |
|
T29 |
18334 |
|
T100 |
924 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
848683 |
1 |
|
|
T19 |
461 |
|
T29 |
8221 |
|
T100 |
441 |
| auto[1] |
auto[0] |
auto[1] |
120367 |
1 |
|
|
T19 |
17 |
|
T29 |
1068 |
|
T100 |
104 |
| auto[1] |
auto[1] |
auto[0] |
837143 |
1 |
|
|
T19 |
431 |
|
T29 |
7941 |
|
T100 |
311 |
| auto[1] |
auto[1] |
auto[1] |
117908 |
1 |
|
|
T19 |
15 |
|
T29 |
1104 |
|
T100 |
68 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |