Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3682686 |
1 |
|
|
T19 |
1204 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1913794 |
1 |
|
|
T19 |
822 |
|
T29 |
16482 |
|
T100 |
712 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5359668 |
1 |
|
|
T19 |
2000 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
236812 |
1 |
|
|
T19 |
26 |
|
T29 |
2172 |
|
T100 |
113 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3684103 |
1 |
|
|
T19 |
1260 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1912377 |
1 |
|
|
T19 |
766 |
|
T22 |
4 |
|
T29 |
18367 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
839151 |
1 |
|
|
T19 |
459 |
|
T22 |
4 |
|
T29 |
8661 |
| auto[1] |
auto[0] |
auto[1] |
118047 |
1 |
|
|
T19 |
16 |
|
T29 |
1150 |
|
T100 |
56 |
| auto[1] |
auto[1] |
auto[0] |
836414 |
1 |
|
|
T19 |
281 |
|
T29 |
7534 |
|
T100 |
254 |
| auto[1] |
auto[1] |
auto[1] |
118765 |
1 |
|
|
T19 |
10 |
|
T29 |
1022 |
|
T100 |
57 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |