Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3689515 |
1 |
|
|
T19 |
1004 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1906965 |
1 |
|
|
T19 |
1022 |
|
T22 |
4 |
|
T29 |
18430 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5360706 |
1 |
|
|
T19 |
2004 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
235774 |
1 |
|
|
T19 |
22 |
|
T29 |
2175 |
|
T100 |
105 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3688864 |
1 |
|
|
T19 |
1120 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1907616 |
1 |
|
|
T19 |
906 |
|
T29 |
19028 |
|
T100 |
577 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
843456 |
1 |
|
|
T19 |
365 |
|
T29 |
8234 |
|
T100 |
280 |
| auto[1] |
auto[0] |
auto[1] |
118856 |
1 |
|
|
T19 |
11 |
|
T29 |
1077 |
|
T100 |
63 |
| auto[1] |
auto[1] |
auto[0] |
828386 |
1 |
|
|
T19 |
519 |
|
T29 |
8619 |
|
T100 |
192 |
| auto[1] |
auto[1] |
auto[1] |
116918 |
1 |
|
|
T19 |
11 |
|
T29 |
1098 |
|
T100 |
42 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |