Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3694763 |
1 |
|
|
T19 |
955 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1901717 |
1 |
|
|
T19 |
1071 |
|
T22 |
4 |
|
T29 |
18090 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5361586 |
1 |
|
|
T19 |
1990 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
234894 |
1 |
|
|
T19 |
36 |
|
T29 |
2258 |
|
T100 |
158 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3700120 |
1 |
|
|
T19 |
1113 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1896360 |
1 |
|
|
T19 |
913 |
|
T29 |
18416 |
|
T100 |
847 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
838311 |
1 |
|
|
T19 |
413 |
|
T29 |
7992 |
|
T100 |
368 |
| auto[1] |
auto[0] |
auto[1] |
118708 |
1 |
|
|
T19 |
21 |
|
T29 |
1080 |
|
T100 |
95 |
| auto[1] |
auto[1] |
auto[0] |
823155 |
1 |
|
|
T19 |
464 |
|
T29 |
8166 |
|
T100 |
321 |
| auto[1] |
auto[1] |
auto[1] |
116186 |
1 |
|
|
T19 |
15 |
|
T29 |
1178 |
|
T100 |
63 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |