Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3679937 |
1 |
|
|
T19 |
1035 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1916543 |
1 |
|
|
T19 |
991 |
|
T22 |
5 |
|
T29 |
18393 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4674205 |
1 |
|
|
T19 |
1297 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
922275 |
1 |
|
|
T19 |
729 |
|
T29 |
11084 |
|
T100 |
375 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3700295 |
1 |
|
|
T19 |
1090 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1896185 |
1 |
|
|
T19 |
936 |
|
T29 |
17970 |
|
T100 |
781 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
486466 |
1 |
|
|
T19 |
114 |
|
T29 |
3059 |
|
T100 |
155 |
| auto[1] |
auto[0] |
auto[1] |
461174 |
1 |
|
|
T19 |
433 |
|
T29 |
5399 |
|
T100 |
138 |
| auto[1] |
auto[1] |
auto[0] |
487444 |
1 |
|
|
T19 |
93 |
|
T29 |
3827 |
|
T100 |
251 |
| auto[1] |
auto[1] |
auto[1] |
461101 |
1 |
|
|
T19 |
296 |
|
T29 |
5685 |
|
T100 |
237 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |