Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3683218 |
1 |
|
|
T19 |
935 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1913262 |
1 |
|
|
T19 |
1091 |
|
T22 |
4 |
|
T29 |
17479 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4667200 |
1 |
|
|
T19 |
1385 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
929280 |
1 |
|
|
T19 |
641 |
|
T29 |
11335 |
|
T100 |
285 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3688962 |
1 |
|
|
T19 |
1055 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1907518 |
1 |
|
|
T19 |
971 |
|
T29 |
17832 |
|
T100 |
581 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
488432 |
1 |
|
|
T19 |
117 |
|
T29 |
3317 |
|
T100 |
140 |
| auto[1] |
auto[0] |
auto[1] |
466879 |
1 |
|
|
T19 |
275 |
|
T29 |
5622 |
|
T100 |
122 |
| auto[1] |
auto[1] |
auto[0] |
489806 |
1 |
|
|
T19 |
213 |
|
T29 |
3180 |
|
T100 |
156 |
| auto[1] |
auto[1] |
auto[1] |
462401 |
1 |
|
|
T19 |
366 |
|
T29 |
5713 |
|
T100 |
163 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |