Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
3678737 |
1 |
|
|
T19 |
1077 |
|
T20 |
1 |
|
T21 |
155 |
auto[1] |
1917743 |
1 |
|
|
T19 |
949 |
|
T22 |
9 |
|
T29 |
17358 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4671023 |
1 |
|
|
T19 |
1435 |
|
T20 |
1 |
|
T21 |
155 |
auto[1] |
925457 |
1 |
|
|
T19 |
591 |
|
T29 |
10942 |
|
T100 |
384 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
3688776 |
1 |
|
|
T19 |
1210 |
|
T20 |
1 |
|
T21 |
155 |
auto[1] |
1907704 |
1 |
|
|
T19 |
816 |
|
T29 |
17274 |
|
T100 |
768 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
493104 |
1 |
|
|
T19 |
86 |
|
T29 |
3250 |
|
T100 |
238 |
auto[1] |
auto[0] |
auto[1] |
462886 |
1 |
|
|
T19 |
240 |
|
T29 |
5431 |
|
T100 |
219 |
auto[1] |
auto[1] |
auto[0] |
489143 |
1 |
|
|
T19 |
139 |
|
T29 |
3082 |
|
T100 |
146 |
auto[1] |
auto[1] |
auto[1] |
462571 |
1 |
|
|
T19 |
351 |
|
T29 |
5511 |
|
T100 |
165 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |