Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3699336 |
1 |
|
|
T19 |
912 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1897144 |
1 |
|
|
T19 |
1114 |
|
T22 |
4 |
|
T29 |
17072 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4663822 |
1 |
|
|
T19 |
1279 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
932658 |
1 |
|
|
T19 |
747 |
|
T29 |
9782 |
|
T100 |
431 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3676139 |
1 |
|
|
T19 |
1036 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1920341 |
1 |
|
|
T19 |
990 |
|
T29 |
15780 |
|
T100 |
869 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
501113 |
1 |
|
|
T19 |
64 |
|
T29 |
3119 |
|
T100 |
192 |
| auto[1] |
auto[0] |
auto[1] |
473923 |
1 |
|
|
T19 |
374 |
|
T29 |
5060 |
|
T100 |
190 |
| auto[1] |
auto[1] |
auto[0] |
486570 |
1 |
|
|
T19 |
179 |
|
T29 |
2879 |
|
T100 |
246 |
| auto[1] |
auto[1] |
auto[1] |
458735 |
1 |
|
|
T19 |
373 |
|
T29 |
4722 |
|
T100 |
241 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |