Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3681353 |
1 |
|
|
T19 |
1004 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1915127 |
1 |
|
|
T19 |
1022 |
|
T22 |
5 |
|
T29 |
16930 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4662054 |
1 |
|
|
T19 |
1344 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
934426 |
1 |
|
|
T19 |
682 |
|
T29 |
10965 |
|
T100 |
241 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3680291 |
1 |
|
|
T19 |
1079 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1916189 |
1 |
|
|
T19 |
947 |
|
T29 |
17676 |
|
T100 |
499 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
491652 |
1 |
|
|
T19 |
143 |
|
T29 |
3647 |
|
T100 |
136 |
| auto[1] |
auto[0] |
auto[1] |
465009 |
1 |
|
|
T19 |
341 |
|
T29 |
5907 |
|
T100 |
144 |
| auto[1] |
auto[1] |
auto[0] |
490111 |
1 |
|
|
T19 |
122 |
|
T29 |
3064 |
|
T100 |
122 |
| auto[1] |
auto[1] |
auto[1] |
469417 |
1 |
|
|
T19 |
341 |
|
T29 |
5058 |
|
T100 |
97 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |