Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3676240 |
1 |
|
|
T19 |
1170 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1920240 |
1 |
|
|
T19 |
856 |
|
T22 |
5 |
|
T29 |
18423 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5360356 |
1 |
|
|
T19 |
1981 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
236124 |
1 |
|
|
T19 |
45 |
|
T29 |
2141 |
|
T100 |
144 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3688360 |
1 |
|
|
T19 |
849 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1908120 |
1 |
|
|
T19 |
1177 |
|
T29 |
18270 |
|
T100 |
713 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
827119 |
1 |
|
|
T19 |
633 |
|
T29 |
7531 |
|
T100 |
288 |
| auto[1] |
auto[0] |
auto[1] |
116620 |
1 |
|
|
T19 |
23 |
|
T29 |
954 |
|
T100 |
64 |
| auto[1] |
auto[1] |
auto[0] |
844877 |
1 |
|
|
T19 |
499 |
|
T29 |
8598 |
|
T100 |
281 |
| auto[1] |
auto[1] |
auto[1] |
119504 |
1 |
|
|
T19 |
22 |
|
T29 |
1187 |
|
T100 |
80 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |