Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3683096 |
1 |
|
|
T19 |
846 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1913384 |
1 |
|
|
T19 |
1180 |
|
T22 |
9 |
|
T29 |
17385 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4672138 |
1 |
|
|
T19 |
1186 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
924342 |
1 |
|
|
T19 |
840 |
|
T29 |
11375 |
|
T100 |
313 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3691479 |
1 |
|
|
T19 |
928 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1905001 |
1 |
|
|
T19 |
1098 |
|
T29 |
17873 |
|
T100 |
668 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
486789 |
1 |
|
|
T19 |
105 |
|
T29 |
3330 |
|
T100 |
121 |
| auto[1] |
auto[0] |
auto[1] |
460740 |
1 |
|
|
T19 |
400 |
|
T29 |
5981 |
|
T100 |
142 |
| auto[1] |
auto[1] |
auto[0] |
493870 |
1 |
|
|
T19 |
153 |
|
T29 |
3168 |
|
T100 |
234 |
| auto[1] |
auto[1] |
auto[1] |
463602 |
1 |
|
|
T19 |
440 |
|
T29 |
5394 |
|
T100 |
171 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |