Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3677437 |
1 |
|
|
T19 |
1048 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1919043 |
1 |
|
|
T19 |
978 |
|
T22 |
5 |
|
T29 |
16428 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4666363 |
1 |
|
|
T19 |
1260 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
930117 |
1 |
|
|
T19 |
766 |
|
T29 |
10891 |
|
T100 |
327 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3682268 |
1 |
|
|
T19 |
1003 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1914212 |
1 |
|
|
T19 |
1023 |
|
T29 |
17263 |
|
T100 |
673 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
489278 |
1 |
|
|
T19 |
115 |
|
T29 |
3486 |
|
T100 |
242 |
| auto[1] |
auto[0] |
auto[1] |
465012 |
1 |
|
|
T19 |
442 |
|
T29 |
5958 |
|
T100 |
237 |
| auto[1] |
auto[1] |
auto[0] |
494817 |
1 |
|
|
T19 |
142 |
|
T29 |
2886 |
|
T100 |
104 |
| auto[1] |
auto[1] |
auto[1] |
465105 |
1 |
|
|
T19 |
324 |
|
T29 |
4933 |
|
T100 |
90 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |