Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3688006 |
1 |
|
|
T19 |
1263 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1908474 |
1 |
|
|
T19 |
763 |
|
T22 |
5 |
|
T29 |
17987 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5359524 |
1 |
|
|
T19 |
1996 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
236956 |
1 |
|
|
T19 |
30 |
|
T29 |
2111 |
|
T100 |
110 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3686111 |
1 |
|
|
T19 |
1151 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1910369 |
1 |
|
|
T19 |
875 |
|
T29 |
18206 |
|
T100 |
583 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
837492 |
1 |
|
|
T19 |
497 |
|
T29 |
8169 |
|
T100 |
230 |
| auto[1] |
auto[0] |
auto[1] |
118968 |
1 |
|
|
T19 |
17 |
|
T29 |
1040 |
|
T100 |
53 |
| auto[1] |
auto[1] |
auto[0] |
835921 |
1 |
|
|
T19 |
348 |
|
T29 |
7926 |
|
T100 |
243 |
| auto[1] |
auto[1] |
auto[1] |
117988 |
1 |
|
|
T19 |
13 |
|
T29 |
1071 |
|
T100 |
57 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |