Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3678415 |
1 |
|
|
T19 |
896 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1918065 |
1 |
|
|
T19 |
1130 |
|
T22 |
4 |
|
T29 |
18014 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5359632 |
1 |
|
|
T19 |
1980 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
236848 |
1 |
|
|
T19 |
46 |
|
T29 |
2051 |
|
T100 |
149 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3684391 |
1 |
|
|
T19 |
930 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1912089 |
1 |
|
|
T19 |
1096 |
|
T29 |
18101 |
|
T100 |
834 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
832693 |
1 |
|
|
T19 |
537 |
|
T29 |
7861 |
|
T100 |
394 |
| auto[1] |
auto[0] |
auto[1] |
117108 |
1 |
|
|
T19 |
25 |
|
T29 |
1011 |
|
T100 |
85 |
| auto[1] |
auto[1] |
auto[0] |
842548 |
1 |
|
|
T19 |
513 |
|
T29 |
8189 |
|
T100 |
291 |
| auto[1] |
auto[1] |
auto[1] |
119740 |
1 |
|
|
T19 |
21 |
|
T29 |
1040 |
|
T100 |
64 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |