Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3675887 |
1 |
|
|
T19 |
1095 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1920593 |
1 |
|
|
T19 |
931 |
|
T22 |
4 |
|
T29 |
17990 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5359477 |
1 |
|
|
T19 |
1996 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
237003 |
1 |
|
|
T19 |
30 |
|
T29 |
2166 |
|
T100 |
133 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3682758 |
1 |
|
|
T19 |
1301 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1913722 |
1 |
|
|
T19 |
725 |
|
T29 |
17678 |
|
T100 |
761 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
838998 |
1 |
|
|
T19 |
382 |
|
T29 |
7617 |
|
T100 |
231 |
| auto[1] |
auto[0] |
auto[1] |
118394 |
1 |
|
|
T19 |
17 |
|
T29 |
1080 |
|
T100 |
48 |
| auto[1] |
auto[1] |
auto[0] |
837721 |
1 |
|
|
T19 |
313 |
|
T29 |
7895 |
|
T100 |
397 |
| auto[1] |
auto[1] |
auto[1] |
118609 |
1 |
|
|
T19 |
13 |
|
T29 |
1086 |
|
T100 |
85 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |