Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3677663 |
1 |
|
|
T19 |
953 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1918817 |
1 |
|
|
T19 |
1073 |
|
T22 |
9 |
|
T29 |
18005 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5358999 |
1 |
|
|
T19 |
1993 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
237481 |
1 |
|
|
T19 |
33 |
|
T29 |
2037 |
|
T100 |
157 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3677794 |
1 |
|
|
T19 |
943 |
|
T20 |
1 |
|
T21 |
155 |
| auto[1] |
1918686 |
1 |
|
|
T19 |
1083 |
|
T29 |
18363 |
|
T100 |
866 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
835971 |
1 |
|
|
T19 |
481 |
|
T29 |
7535 |
|
T100 |
442 |
| auto[1] |
auto[0] |
auto[1] |
117321 |
1 |
|
|
T19 |
15 |
|
T29 |
873 |
|
T100 |
102 |
| auto[1] |
auto[1] |
auto[0] |
845234 |
1 |
|
|
T19 |
569 |
|
T29 |
8791 |
|
T100 |
267 |
| auto[1] |
auto[1] |
auto[1] |
120160 |
1 |
|
|
T19 |
18 |
|
T29 |
1164 |
|
T100 |
55 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |