Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4210806 |
1 |
|
|
T25 |
1118 |
|
T26 |
159 |
|
T1 |
15328 |
| auto[1] |
2019195 |
1 |
|
|
T25 |
954 |
|
T1 |
11432 |
|
T11 |
170 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5289233 |
1 |
|
|
T25 |
1191 |
|
T26 |
159 |
|
T1 |
19970 |
| auto[1] |
940768 |
1 |
|
|
T25 |
881 |
|
T1 |
6790 |
|
T11 |
77 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4227379 |
1 |
|
|
T25 |
898 |
|
T26 |
159 |
|
T1 |
14872 |
| auto[1] |
2002622 |
1 |
|
|
T25 |
1174 |
|
T1 |
11888 |
|
T11 |
135 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
529972 |
1 |
|
|
T25 |
152 |
|
T1 |
2856 |
|
T11 |
35 |
| auto[1] |
auto[0] |
auto[1] |
470559 |
1 |
|
|
T25 |
421 |
|
T1 |
3879 |
|
T11 |
40 |
| auto[1] |
auto[1] |
auto[0] |
531882 |
1 |
|
|
T25 |
141 |
|
T1 |
2242 |
|
T11 |
23 |
| auto[1] |
auto[1] |
auto[1] |
470209 |
1 |
|
|
T25 |
460 |
|
T1 |
2911 |
|
T11 |
37 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |