Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4216381 |
1 |
|
|
T25 |
960 |
|
T26 |
159 |
|
T1 |
16019 |
| auto[1] |
2013620 |
1 |
|
|
T25 |
1112 |
|
T1 |
10741 |
|
T11 |
134 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5296024 |
1 |
|
|
T25 |
1379 |
|
T26 |
159 |
|
T1 |
19782 |
| auto[1] |
933977 |
1 |
|
|
T25 |
693 |
|
T1 |
6978 |
|
T11 |
115 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4229452 |
1 |
|
|
T25 |
1058 |
|
T26 |
159 |
|
T1 |
14519 |
| auto[1] |
2000549 |
1 |
|
|
T25 |
1014 |
|
T1 |
12241 |
|
T11 |
186 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
535893 |
1 |
|
|
T25 |
136 |
|
T1 |
3103 |
|
T11 |
34 |
| auto[1] |
auto[0] |
auto[1] |
470821 |
1 |
|
|
T25 |
318 |
|
T1 |
4127 |
|
T11 |
74 |
| auto[1] |
auto[1] |
auto[0] |
530679 |
1 |
|
|
T25 |
185 |
|
T1 |
2160 |
|
T11 |
37 |
| auto[1] |
auto[1] |
auto[1] |
463156 |
1 |
|
|
T25 |
375 |
|
T1 |
2851 |
|
T11 |
41 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |