Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4224021 |
1 |
|
|
T25 |
967 |
|
T26 |
159 |
|
T1 |
15602 |
| auto[1] |
2005980 |
1 |
|
|
T25 |
1105 |
|
T1 |
11158 |
|
T11 |
203 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5294690 |
1 |
|
|
T25 |
1391 |
|
T26 |
159 |
|
T1 |
20007 |
| auto[1] |
935311 |
1 |
|
|
T25 |
681 |
|
T1 |
6753 |
|
T11 |
57 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4228724 |
1 |
|
|
T25 |
1205 |
|
T26 |
159 |
|
T1 |
14849 |
| auto[1] |
2001277 |
1 |
|
|
T25 |
867 |
|
T1 |
11911 |
|
T11 |
129 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
540026 |
1 |
|
|
T25 |
56 |
|
T1 |
2738 |
|
T11 |
28 |
| auto[1] |
auto[0] |
auto[1] |
475695 |
1 |
|
|
T25 |
334 |
|
T1 |
3676 |
|
T11 |
19 |
| auto[1] |
auto[1] |
auto[0] |
525940 |
1 |
|
|
T25 |
130 |
|
T1 |
2420 |
|
T11 |
44 |
| auto[1] |
auto[1] |
auto[1] |
459616 |
1 |
|
|
T25 |
347 |
|
T1 |
3077 |
|
T11 |
38 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |