Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4200456 |
1 |
|
|
T25 |
1130 |
|
T26 |
159 |
|
T1 |
14458 |
| auto[1] |
2029545 |
1 |
|
|
T25 |
942 |
|
T1 |
12302 |
|
T11 |
143 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5281908 |
1 |
|
|
T25 |
1303 |
|
T26 |
159 |
|
T1 |
20244 |
| auto[1] |
948093 |
1 |
|
|
T25 |
769 |
|
T1 |
6516 |
|
T11 |
82 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4201785 |
1 |
|
|
T25 |
1043 |
|
T26 |
159 |
|
T1 |
15168 |
| auto[1] |
2028216 |
1 |
|
|
T25 |
1029 |
|
T1 |
11592 |
|
T11 |
157 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
534317 |
1 |
|
|
T25 |
132 |
|
T1 |
2516 |
|
T11 |
36 |
| auto[1] |
auto[0] |
auto[1] |
471431 |
1 |
|
|
T25 |
393 |
|
T1 |
3026 |
|
T11 |
56 |
| auto[1] |
auto[1] |
auto[0] |
545806 |
1 |
|
|
T25 |
128 |
|
T1 |
2560 |
|
T11 |
39 |
| auto[1] |
auto[1] |
auto[1] |
476662 |
1 |
|
|
T25 |
376 |
|
T1 |
3490 |
|
T11 |
26 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |