Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4209592 |
1 |
|
|
T25 |
923 |
|
T26 |
159 |
|
T1 |
15848 |
| auto[1] |
2020409 |
1 |
|
|
T25 |
1149 |
|
T1 |
10912 |
|
T11 |
193 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5283651 |
1 |
|
|
T25 |
1223 |
|
T26 |
159 |
|
T1 |
20296 |
| auto[1] |
946350 |
1 |
|
|
T25 |
849 |
|
T1 |
6464 |
|
T11 |
115 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4202464 |
1 |
|
|
T25 |
931 |
|
T26 |
159 |
|
T1 |
15430 |
| auto[1] |
2027537 |
1 |
|
|
T25 |
1141 |
|
T1 |
11330 |
|
T11 |
177 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
542289 |
1 |
|
|
T25 |
132 |
|
T1 |
2415 |
|
T11 |
13 |
| auto[1] |
auto[0] |
auto[1] |
469363 |
1 |
|
|
T25 |
384 |
|
T1 |
3286 |
|
T11 |
60 |
| auto[1] |
auto[1] |
auto[0] |
538898 |
1 |
|
|
T25 |
160 |
|
T1 |
2451 |
|
T11 |
49 |
| auto[1] |
auto[1] |
auto[1] |
476987 |
1 |
|
|
T25 |
465 |
|
T1 |
3178 |
|
T11 |
55 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |