Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4197936 |
1 |
|
|
T25 |
1147 |
|
T26 |
159 |
|
T1 |
13929 |
| auto[1] |
2032065 |
1 |
|
|
T25 |
925 |
|
T1 |
12831 |
|
T11 |
217 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5972126 |
1 |
|
|
T25 |
2030 |
|
T26 |
159 |
|
T1 |
24897 |
| auto[1] |
257875 |
1 |
|
|
T25 |
42 |
|
T1 |
1863 |
|
T11 |
13 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4220823 |
1 |
|
|
T25 |
1019 |
|
T26 |
159 |
|
T1 |
14383 |
| auto[1] |
2009178 |
1 |
|
|
T25 |
1053 |
|
T1 |
12377 |
|
T11 |
136 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
875636 |
1 |
|
|
T25 |
578 |
|
T1 |
4589 |
|
T11 |
40 |
| auto[1] |
auto[0] |
auto[1] |
128332 |
1 |
|
|
T25 |
29 |
|
T1 |
789 |
|
T11 |
3 |
| auto[1] |
auto[1] |
auto[0] |
875667 |
1 |
|
|
T25 |
433 |
|
T1 |
5925 |
|
T11 |
83 |
| auto[1] |
auto[1] |
auto[1] |
129543 |
1 |
|
|
T25 |
13 |
|
T1 |
1074 |
|
T11 |
10 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |