Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4195997 |
1 |
|
|
T25 |
1048 |
|
T26 |
159 |
|
T1 |
15071 |
| auto[1] |
2034004 |
1 |
|
|
T25 |
1024 |
|
T1 |
11689 |
|
T11 |
193 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5292519 |
1 |
|
|
T25 |
1412 |
|
T26 |
159 |
|
T1 |
19517 |
| auto[1] |
937482 |
1 |
|
|
T25 |
660 |
|
T1 |
7243 |
|
T11 |
55 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4226462 |
1 |
|
|
T25 |
1112 |
|
T26 |
159 |
|
T1 |
14323 |
| auto[1] |
2003539 |
1 |
|
|
T25 |
960 |
|
T1 |
12437 |
|
T11 |
140 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
529449 |
1 |
|
|
T25 |
128 |
|
T1 |
2756 |
|
T11 |
31 |
| auto[1] |
auto[0] |
auto[1] |
468375 |
1 |
|
|
T25 |
361 |
|
T1 |
3808 |
|
T11 |
10 |
| auto[1] |
auto[1] |
auto[0] |
536608 |
1 |
|
|
T25 |
172 |
|
T1 |
2438 |
|
T11 |
54 |
| auto[1] |
auto[1] |
auto[1] |
469107 |
1 |
|
|
T25 |
299 |
|
T1 |
3435 |
|
T11 |
45 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |