cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55951 |
1 |
|
|
T17 |
2501 |
|
T64 |
997 |
|
T98 |
1629 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44156 |
1 |
|
|
T17 |
1182 |
|
T64 |
1603 |
|
T98 |
1640 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61091 |
1 |
|
|
T17 |
1428 |
|
T64 |
1683 |
|
T98 |
1554 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48064 |
1 |
|
|
T17 |
1041 |
|
T64 |
1303 |
|
T98 |
1211 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T17 |
45 |
|
T64 |
68 |
|
T98 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T17 |
47 |
|
T64 |
62 |
|
T98 |
58 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T17 |
44 |
|
T64 |
67 |
|
T98 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T17 |
47 |
|
T64 |
61 |
|
T98 |
56 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
44 |
|
T64 |
66 |
|
T98 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
47 |
|
T64 |
60 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T17 |
44 |
|
T64 |
66 |
|
T98 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T17 |
45 |
|
T64 |
58 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T17 |
42 |
|
T64 |
64 |
|
T98 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T17 |
44 |
|
T64 |
58 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T17 |
42 |
|
T64 |
61 |
|
T98 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T17 |
44 |
|
T64 |
57 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T17 |
41 |
|
T64 |
59 |
|
T98 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T17 |
43 |
|
T64 |
56 |
|
T98 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T17 |
40 |
|
T64 |
58 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T17 |
41 |
|
T64 |
55 |
|
T98 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T17 |
40 |
|
T64 |
58 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
41 |
|
T64 |
51 |
|
T98 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T17 |
39 |
|
T64 |
57 |
|
T98 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T17 |
41 |
|
T64 |
48 |
|
T98 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T17 |
39 |
|
T64 |
56 |
|
T98 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T17 |
39 |
|
T64 |
46 |
|
T98 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T17 |
39 |
|
T64 |
55 |
|
T98 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T17 |
37 |
|
T64 |
45 |
|
T98 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T17 |
38 |
|
T64 |
53 |
|
T98 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T17 |
37 |
|
T64 |
44 |
|
T98 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T17 |
38 |
|
T64 |
51 |
|
T98 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T17 |
33 |
|
T64 |
42 |
|
T98 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
25 |
|
T64 |
13 |
|
T98 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T17 |
38 |
|
T64 |
51 |
|
T98 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
22 |
|
T64 |
19 |
|
T98 |
18 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T17 |
32 |
|
T64 |
38 |
|
T98 |
46 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50625 |
1 |
|
|
T17 |
1209 |
|
T64 |
1395 |
|
T98 |
1956 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53253 |
1 |
|
|
T17 |
2286 |
|
T64 |
932 |
|
T98 |
1409 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53253 |
1 |
|
|
T17 |
1352 |
|
T64 |
1749 |
|
T98 |
1198 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51265 |
1 |
|
|
T17 |
1255 |
|
T64 |
1836 |
|
T98 |
1385 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T17 |
56 |
|
T64 |
44 |
|
T98 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T17 |
54 |
|
T64 |
45 |
|
T98 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T17 |
56 |
|
T64 |
44 |
|
T98 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T17 |
52 |
|
T64 |
44 |
|
T98 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T17 |
55 |
|
T64 |
43 |
|
T98 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T17 |
49 |
|
T64 |
44 |
|
T98 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T17 |
55 |
|
T64 |
43 |
|
T98 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T17 |
48 |
|
T64 |
42 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T17 |
53 |
|
T64 |
42 |
|
T98 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T17 |
47 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T17 |
49 |
|
T64 |
41 |
|
T98 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T17 |
46 |
|
T64 |
40 |
|
T98 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T17 |
47 |
|
T64 |
41 |
|
T98 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T17 |
44 |
|
T64 |
35 |
|
T98 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T17 |
42 |
|
T64 |
35 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T17 |
41 |
|
T64 |
35 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T17 |
42 |
|
T64 |
37 |
|
T98 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T17 |
40 |
|
T64 |
35 |
|
T98 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T17 |
40 |
|
T64 |
36 |
|
T98 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T17 |
37 |
|
T64 |
35 |
|
T98 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
40 |
|
T64 |
35 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T17 |
36 |
|
T64 |
33 |
|
T98 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T17 |
39 |
|
T64 |
33 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T17 |
35 |
|
T64 |
31 |
|
T98 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T17 |
38 |
|
T64 |
31 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T17 |
35 |
|
T64 |
31 |
|
T98 |
43 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56962 |
1 |
|
|
T17 |
1764 |
|
T64 |
1670 |
|
T98 |
1487 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48087 |
1 |
|
|
T17 |
1354 |
|
T64 |
1004 |
|
T98 |
2099 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56413 |
1 |
|
|
T17 |
1071 |
|
T64 |
1954 |
|
T98 |
1518 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47260 |
1 |
|
|
T17 |
2026 |
|
T64 |
1178 |
|
T98 |
889 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T17 |
50 |
|
T64 |
46 |
|
T98 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T17 |
49 |
|
T64 |
51 |
|
T98 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T17 |
50 |
|
T64 |
46 |
|
T98 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T17 |
49 |
|
T64 |
49 |
|
T98 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T17 |
50 |
|
T64 |
46 |
|
T98 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T17 |
50 |
|
T64 |
45 |
|
T98 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T17 |
48 |
|
T64 |
45 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T17 |
47 |
|
T64 |
45 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T17 |
47 |
|
T64 |
47 |
|
T98 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T17 |
46 |
|
T64 |
45 |
|
T98 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T17 |
46 |
|
T64 |
46 |
|
T98 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T17 |
46 |
|
T64 |
44 |
|
T98 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T17 |
46 |
|
T64 |
42 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T17 |
42 |
|
T64 |
42 |
|
T98 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T17 |
45 |
|
T64 |
41 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T17 |
39 |
|
T64 |
40 |
|
T98 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T17 |
44 |
|
T64 |
41 |
|
T98 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T17 |
39 |
|
T64 |
39 |
|
T98 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T17 |
44 |
|
T64 |
40 |
|
T98 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T17 |
37 |
|
T64 |
37 |
|
T98 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T17 |
44 |
|
T64 |
40 |
|
T98 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T17 |
44 |
|
T64 |
39 |
|
T98 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T17 |
35 |
|
T64 |
34 |
|
T98 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
17 |
|
T64 |
24 |
|
T98 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T17 |
44 |
|
T64 |
38 |
|
T98 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T17 |
19 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T17 |
32 |
|
T64 |
33 |
|
T98 |
32 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61366 |
1 |
|
|
T17 |
1244 |
|
T64 |
2299 |
|
T98 |
1310 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48136 |
1 |
|
|
T17 |
2010 |
|
T64 |
1153 |
|
T98 |
968 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59556 |
1 |
|
|
T17 |
1914 |
|
T64 |
1591 |
|
T98 |
1873 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40446 |
1 |
|
|
T17 |
1092 |
|
T64 |
845 |
|
T98 |
1707 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T17 |
40 |
|
T64 |
50 |
|
T98 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T17 |
38 |
|
T64 |
42 |
|
T98 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T17 |
40 |
|
T64 |
49 |
|
T98 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
37 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T17 |
39 |
|
T64 |
49 |
|
T98 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T17 |
37 |
|
T64 |
40 |
|
T98 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T17 |
39 |
|
T64 |
49 |
|
T98 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T17 |
37 |
|
T64 |
39 |
|
T98 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T17 |
39 |
|
T64 |
48 |
|
T98 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T17 |
36 |
|
T64 |
38 |
|
T98 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T17 |
38 |
|
T64 |
48 |
|
T98 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
27 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T17 |
34 |
|
T64 |
38 |
|
T98 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T17 |
37 |
|
T64 |
47 |
|
T98 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T17 |
34 |
|
T64 |
35 |
|
T98 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T17 |
37 |
|
T64 |
47 |
|
T98 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T17 |
34 |
|
T64 |
33 |
|
T98 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T17 |
37 |
|
T64 |
45 |
|
T98 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T17 |
33 |
|
T64 |
31 |
|
T98 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T17 |
36 |
|
T64 |
45 |
|
T98 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T17 |
33 |
|
T64 |
31 |
|
T98 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T17 |
34 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T17 |
33 |
|
T64 |
28 |
|
T98 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
34 |
|
T64 |
44 |
|
T98 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T17 |
33 |
|
T64 |
26 |
|
T98 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T17 |
34 |
|
T64 |
43 |
|
T98 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T17 |
32 |
|
T64 |
25 |
|
T98 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T17 |
34 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T17 |
30 |
|
T64 |
24 |
|
T98 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
18 |
|
T98 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T17 |
34 |
|
T64 |
39 |
|
T98 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
26 |
|
T64 |
26 |
|
T98 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T17 |
30 |
|
T64 |
23 |
|
T98 |
34 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56356 |
1 |
|
|
T17 |
1618 |
|
T64 |
1493 |
|
T98 |
1714 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43672 |
1 |
|
|
T17 |
1019 |
|
T64 |
1102 |
|
T98 |
1209 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61529 |
1 |
|
|
T17 |
2518 |
|
T64 |
2149 |
|
T98 |
1560 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48520 |
1 |
|
|
T17 |
967 |
|
T64 |
951 |
|
T98 |
1649 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
52 |
|
T64 |
44 |
|
T98 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
19 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T17 |
55 |
|
T64 |
46 |
|
T98 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T17 |
52 |
|
T64 |
44 |
|
T98 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
19 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T17 |
54 |
|
T64 |
45 |
|
T98 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T17 |
52 |
|
T64 |
42 |
|
T98 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T17 |
54 |
|
T64 |
43 |
|
T98 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
51 |
|
T64 |
42 |
|
T98 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T17 |
53 |
|
T64 |
41 |
|
T98 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T17 |
49 |
|
T64 |
41 |
|
T98 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T17 |
51 |
|
T64 |
41 |
|
T98 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T17 |
21 |
|
T64 |
30 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T17 |
48 |
|
T64 |
41 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T17 |
50 |
|
T64 |
41 |
|
T98 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T17 |
48 |
|
T64 |
39 |
|
T98 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T17 |
48 |
|
T64 |
39 |
|
T98 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T17 |
46 |
|
T64 |
39 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T17 |
46 |
|
T64 |
39 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T17 |
45 |
|
T64 |
38 |
|
T98 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T17 |
43 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T17 |
44 |
|
T64 |
37 |
|
T98 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T17 |
39 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T17 |
43 |
|
T64 |
37 |
|
T98 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T17 |
37 |
|
T64 |
36 |
|
T98 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T17 |
43 |
|
T64 |
35 |
|
T98 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T17 |
35 |
|
T64 |
36 |
|
T98 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T17 |
43 |
|
T64 |
35 |
|
T98 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T17 |
35 |
|
T64 |
36 |
|
T98 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
21 |
|
T64 |
29 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T17 |
41 |
|
T64 |
32 |
|
T98 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
28 |
|
T98 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T17 |
34 |
|
T64 |
36 |
|
T98 |
34 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58282 |
1 |
|
|
T17 |
2996 |
|
T64 |
1052 |
|
T98 |
1470 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47083 |
1 |
|
|
T17 |
1214 |
|
T64 |
882 |
|
T98 |
1053 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58858 |
1 |
|
|
T17 |
1261 |
|
T64 |
2659 |
|
T98 |
2400 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45906 |
1 |
|
|
T17 |
749 |
|
T64 |
1310 |
|
T98 |
1014 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T17 |
49 |
|
T64 |
50 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
21 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T17 |
49 |
|
T64 |
53 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
21 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T17 |
47 |
|
T64 |
52 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T17 |
49 |
|
T64 |
47 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T17 |
47 |
|
T64 |
50 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T17 |
49 |
|
T64 |
46 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T17 |
47 |
|
T64 |
50 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T17 |
49 |
|
T64 |
44 |
|
T98 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T17 |
47 |
|
T64 |
49 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
21 |
|
T64 |
20 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T17 |
47 |
|
T64 |
41 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T17 |
44 |
|
T64 |
48 |
|
T98 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T17 |
40 |
|
T64 |
48 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T17 |
45 |
|
T64 |
39 |
|
T98 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T17 |
39 |
|
T64 |
45 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T17 |
42 |
|
T64 |
38 |
|
T98 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T17 |
37 |
|
T64 |
44 |
|
T98 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T17 |
42 |
|
T64 |
37 |
|
T98 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T17 |
34 |
|
T64 |
44 |
|
T98 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T17 |
40 |
|
T64 |
36 |
|
T98 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T17 |
33 |
|
T64 |
44 |
|
T98 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T17 |
40 |
|
T64 |
34 |
|
T98 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T17 |
33 |
|
T64 |
42 |
|
T98 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T17 |
39 |
|
T64 |
33 |
|
T98 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T17 |
39 |
|
T64 |
33 |
|
T98 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T17 |
38 |
|
T64 |
33 |
|
T98 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
20 |
|
T64 |
17 |
|
T98 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T17 |
32 |
|
T64 |
39 |
|
T98 |
36 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58965 |
1 |
|
|
T17 |
1203 |
|
T64 |
1744 |
|
T98 |
1341 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44726 |
1 |
|
|
T17 |
2270 |
|
T64 |
724 |
|
T98 |
1192 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61448 |
1 |
|
|
T17 |
1704 |
|
T64 |
2800 |
|
T98 |
1978 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44312 |
1 |
|
|
T17 |
869 |
|
T64 |
731 |
|
T98 |
1621 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T17 |
55 |
|
T64 |
40 |
|
T98 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T17 |
51 |
|
T64 |
33 |
|
T98 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T17 |
55 |
|
T64 |
40 |
|
T98 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T17 |
50 |
|
T64 |
30 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T17 |
55 |
|
T64 |
38 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T17 |
51 |
|
T64 |
30 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T17 |
53 |
|
T64 |
38 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T17 |
48 |
|
T64 |
30 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T17 |
52 |
|
T64 |
37 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T17 |
47 |
|
T64 |
29 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T17 |
51 |
|
T64 |
37 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T17 |
44 |
|
T64 |
28 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T17 |
51 |
|
T64 |
37 |
|
T98 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T17 |
44 |
|
T64 |
28 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T17 |
49 |
|
T64 |
36 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T17 |
44 |
|
T64 |
28 |
|
T98 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T17 |
48 |
|
T64 |
35 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T17 |
44 |
|
T64 |
28 |
|
T98 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T17 |
48 |
|
T64 |
35 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T17 |
42 |
|
T64 |
28 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T17 |
47 |
|
T64 |
35 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T17 |
42 |
|
T64 |
28 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T17 |
46 |
|
T64 |
30 |
|
T98 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T17 |
41 |
|
T64 |
28 |
|
T98 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T17 |
46 |
|
T64 |
30 |
|
T98 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T17 |
37 |
|
T64 |
27 |
|
T98 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T17 |
46 |
|
T64 |
30 |
|
T98 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T17 |
35 |
|
T64 |
25 |
|
T98 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T17 |
46 |
|
T64 |
29 |
|
T98 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
23 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T17 |
33 |
|
T64 |
25 |
|
T98 |
30 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56872 |
1 |
|
|
T17 |
1613 |
|
T64 |
1520 |
|
T98 |
963 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46447 |
1 |
|
|
T17 |
869 |
|
T64 |
1862 |
|
T98 |
1282 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55606 |
1 |
|
|
T17 |
2666 |
|
T64 |
1201 |
|
T98 |
1324 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49768 |
1 |
|
|
T17 |
1038 |
|
T64 |
1157 |
|
T98 |
2199 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T17 |
48 |
|
T64 |
49 |
|
T98 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T17 |
42 |
|
T64 |
51 |
|
T98 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T17 |
47 |
|
T64 |
48 |
|
T98 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T17 |
41 |
|
T64 |
50 |
|
T98 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T17 |
46 |
|
T64 |
46 |
|
T98 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T17 |
40 |
|
T64 |
48 |
|
T98 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T17 |
45 |
|
T64 |
46 |
|
T98 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T17 |
40 |
|
T64 |
47 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
44 |
|
T64 |
45 |
|
T98 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T17 |
40 |
|
T64 |
45 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T17 |
44 |
|
T64 |
44 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T17 |
38 |
|
T64 |
45 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T17 |
44 |
|
T64 |
43 |
|
T98 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T17 |
38 |
|
T64 |
43 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T17 |
43 |
|
T64 |
43 |
|
T98 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T17 |
37 |
|
T64 |
41 |
|
T98 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T17 |
42 |
|
T64 |
40 |
|
T98 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T17 |
35 |
|
T64 |
41 |
|
T98 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T17 |
39 |
|
T64 |
40 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T17 |
35 |
|
T64 |
41 |
|
T98 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T17 |
39 |
|
T64 |
40 |
|
T98 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T17 |
34 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T17 |
37 |
|
T64 |
39 |
|
T98 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T17 |
34 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
37 |
|
T64 |
38 |
|
T98 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T17 |
33 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T17 |
34 |
|
T64 |
38 |
|
T98 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T17 |
33 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
21 |
|
T64 |
25 |
|
T98 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T17 |
32 |
|
T64 |
36 |
|
T98 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
28 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
48 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63401 |
1 |
|
|
T17 |
2485 |
|
T64 |
2212 |
|
T98 |
1859 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46103 |
1 |
|
|
T17 |
1284 |
|
T64 |
955 |
|
T98 |
836 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57920 |
1 |
|
|
T17 |
1254 |
|
T64 |
1965 |
|
T98 |
2400 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42591 |
1 |
|
|
T17 |
1150 |
|
T64 |
843 |
|
T98 |
1058 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
51 |
|
T64 |
40 |
|
T98 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T17 |
48 |
|
T64 |
43 |
|
T98 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T17 |
50 |
|
T64 |
40 |
|
T98 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T17 |
46 |
|
T64 |
43 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T17 |
50 |
|
T64 |
36 |
|
T98 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T17 |
49 |
|
T64 |
34 |
|
T98 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T17 |
46 |
|
T64 |
42 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
49 |
|
T64 |
33 |
|
T98 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T17 |
46 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T17 |
18 |
|
T64 |
26 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T17 |
49 |
|
T64 |
32 |
|
T98 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T17 |
45 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T17 |
49 |
|
T64 |
32 |
|
T98 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T17 |
44 |
|
T64 |
40 |
|
T98 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T17 |
49 |
|
T64 |
32 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T17 |
43 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T17 |
46 |
|
T64 |
32 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T17 |
43 |
|
T64 |
37 |
|
T98 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T17 |
46 |
|
T64 |
30 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T17 |
43 |
|
T64 |
37 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T17 |
43 |
|
T64 |
28 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T17 |
43 |
|
T64 |
35 |
|
T98 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T17 |
43 |
|
T64 |
27 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T17 |
41 |
|
T64 |
35 |
|
T98 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T17 |
43 |
|
T64 |
27 |
|
T98 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T17 |
40 |
|
T64 |
35 |
|
T98 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T17 |
41 |
|
T64 |
26 |
|
T98 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T17 |
38 |
|
T64 |
34 |
|
T98 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
18 |
|
T64 |
25 |
|
T98 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T17 |
41 |
|
T64 |
25 |
|
T98 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T17 |
37 |
|
T64 |
34 |
|
T98 |
35 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57807 |
1 |
|
|
T17 |
1695 |
|
T64 |
1424 |
|
T98 |
2267 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50167 |
1 |
|
|
T17 |
1112 |
|
T64 |
1186 |
|
T98 |
1015 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56227 |
1 |
|
|
T17 |
1387 |
|
T64 |
2112 |
|
T98 |
1977 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44431 |
1 |
|
|
T17 |
1989 |
|
T64 |
1036 |
|
T98 |
821 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T17 |
46 |
|
T64 |
51 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T17 |
47 |
|
T64 |
52 |
|
T98 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T17 |
43 |
|
T64 |
50 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T17 |
46 |
|
T64 |
52 |
|
T98 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T17 |
43 |
|
T64 |
49 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T17 |
47 |
|
T64 |
52 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T17 |
43 |
|
T64 |
47 |
|
T98 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T17 |
46 |
|
T64 |
51 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T17 |
43 |
|
T64 |
47 |
|
T98 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T17 |
45 |
|
T64 |
51 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T17 |
44 |
|
T64 |
49 |
|
T98 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T17 |
42 |
|
T64 |
42 |
|
T98 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T17 |
44 |
|
T64 |
49 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T17 |
42 |
|
T64 |
41 |
|
T98 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T17 |
44 |
|
T64 |
46 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T17 |
42 |
|
T64 |
40 |
|
T98 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T17 |
42 |
|
T64 |
40 |
|
T98 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T17 |
42 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T17 |
41 |
|
T64 |
39 |
|
T98 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T17 |
41 |
|
T64 |
45 |
|
T98 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T17 |
40 |
|
T64 |
38 |
|
T98 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T17 |
40 |
|
T64 |
44 |
|
T98 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T17 |
40 |
|
T64 |
36 |
|
T98 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T17 |
40 |
|
T64 |
44 |
|
T98 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T17 |
38 |
|
T64 |
36 |
|
T98 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T17 |
36 |
|
T64 |
42 |
|
T98 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T17 |
36 |
|
T64 |
34 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T17 |
35 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59830 |
1 |
|
|
T17 |
1282 |
|
T64 |
2143 |
|
T98 |
1721 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45630 |
1 |
|
|
T17 |
998 |
|
T64 |
1344 |
|
T98 |
1060 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56979 |
1 |
|
|
T17 |
1357 |
|
T64 |
1371 |
|
T98 |
1605 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45502 |
1 |
|
|
T17 |
2346 |
|
T64 |
855 |
|
T98 |
1454 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T17 |
54 |
|
T64 |
61 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T17 |
53 |
|
T64 |
58 |
|
T98 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T17 |
53 |
|
T64 |
61 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T17 |
52 |
|
T64 |
56 |
|
T98 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T17 |
53 |
|
T64 |
59 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T17 |
52 |
|
T64 |
54 |
|
T98 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T17 |
51 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T17 |
52 |
|
T64 |
53 |
|
T98 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T17 |
49 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T17 |
52 |
|
T64 |
52 |
|
T98 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
22 |
|
T64 |
17 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T17 |
48 |
|
T64 |
58 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T17 |
50 |
|
T64 |
49 |
|
T98 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T17 |
46 |
|
T64 |
57 |
|
T98 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T17 |
48 |
|
T64 |
45 |
|
T98 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T17 |
45 |
|
T64 |
55 |
|
T98 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T17 |
47 |
|
T64 |
44 |
|
T98 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T17 |
44 |
|
T64 |
55 |
|
T98 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T17 |
44 |
|
T64 |
54 |
|
T98 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T17 |
42 |
|
T64 |
53 |
|
T98 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T17 |
41 |
|
T64 |
53 |
|
T98 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T17 |
46 |
|
T64 |
33 |
|
T98 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T17 |
41 |
|
T64 |
53 |
|
T98 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T17 |
46 |
|
T64 |
32 |
|
T98 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T17 |
41 |
|
T64 |
53 |
|
T98 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T17 |
46 |
|
T64 |
30 |
|
T98 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
16 |
|
T98 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T17 |
40 |
|
T64 |
52 |
|
T98 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
24 |
|
T64 |
19 |
|
T98 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T17 |
46 |
|
T64 |
29 |
|
T98 |
36 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57694 |
1 |
|
|
T17 |
1403 |
|
T64 |
1949 |
|
T98 |
2017 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49008 |
1 |
|
|
T17 |
1124 |
|
T64 |
691 |
|
T98 |
1266 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56056 |
1 |
|
|
T17 |
1401 |
|
T64 |
2450 |
|
T98 |
1504 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46967 |
1 |
|
|
T17 |
2392 |
|
T64 |
609 |
|
T98 |
1230 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T17 |
50 |
|
T64 |
37 |
|
T98 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T17 |
49 |
|
T64 |
41 |
|
T98 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T17 |
48 |
|
T64 |
35 |
|
T98 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T17 |
48 |
|
T64 |
40 |
|
T98 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
46 |
|
T64 |
34 |
|
T98 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T17 |
48 |
|
T64 |
39 |
|
T98 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T17 |
45 |
|
T64 |
34 |
|
T98 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T17 |
45 |
|
T64 |
32 |
|
T98 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
16 |
|
T64 |
37 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T17 |
44 |
|
T64 |
32 |
|
T98 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T17 |
46 |
|
T64 |
38 |
|
T98 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T17 |
44 |
|
T64 |
31 |
|
T98 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T17 |
43 |
|
T64 |
38 |
|
T98 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T17 |
42 |
|
T64 |
31 |
|
T98 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T17 |
41 |
|
T64 |
37 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T17 |
40 |
|
T64 |
30 |
|
T98 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T17 |
40 |
|
T64 |
37 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T17 |
37 |
|
T64 |
30 |
|
T98 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T17 |
40 |
|
T64 |
35 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T17 |
37 |
|
T64 |
29 |
|
T98 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T17 |
40 |
|
T64 |
32 |
|
T98 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T17 |
36 |
|
T64 |
29 |
|
T98 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T17 |
40 |
|
T64 |
30 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T17 |
36 |
|
T64 |
29 |
|
T98 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T17 |
39 |
|
T64 |
30 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T17 |
35 |
|
T64 |
27 |
|
T98 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T17 |
39 |
|
T64 |
29 |
|
T98 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T17 |
16 |
|
T64 |
36 |
|
T98 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T17 |
35 |
|
T64 |
25 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
18 |
|
T64 |
33 |
|
T98 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T17 |
38 |
|
T64 |
29 |
|
T98 |
40 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57540 |
1 |
|
|
T17 |
1442 |
|
T64 |
1720 |
|
T98 |
1499 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47778 |
1 |
|
|
T17 |
941 |
|
T64 |
1820 |
|
T98 |
1284 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59521 |
1 |
|
|
T17 |
1599 |
|
T64 |
1070 |
|
T98 |
2105 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45888 |
1 |
|
|
T17 |
2198 |
|
T64 |
1331 |
|
T98 |
1134 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T17 |
46 |
|
T64 |
56 |
|
T98 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T17 |
54 |
|
T64 |
57 |
|
T98 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T17 |
46 |
|
T64 |
54 |
|
T98 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
51 |
|
T64 |
57 |
|
T98 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T17 |
45 |
|
T64 |
51 |
|
T98 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T17 |
50 |
|
T64 |
57 |
|
T98 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T17 |
44 |
|
T64 |
50 |
|
T98 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T17 |
50 |
|
T64 |
55 |
|
T98 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T17 |
41 |
|
T64 |
48 |
|
T98 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T17 |
49 |
|
T64 |
55 |
|
T98 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T17 |
39 |
|
T64 |
46 |
|
T98 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T17 |
47 |
|
T64 |
55 |
|
T98 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T17 |
38 |
|
T64 |
46 |
|
T98 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T17 |
47 |
|
T64 |
55 |
|
T98 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T17 |
38 |
|
T64 |
46 |
|
T98 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T17 |
45 |
|
T64 |
55 |
|
T98 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T17 |
37 |
|
T64 |
44 |
|
T98 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T17 |
45 |
|
T64 |
55 |
|
T98 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T17 |
36 |
|
T64 |
40 |
|
T98 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T17 |
45 |
|
T64 |
54 |
|
T98 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T17 |
44 |
|
T64 |
53 |
|
T98 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T17 |
32 |
|
T64 |
36 |
|
T98 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T17 |
43 |
|
T64 |
53 |
|
T98 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T17 |
32 |
|
T64 |
35 |
|
T98 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T17 |
43 |
|
T64 |
51 |
|
T98 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T17 |
32 |
|
T64 |
33 |
|
T98 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T17 |
42 |
|
T64 |
51 |
|
T98 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
25 |
|
T64 |
12 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T17 |
30 |
|
T64 |
31 |
|
T98 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
18 |
|
T64 |
10 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T17 |
42 |
|
T64 |
51 |
|
T98 |
36 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55752 |
1 |
|
|
T17 |
2336 |
|
T64 |
2383 |
|
T98 |
1551 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48858 |
1 |
|
|
T17 |
1431 |
|
T64 |
1169 |
|
T98 |
1697 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55369 |
1 |
|
|
T17 |
988 |
|
T64 |
1186 |
|
T98 |
1407 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49827 |
1 |
|
|
T17 |
1292 |
|
T64 |
928 |
|
T98 |
1317 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T17 |
60 |
|
T64 |
51 |
|
T98 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T17 |
18 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T17 |
57 |
|
T64 |
57 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T17 |
60 |
|
T64 |
51 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T17 |
18 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T17 |
57 |
|
T64 |
55 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T17 |
59 |
|
T64 |
48 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T17 |
56 |
|
T64 |
54 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T17 |
58 |
|
T64 |
47 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T17 |
55 |
|
T64 |
53 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T17 |
58 |
|
T64 |
45 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T17 |
54 |
|
T64 |
49 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T17 |
57 |
|
T64 |
45 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T17 |
53 |
|
T64 |
48 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T17 |
55 |
|
T64 |
44 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T17 |
52 |
|
T64 |
47 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T17 |
55 |
|
T64 |
43 |
|
T98 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T17 |
52 |
|
T64 |
43 |
|
T98 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T17 |
54 |
|
T64 |
43 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
51 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T17 |
52 |
|
T64 |
43 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T17 |
51 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T17 |
52 |
|
T64 |
42 |
|
T98 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T17 |
46 |
|
T64 |
40 |
|
T98 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T17 |
51 |
|
T64 |
41 |
|
T98 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T17 |
44 |
|
T64 |
39 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T17 |
50 |
|
T64 |
39 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T17 |
43 |
|
T64 |
38 |
|
T98 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T17 |
48 |
|
T64 |
38 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T17 |
40 |
|
T64 |
37 |
|
T98 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
15 |
|
T64 |
28 |
|
T98 |
22 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T17 |
45 |
|
T64 |
38 |
|
T98 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T17 |
17 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T17 |
40 |
|
T64 |
36 |
|
T98 |
39 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59393 |
1 |
|
|
T17 |
1825 |
|
T64 |
2363 |
|
T98 |
1478 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44075 |
1 |
|
|
T17 |
848 |
|
T64 |
1173 |
|
T98 |
1304 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59458 |
1 |
|
|
T17 |
2852 |
|
T64 |
1122 |
|
T98 |
1361 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47281 |
1 |
|
|
T17 |
822 |
|
T64 |
1095 |
|
T98 |
1795 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T17 |
41 |
|
T64 |
52 |
|
T98 |
59 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T17 |
40 |
|
T64 |
53 |
|
T98 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T17 |
39 |
|
T64 |
52 |
|
T98 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T17 |
40 |
|
T64 |
52 |
|
T98 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T17 |
37 |
|
T64 |
50 |
|
T98 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T17 |
39 |
|
T64 |
51 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T17 |
37 |
|
T64 |
49 |
|
T98 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T17 |
37 |
|
T64 |
50 |
|
T98 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T17 |
36 |
|
T64 |
48 |
|
T98 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T17 |
35 |
|
T64 |
48 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
36 |
|
T64 |
46 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T17 |
35 |
|
T64 |
47 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T17 |
35 |
|
T64 |
46 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T17 |
35 |
|
T64 |
44 |
|
T98 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T17 |
34 |
|
T64 |
45 |
|
T98 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T17 |
35 |
|
T64 |
43 |
|
T98 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T17 |
34 |
|
T64 |
44 |
|
T98 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T17 |
34 |
|
T64 |
41 |
|
T98 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T17 |
34 |
|
T64 |
43 |
|
T98 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T17 |
34 |
|
T64 |
43 |
|
T98 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T17 |
32 |
|
T64 |
39 |
|
T98 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T17 |
31 |
|
T64 |
41 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T17 |
31 |
|
T64 |
39 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T17 |
29 |
|
T64 |
40 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T17 |
30 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T17 |
28 |
|
T64 |
39 |
|
T98 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T17 |
30 |
|
T64 |
36 |
|
T98 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T17 |
27 |
|
T64 |
37 |
|
T98 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T17 |
30 |
|
T64 |
36 |
|
T98 |
40 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55482 |
1 |
|
|
T17 |
1286 |
|
T64 |
1339 |
|
T98 |
1338 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47179 |
1 |
|
|
T17 |
1315 |
|
T64 |
1116 |
|
T98 |
1616 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60718 |
1 |
|
|
T17 |
2337 |
|
T64 |
2265 |
|
T98 |
1592 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45623 |
1 |
|
|
T17 |
1276 |
|
T64 |
1217 |
|
T98 |
1332 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T17 |
55 |
|
T64 |
52 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T17 |
51 |
|
T64 |
49 |
|
T98 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T17 |
55 |
|
T64 |
51 |
|
T98 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T17 |
50 |
|
T64 |
45 |
|
T98 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T17 |
53 |
|
T64 |
51 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T17 |
48 |
|
T64 |
44 |
|
T98 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T17 |
53 |
|
T64 |
48 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T17 |
47 |
|
T64 |
44 |
|
T98 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T17 |
51 |
|
T64 |
46 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T17 |
47 |
|
T64 |
44 |
|
T98 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T17 |
50 |
|
T64 |
45 |
|
T98 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
20 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T17 |
45 |
|
T64 |
44 |
|
T98 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T17 |
50 |
|
T64 |
45 |
|
T98 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T17 |
45 |
|
T64 |
42 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T17 |
47 |
|
T64 |
45 |
|
T98 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T17 |
44 |
|
T64 |
42 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T17 |
47 |
|
T64 |
43 |
|
T98 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T17 |
43 |
|
T64 |
40 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T17 |
46 |
|
T64 |
43 |
|
T98 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T17 |
39 |
|
T64 |
40 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T17 |
46 |
|
T64 |
43 |
|
T98 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T17 |
36 |
|
T64 |
40 |
|
T98 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
46 |
|
T64 |
43 |
|
T98 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T17 |
35 |
|
T64 |
40 |
|
T98 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T17 |
46 |
|
T64 |
42 |
|
T98 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T17 |
34 |
|
T64 |
38 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T17 |
45 |
|
T64 |
40 |
|
T98 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T17 |
33 |
|
T64 |
38 |
|
T98 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
15 |
|
T64 |
15 |
|
T98 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T17 |
45 |
|
T64 |
40 |
|
T98 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
19 |
|
T64 |
18 |
|
T98 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T17 |
32 |
|
T64 |
38 |
|
T98 |
47 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56366 |
1 |
|
|
T17 |
1625 |
|
T64 |
1299 |
|
T98 |
1315 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49744 |
1 |
|
|
T17 |
2415 |
|
T64 |
1881 |
|
T98 |
1182 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56529 |
1 |
|
|
T17 |
1132 |
|
T64 |
1257 |
|
T98 |
2388 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45050 |
1 |
|
|
T17 |
951 |
|
T64 |
1552 |
|
T98 |
983 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1807 |
1 |
|
|
T17 |
52 |
|
T64 |
49 |
|
T98 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1813 |
1 |
|
|
T17 |
49 |
|
T64 |
50 |
|
T98 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T17 |
52 |
|
T64 |
46 |
|
T98 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1783 |
1 |
|
|
T17 |
46 |
|
T64 |
50 |
|
T98 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T17 |
51 |
|
T64 |
45 |
|
T98 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T17 |
46 |
|
T64 |
49 |
|
T98 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T17 |
51 |
|
T64 |
44 |
|
T98 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T17 |
43 |
|
T64 |
48 |
|
T98 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T17 |
51 |
|
T64 |
42 |
|
T98 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T17 |
43 |
|
T64 |
48 |
|
T98 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T17 |
50 |
|
T64 |
42 |
|
T98 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T17 |
42 |
|
T64 |
48 |
|
T98 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T17 |
48 |
|
T64 |
42 |
|
T98 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T17 |
42 |
|
T64 |
46 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T17 |
47 |
|
T64 |
41 |
|
T98 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T17 |
42 |
|
T64 |
46 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T17 |
44 |
|
T64 |
38 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T17 |
40 |
|
T64 |
46 |
|
T98 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T17 |
42 |
|
T64 |
36 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T17 |
40 |
|
T64 |
45 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T17 |
39 |
|
T64 |
36 |
|
T98 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
40 |
|
T64 |
45 |
|
T98 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T17 |
39 |
|
T64 |
36 |
|
T98 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T17 |
39 |
|
T64 |
45 |
|
T98 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T17 |
37 |
|
T64 |
43 |
|
T98 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T17 |
37 |
|
T64 |
43 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T17 |
35 |
|
T64 |
34 |
|
T98 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T17 |
24 |
|
T64 |
14 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T17 |
37 |
|
T64 |
43 |
|
T98 |
36 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54135 |
1 |
|
|
T17 |
1407 |
|
T64 |
1397 |
|
T98 |
1595 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52122 |
1 |
|
|
T17 |
2321 |
|
T64 |
1270 |
|
T98 |
1102 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57989 |
1 |
|
|
T17 |
1517 |
|
T64 |
1869 |
|
T98 |
1290 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44859 |
1 |
|
|
T17 |
836 |
|
T64 |
1213 |
|
T98 |
1873 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T17 |
56 |
|
T64 |
61 |
|
T98 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T17 |
54 |
|
T64 |
58 |
|
T98 |
61 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T17 |
56 |
|
T64 |
58 |
|
T98 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T17 |
52 |
|
T64 |
57 |
|
T98 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T17 |
56 |
|
T64 |
57 |
|
T98 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T17 |
51 |
|
T64 |
55 |
|
T98 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T17 |
54 |
|
T64 |
56 |
|
T98 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T17 |
50 |
|
T64 |
53 |
|
T98 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T17 |
53 |
|
T64 |
56 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T17 |
47 |
|
T64 |
52 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T17 |
50 |
|
T64 |
52 |
|
T98 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
22 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T17 |
46 |
|
T64 |
51 |
|
T98 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T17 |
50 |
|
T64 |
51 |
|
T98 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T17 |
45 |
|
T64 |
50 |
|
T98 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T17 |
45 |
|
T64 |
48 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T17 |
49 |
|
T64 |
48 |
|
T98 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T17 |
43 |
|
T64 |
48 |
|
T98 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T17 |
47 |
|
T64 |
48 |
|
T98 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T17 |
42 |
|
T64 |
45 |
|
T98 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T17 |
47 |
|
T64 |
48 |
|
T98 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T17 |
40 |
|
T64 |
44 |
|
T98 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T17 |
47 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T17 |
35 |
|
T64 |
44 |
|
T98 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T17 |
45 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T17 |
45 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
20 |
|
T64 |
15 |
|
T98 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T17 |
31 |
|
T64 |
41 |
|
T98 |
45 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58651 |
1 |
|
|
T17 |
1055 |
|
T64 |
1779 |
|
T98 |
2741 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49745 |
1 |
|
|
T17 |
1306 |
|
T64 |
988 |
|
T98 |
771 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59926 |
1 |
|
|
T17 |
2507 |
|
T64 |
2360 |
|
T98 |
1975 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40725 |
1 |
|
|
T17 |
1278 |
|
T64 |
692 |
|
T98 |
646 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T17 |
50 |
|
T64 |
41 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T17 |
49 |
|
T64 |
40 |
|
T98 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T17 |
50 |
|
T64 |
41 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T17 |
48 |
|
T64 |
40 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T17 |
50 |
|
T64 |
40 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T17 |
48 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T17 |
47 |
|
T64 |
40 |
|
T98 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T17 |
45 |
|
T64 |
38 |
|
T98 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T17 |
47 |
|
T64 |
40 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T17 |
44 |
|
T64 |
38 |
|
T98 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T17 |
46 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T17 |
44 |
|
T64 |
36 |
|
T98 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T17 |
44 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T17 |
44 |
|
T64 |
36 |
|
T98 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T17 |
43 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T17 |
43 |
|
T64 |
36 |
|
T98 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T17 |
40 |
|
T64 |
38 |
|
T98 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T17 |
43 |
|
T64 |
34 |
|
T98 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T17 |
39 |
|
T64 |
38 |
|
T98 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T17 |
42 |
|
T64 |
34 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T17 |
38 |
|
T64 |
38 |
|
T98 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T17 |
41 |
|
T64 |
31 |
|
T98 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T17 |
38 |
|
T64 |
38 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T17 |
40 |
|
T64 |
30 |
|
T98 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
38 |
|
T64 |
38 |
|
T98 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T17 |
38 |
|
T64 |
28 |
|
T98 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T17 |
38 |
|
T64 |
37 |
|
T98 |
27 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T17 |
38 |
|
T64 |
27 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
25 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
23 |
|
T64 |
28 |
|
T98 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T17 |
37 |
|
T64 |
24 |
|
T98 |
22 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59749 |
1 |
|
|
T17 |
1406 |
|
T64 |
1123 |
|
T98 |
1180 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46580 |
1 |
|
|
T17 |
1052 |
|
T64 |
1131 |
|
T98 |
1223 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57177 |
1 |
|
|
T17 |
2785 |
|
T64 |
1531 |
|
T98 |
2400 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45004 |
1 |
|
|
T17 |
986 |
|
T64 |
1992 |
|
T98 |
1039 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T17 |
45 |
|
T64 |
51 |
|
T98 |
67 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T17 |
45 |
|
T64 |
50 |
|
T98 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T17 |
45 |
|
T64 |
50 |
|
T98 |
64 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T17 |
44 |
|
T64 |
49 |
|
T98 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T17 |
45 |
|
T64 |
49 |
|
T98 |
61 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T17 |
43 |
|
T64 |
47 |
|
T98 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T17 |
44 |
|
T64 |
48 |
|
T98 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T17 |
42 |
|
T64 |
47 |
|
T98 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T17 |
43 |
|
T64 |
46 |
|
T98 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T17 |
41 |
|
T64 |
45 |
|
T98 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
60 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T17 |
40 |
|
T64 |
44 |
|
T98 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T17 |
39 |
|
T64 |
44 |
|
T98 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T17 |
42 |
|
T64 |
44 |
|
T98 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T17 |
38 |
|
T64 |
42 |
|
T98 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T17 |
42 |
|
T64 |
43 |
|
T98 |
57 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T17 |
36 |
|
T64 |
42 |
|
T98 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T17 |
41 |
|
T64 |
43 |
|
T98 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T17 |
35 |
|
T64 |
40 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T17 |
41 |
|
T64 |
42 |
|
T98 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T17 |
35 |
|
T64 |
39 |
|
T98 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T17 |
41 |
|
T64 |
42 |
|
T98 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T17 |
35 |
|
T64 |
39 |
|
T98 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T17 |
40 |
|
T64 |
42 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T17 |
34 |
|
T64 |
39 |
|
T98 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T17 |
39 |
|
T64 |
41 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T17 |
33 |
|
T64 |
39 |
|
T98 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
22 |
|
T64 |
21 |
|
T98 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T17 |
37 |
|
T64 |
41 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
22 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T17 |
32 |
|
T64 |
37 |
|
T98 |
39 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62818 |
1 |
|
|
T17 |
2777 |
|
T64 |
1196 |
|
T98 |
2777 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43187 |
1 |
|
|
T17 |
1054 |
|
T64 |
1042 |
|
T98 |
795 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57547 |
1 |
|
|
T17 |
1256 |
|
T64 |
1492 |
|
T98 |
1890 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46911 |
1 |
|
|
T17 |
1320 |
|
T64 |
1927 |
|
T98 |
748 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T17 |
43 |
|
T64 |
54 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T17 |
40 |
|
T64 |
58 |
|
T98 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T17 |
42 |
|
T64 |
53 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T17 |
38 |
|
T64 |
56 |
|
T98 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T17 |
42 |
|
T64 |
53 |
|
T98 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T17 |
38 |
|
T64 |
56 |
|
T98 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T17 |
42 |
|
T64 |
52 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T17 |
38 |
|
T64 |
55 |
|
T98 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T17 |
40 |
|
T64 |
51 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T17 |
37 |
|
T64 |
55 |
|
T98 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
18 |
|
T64 |
23 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T17 |
40 |
|
T64 |
51 |
|
T98 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T17 |
37 |
|
T64 |
55 |
|
T98 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T17 |
39 |
|
T64 |
48 |
|
T98 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T17 |
37 |
|
T64 |
54 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T17 |
39 |
|
T64 |
47 |
|
T98 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T17 |
37 |
|
T64 |
51 |
|
T98 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
38 |
|
T64 |
45 |
|
T98 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T17 |
37 |
|
T64 |
47 |
|
T98 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T17 |
36 |
|
T64 |
44 |
|
T98 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T17 |
36 |
|
T64 |
47 |
|
T98 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T17 |
35 |
|
T64 |
44 |
|
T98 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T17 |
35 |
|
T64 |
46 |
|
T98 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T17 |
35 |
|
T64 |
43 |
|
T98 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T17 |
34 |
|
T64 |
45 |
|
T98 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T17 |
34 |
|
T64 |
42 |
|
T98 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T17 |
32 |
|
T64 |
43 |
|
T98 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T17 |
33 |
|
T64 |
41 |
|
T98 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T17 |
32 |
|
T64 |
42 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T17 |
33 |
|
T64 |
40 |
|
T98 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
20 |
|
T64 |
19 |
|
T98 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T17 |
32 |
|
T64 |
41 |
|
T98 |
27 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58386 |
1 |
|
|
T17 |
1445 |
|
T64 |
1064 |
|
T98 |
1726 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46451 |
1 |
|
|
T17 |
942 |
|
T64 |
1403 |
|
T98 |
1572 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57927 |
1 |
|
|
T17 |
1374 |
|
T64 |
2035 |
|
T98 |
1386 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47571 |
1 |
|
|
T17 |
2335 |
|
T64 |
1259 |
|
T98 |
1308 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T17 |
49 |
|
T64 |
59 |
|
T98 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T17 |
52 |
|
T64 |
64 |
|
T98 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T17 |
48 |
|
T64 |
57 |
|
T98 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T17 |
52 |
|
T64 |
63 |
|
T98 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T17 |
42 |
|
T64 |
56 |
|
T98 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T17 |
52 |
|
T64 |
62 |
|
T98 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T17 |
42 |
|
T64 |
54 |
|
T98 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T17 |
52 |
|
T64 |
60 |
|
T98 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T17 |
41 |
|
T64 |
53 |
|
T98 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T17 |
51 |
|
T64 |
58 |
|
T98 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
25 |
|
T64 |
16 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T17 |
40 |
|
T64 |
51 |
|
T98 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T17 |
51 |
|
T64 |
55 |
|
T98 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T17 |
39 |
|
T64 |
51 |
|
T98 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T17 |
50 |
|
T64 |
55 |
|
T98 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T17 |
34 |
|
T64 |
51 |
|
T98 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T17 |
49 |
|
T64 |
55 |
|
T98 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T17 |
33 |
|
T64 |
49 |
|
T98 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T17 |
49 |
|
T64 |
54 |
|
T98 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T17 |
32 |
|
T64 |
48 |
|
T98 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T17 |
47 |
|
T64 |
54 |
|
T98 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T17 |
31 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T17 |
46 |
|
T64 |
53 |
|
T98 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T17 |
30 |
|
T64 |
42 |
|
T98 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T17 |
45 |
|
T64 |
53 |
|
T98 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T17 |
30 |
|
T64 |
42 |
|
T98 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T17 |
44 |
|
T64 |
52 |
|
T98 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T17 |
30 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T17 |
44 |
|
T64 |
52 |
|
T98 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
25 |
|
T64 |
15 |
|
T98 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T17 |
30 |
|
T64 |
40 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T17 |
23 |
|
T64 |
11 |
|
T98 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T17 |
43 |
|
T64 |
49 |
|
T98 |
45 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52216 |
1 |
|
|
T17 |
1020 |
|
T64 |
1491 |
|
T98 |
1836 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48609 |
1 |
|
|
T17 |
1438 |
|
T64 |
977 |
|
T98 |
1087 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54728 |
1 |
|
|
T17 |
2061 |
|
T64 |
2112 |
|
T98 |
1510 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52052 |
1 |
|
|
T17 |
1242 |
|
T64 |
1104 |
|
T98 |
1724 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1771 |
1 |
|
|
T17 |
68 |
|
T64 |
54 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T17 |
68 |
|
T64 |
54 |
|
T98 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T17 |
67 |
|
T64 |
53 |
|
T98 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T17 |
66 |
|
T64 |
54 |
|
T98 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T17 |
67 |
|
T64 |
52 |
|
T98 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T17 |
66 |
|
T64 |
50 |
|
T98 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T17 |
66 |
|
T64 |
51 |
|
T98 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T17 |
64 |
|
T64 |
48 |
|
T98 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T17 |
65 |
|
T64 |
51 |
|
T98 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T17 |
64 |
|
T64 |
48 |
|
T98 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T17 |
64 |
|
T64 |
50 |
|
T98 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T17 |
63 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T17 |
64 |
|
T64 |
48 |
|
T98 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T17 |
60 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T17 |
63 |
|
T64 |
48 |
|
T98 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T17 |
59 |
|
T64 |
46 |
|
T98 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T17 |
61 |
|
T64 |
45 |
|
T98 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T17 |
58 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T17 |
58 |
|
T64 |
45 |
|
T98 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T17 |
56 |
|
T64 |
43 |
|
T98 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T17 |
57 |
|
T64 |
44 |
|
T98 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T17 |
55 |
|
T64 |
41 |
|
T98 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T17 |
54 |
|
T64 |
43 |
|
T98 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T17 |
55 |
|
T64 |
41 |
|
T98 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T17 |
53 |
|
T64 |
42 |
|
T98 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T17 |
52 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
50 |
|
T64 |
42 |
|
T98 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T17 |
52 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T17 |
48 |
|
T64 |
40 |
|
T98 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
18 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T17 |
48 |
|
T64 |
39 |
|
T98 |
38 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59873 |
1 |
|
|
T17 |
2727 |
|
T64 |
1314 |
|
T98 |
1584 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44274 |
1 |
|
|
T17 |
1027 |
|
T64 |
997 |
|
T98 |
955 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60472 |
1 |
|
|
T17 |
1517 |
|
T64 |
1389 |
|
T98 |
1600 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44346 |
1 |
|
|
T17 |
903 |
|
T64 |
1882 |
|
T98 |
1711 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T17 |
51 |
|
T64 |
53 |
|
T98 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
20 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T17 |
52 |
|
T64 |
51 |
|
T98 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T17 |
50 |
|
T64 |
52 |
|
T98 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
20 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T17 |
52 |
|
T64 |
49 |
|
T98 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T17 |
50 |
|
T64 |
50 |
|
T98 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T17 |
51 |
|
T64 |
47 |
|
T98 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T17 |
47 |
|
T64 |
50 |
|
T98 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T17 |
50 |
|
T64 |
46 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T17 |
45 |
|
T64 |
49 |
|
T98 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T17 |
47 |
|
T64 |
44 |
|
T98 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T17 |
44 |
|
T64 |
49 |
|
T98 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T17 |
47 |
|
T64 |
43 |
|
T98 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T17 |
43 |
|
T64 |
47 |
|
T98 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T17 |
43 |
|
T64 |
43 |
|
T98 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T17 |
43 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T17 |
43 |
|
T64 |
41 |
|
T98 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T17 |
43 |
|
T64 |
45 |
|
T98 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T17 |
42 |
|
T64 |
40 |
|
T98 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T17 |
42 |
|
T64 |
43 |
|
T98 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T17 |
42 |
|
T64 |
39 |
|
T98 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T17 |
40 |
|
T64 |
40 |
|
T98 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T17 |
42 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T17 |
38 |
|
T64 |
39 |
|
T98 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T17 |
42 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T17 |
38 |
|
T64 |
38 |
|
T98 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T17 |
40 |
|
T64 |
39 |
|
T98 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T17 |
37 |
|
T64 |
38 |
|
T98 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T17 |
40 |
|
T64 |
39 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
21 |
|
T64 |
27 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T17 |
36 |
|
T64 |
37 |
|
T98 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
19 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T17 |
38 |
|
T64 |
39 |
|
T98 |
33 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52519 |
1 |
|
|
T17 |
985 |
|
T64 |
1484 |
|
T98 |
1613 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51910 |
1 |
|
|
T17 |
1298 |
|
T64 |
1045 |
|
T98 |
1789 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53893 |
1 |
|
|
T17 |
2664 |
|
T64 |
1612 |
|
T98 |
1355 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49226 |
1 |
|
|
T17 |
1100 |
|
T64 |
1730 |
|
T98 |
1268 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T17 |
55 |
|
T64 |
45 |
|
T98 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T17 |
57 |
|
T64 |
48 |
|
T98 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T17 |
53 |
|
T64 |
43 |
|
T98 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
21 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T17 |
56 |
|
T64 |
47 |
|
T98 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T17 |
53 |
|
T64 |
43 |
|
T98 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T17 |
55 |
|
T64 |
47 |
|
T98 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T17 |
52 |
|
T64 |
43 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T17 |
53 |
|
T64 |
46 |
|
T98 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T17 |
49 |
|
T64 |
43 |
|
T98 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T17 |
49 |
|
T64 |
43 |
|
T98 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
22 |
|
T64 |
24 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T17 |
46 |
|
T64 |
41 |
|
T98 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T17 |
47 |
|
T64 |
41 |
|
T98 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T17 |
46 |
|
T64 |
41 |
|
T98 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T17 |
47 |
|
T64 |
40 |
|
T98 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T17 |
46 |
|
T64 |
39 |
|
T98 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T17 |
47 |
|
T64 |
39 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T17 |
44 |
|
T64 |
37 |
|
T98 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T17 |
47 |
|
T64 |
38 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T17 |
43 |
|
T64 |
37 |
|
T98 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T17 |
45 |
|
T64 |
38 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T17 |
42 |
|
T64 |
35 |
|
T98 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T17 |
43 |
|
T64 |
38 |
|
T98 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T17 |
41 |
|
T64 |
34 |
|
T98 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T17 |
42 |
|
T64 |
37 |
|
T98 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T17 |
41 |
|
T64 |
31 |
|
T98 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T17 |
41 |
|
T64 |
37 |
|
T98 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
22 |
|
T64 |
23 |
|
T98 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T17 |
40 |
|
T64 |
31 |
|
T98 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
20 |
|
T64 |
21 |
|
T98 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T17 |
41 |
|
T64 |
34 |
|
T98 |
41 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59434 |
1 |
|
|
T17 |
1346 |
|
T64 |
1583 |
|
T98 |
1855 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45345 |
1 |
|
|
T17 |
1111 |
|
T64 |
786 |
|
T98 |
1724 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55984 |
1 |
|
|
T17 |
2423 |
|
T64 |
1957 |
|
T98 |
1709 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47913 |
1 |
|
|
T17 |
1259 |
|
T64 |
1750 |
|
T98 |
964 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T17 |
50 |
|
T64 |
37 |
|
T98 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T17 |
51 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T17 |
50 |
|
T64 |
35 |
|
T98 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T17 |
51 |
|
T64 |
38 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T17 |
49 |
|
T64 |
34 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T17 |
51 |
|
T64 |
38 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T17 |
48 |
|
T64 |
33 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T17 |
50 |
|
T64 |
38 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T17 |
48 |
|
T64 |
33 |
|
T98 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T17 |
50 |
|
T64 |
38 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
20 |
|
T64 |
23 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T17 |
48 |
|
T64 |
31 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T17 |
50 |
|
T64 |
38 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T17 |
47 |
|
T64 |
29 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T17 |
49 |
|
T64 |
38 |
|
T98 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T17 |
44 |
|
T64 |
29 |
|
T98 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T17 |
49 |
|
T64 |
37 |
|
T98 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T17 |
43 |
|
T64 |
27 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T17 |
48 |
|
T64 |
37 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T17 |
40 |
|
T64 |
27 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T17 |
47 |
|
T64 |
37 |
|
T98 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T17 |
38 |
|
T64 |
26 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T17 |
46 |
|
T64 |
36 |
|
T98 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T17 |
37 |
|
T64 |
25 |
|
T98 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T17 |
45 |
|
T64 |
36 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
35 |
|
T64 |
24 |
|
T98 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T17 |
45 |
|
T64 |
36 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T17 |
35 |
|
T64 |
24 |
|
T98 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T17 |
44 |
|
T64 |
36 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T17 |
20 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T17 |
34 |
|
T64 |
24 |
|
T98 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
19 |
|
T64 |
22 |
|
T98 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T17 |
42 |
|
T64 |
36 |
|
T98 |
29 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54885 |
1 |
|
|
T17 |
1465 |
|
T64 |
1170 |
|
T98 |
1739 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51755 |
1 |
|
|
T17 |
2112 |
|
T64 |
1035 |
|
T98 |
988 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56573 |
1 |
|
|
T17 |
1430 |
|
T64 |
1184 |
|
T98 |
1447 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45170 |
1 |
|
|
T17 |
1033 |
|
T64 |
2177 |
|
T98 |
1699 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T17 |
54 |
|
T64 |
65 |
|
T98 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T17 |
51 |
|
T64 |
64 |
|
T98 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T17 |
54 |
|
T64 |
65 |
|
T98 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T17 |
51 |
|
T64 |
62 |
|
T98 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T17 |
54 |
|
T64 |
65 |
|
T98 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T17 |
50 |
|
T64 |
61 |
|
T98 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T17 |
53 |
|
T64 |
63 |
|
T98 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T17 |
47 |
|
T64 |
59 |
|
T98 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
52 |
|
T64 |
61 |
|
T98 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T17 |
47 |
|
T64 |
58 |
|
T98 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T17 |
52 |
|
T64 |
57 |
|
T98 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T17 |
45 |
|
T64 |
58 |
|
T98 |
56 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T17 |
50 |
|
T64 |
57 |
|
T98 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T17 |
44 |
|
T64 |
58 |
|
T98 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T17 |
50 |
|
T64 |
55 |
|
T98 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T17 |
41 |
|
T64 |
58 |
|
T98 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T17 |
49 |
|
T64 |
55 |
|
T98 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T17 |
40 |
|
T64 |
55 |
|
T98 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T17 |
48 |
|
T64 |
52 |
|
T98 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T17 |
39 |
|
T64 |
54 |
|
T98 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T17 |
47 |
|
T64 |
49 |
|
T98 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T17 |
39 |
|
T64 |
54 |
|
T98 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T17 |
47 |
|
T64 |
47 |
|
T98 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T17 |
36 |
|
T64 |
53 |
|
T98 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T17 |
45 |
|
T64 |
46 |
|
T98 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T17 |
36 |
|
T64 |
53 |
|
T98 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T17 |
45 |
|
T64 |
45 |
|
T98 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T17 |
36 |
|
T64 |
52 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
21 |
|
T64 |
16 |
|
T98 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T17 |
41 |
|
T64 |
44 |
|
T98 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
24 |
|
T64 |
17 |
|
T98 |
23 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T17 |
36 |
|
T64 |
51 |
|
T98 |
42 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56812 |
1 |
|
|
T17 |
1764 |
|
T64 |
1658 |
|
T98 |
1959 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46142 |
1 |
|
|
T17 |
1065 |
|
T64 |
875 |
|
T98 |
1207 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59294 |
1 |
|
|
T17 |
1424 |
|
T64 |
2347 |
|
T98 |
1925 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46327 |
1 |
|
|
T17 |
1981 |
|
T64 |
920 |
|
T98 |
877 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1775 |
1 |
|
|
T17 |
47 |
|
T64 |
36 |
|
T98 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T17 |
45 |
|
T64 |
39 |
|
T98 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T17 |
44 |
|
T64 |
36 |
|
T98 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T17 |
45 |
|
T64 |
37 |
|
T98 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T17 |
43 |
|
T64 |
35 |
|
T98 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T17 |
45 |
|
T64 |
37 |
|
T98 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T17 |
43 |
|
T64 |
35 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T17 |
44 |
|
T64 |
36 |
|
T98 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T17 |
42 |
|
T64 |
34 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T17 |
44 |
|
T64 |
35 |
|
T98 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T17 |
21 |
|
T64 |
33 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T17 |
41 |
|
T64 |
33 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T17 |
42 |
|
T64 |
35 |
|
T98 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T17 |
41 |
|
T64 |
33 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T17 |
41 |
|
T64 |
35 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T17 |
40 |
|
T64 |
33 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T17 |
41 |
|
T64 |
34 |
|
T98 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T17 |
39 |
|
T64 |
32 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T17 |
40 |
|
T64 |
33 |
|
T98 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T17 |
36 |
|
T64 |
31 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T17 |
38 |
|
T64 |
33 |
|
T98 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T17 |
35 |
|
T64 |
30 |
|
T98 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T17 |
37 |
|
T64 |
33 |
|
T98 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T17 |
34 |
|
T64 |
30 |
|
T98 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T17 |
35 |
|
T64 |
33 |
|
T98 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T17 |
34 |
|
T64 |
30 |
|
T98 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T17 |
34 |
|
T64 |
33 |
|
T98 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T17 |
34 |
|
T64 |
28 |
|
T98 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T17 |
34 |
|
T64 |
33 |
|
T98 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T17 |
21 |
|
T64 |
32 |
|
T98 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T17 |
34 |
|
T64 |
26 |
|
T98 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T17 |
24 |
|
T64 |
30 |
|
T98 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T17 |
33 |
|
T64 |
33 |
|
T98 |
35 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56408 |
1 |
|
|
T17 |
1750 |
|
T64 |
2650 |
|
T98 |
1491 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49818 |
1 |
|
|
T17 |
907 |
|
T64 |
1321 |
|
T98 |
2060 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60841 |
1 |
|
|
T17 |
2499 |
|
T64 |
897 |
|
T98 |
1276 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41961 |
1 |
|
|
T17 |
1073 |
|
T64 |
923 |
|
T98 |
1153 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T17 |
41 |
|
T64 |
51 |
|
T98 |
60 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T17 |
43 |
|
T64 |
49 |
|
T98 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T17 |
41 |
|
T64 |
51 |
|
T98 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T17 |
42 |
|
T64 |
47 |
|
T98 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T17 |
41 |
|
T64 |
49 |
|
T98 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T17 |
43 |
|
T64 |
46 |
|
T98 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T17 |
41 |
|
T64 |
49 |
|
T98 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T17 |
43 |
|
T64 |
44 |
|
T98 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T17 |
40 |
|
T64 |
48 |
|
T98 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T17 |
41 |
|
T64 |
44 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T17 |
39 |
|
T64 |
48 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T17 |
41 |
|
T64 |
42 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T17 |
39 |
|
T64 |
48 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T17 |
40 |
|
T64 |
41 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T17 |
38 |
|
T64 |
48 |
|
T98 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T17 |
39 |
|
T64 |
39 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T17 |
38 |
|
T64 |
47 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T17 |
39 |
|
T64 |
37 |
|
T98 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T17 |
38 |
|
T64 |
47 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T17 |
38 |
|
T64 |
35 |
|
T98 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T17 |
35 |
|
T64 |
46 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T17 |
37 |
|
T64 |
35 |
|
T98 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T17 |
35 |
|
T64 |
44 |
|
T98 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T17 |
35 |
|
T64 |
35 |
|
T98 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
34 |
|
T64 |
44 |
|
T98 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T17 |
33 |
|
T64 |
35 |
|
T98 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T17 |
34 |
|
T64 |
42 |
|
T98 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T17 |
31 |
|
T64 |
35 |
|
T98 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
25 |
|
T64 |
21 |
|
T98 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T17 |
33 |
|
T64 |
41 |
|
T98 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T17 |
31 |
|
T64 |
34 |
|
T98 |
40 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56485 |
1 |
|
|
T17 |
1454 |
|
T64 |
1496 |
|
T98 |
1623 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45792 |
1 |
|
|
T17 |
1321 |
|
T64 |
1873 |
|
T98 |
963 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59447 |
1 |
|
|
T17 |
1211 |
|
T64 |
1710 |
|
T98 |
1830 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47121 |
1 |
|
|
T17 |
2104 |
|
T64 |
775 |
|
T98 |
1653 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T17 |
51 |
|
T64 |
47 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
25 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1669 |
1 |
|
|
T17 |
48 |
|
T64 |
47 |
|
T98 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T17 |
50 |
|
T64 |
47 |
|
T98 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
25 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T17 |
47 |
|
T64 |
47 |
|
T98 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T17 |
48 |
|
T64 |
46 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T17 |
48 |
|
T64 |
46 |
|
T98 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T17 |
48 |
|
T64 |
45 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T17 |
48 |
|
T64 |
45 |
|
T98 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T17 |
47 |
|
T64 |
42 |
|
T98 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
23 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
48 |
|
T64 |
44 |
|
T98 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T17 |
45 |
|
T64 |
42 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T17 |
48 |
|
T64 |
44 |
|
T98 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T17 |
45 |
|
T64 |
38 |
|
T98 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T17 |
48 |
|
T64 |
43 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
45 |
|
T64 |
37 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T17 |
47 |
|
T64 |
43 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T17 |
42 |
|
T64 |
37 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T17 |
46 |
|
T64 |
42 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T17 |
39 |
|
T64 |
36 |
|
T98 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T17 |
46 |
|
T64 |
41 |
|
T98 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T17 |
45 |
|
T64 |
40 |
|
T98 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T17 |
36 |
|
T64 |
32 |
|
T98 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T17 |
44 |
|
T64 |
40 |
|
T98 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T17 |
35 |
|
T64 |
31 |
|
T98 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T17 |
44 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T17 |
33 |
|
T64 |
30 |
|
T98 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
21 |
|
T64 |
22 |
|
T98 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T17 |
41 |
|
T64 |
39 |
|
T98 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
24 |
|
T64 |
22 |
|
T98 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T17 |
32 |
|
T64 |
29 |
|
T98 |
35 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
69637 |
1 |
|
|
T17 |
2283 |
|
T64 |
1978 |
|
T98 |
1922 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41502 |
1 |
|
|
T17 |
1201 |
|
T64 |
1239 |
|
T98 |
883 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52964 |
1 |
|
|
T17 |
1594 |
|
T64 |
1283 |
|
T98 |
2070 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45745 |
1 |
|
|
T17 |
1054 |
|
T64 |
1174 |
|
T98 |
1182 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
53 |
|
T64 |
58 |
|
T98 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T17 |
53 |
|
T64 |
61 |
|
T98 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T17 |
51 |
|
T64 |
56 |
|
T98 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T17 |
51 |
|
T64 |
61 |
|
T98 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T17 |
49 |
|
T64 |
55 |
|
T98 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T17 |
51 |
|
T64 |
60 |
|
T98 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T17 |
46 |
|
T64 |
55 |
|
T98 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T17 |
50 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T17 |
46 |
|
T64 |
54 |
|
T98 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T17 |
48 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
21 |
|
T64 |
19 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T17 |
46 |
|
T64 |
54 |
|
T98 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T17 |
48 |
|
T64 |
56 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T17 |
45 |
|
T64 |
53 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T17 |
45 |
|
T64 |
56 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T17 |
45 |
|
T64 |
51 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T17 |
45 |
|
T64 |
56 |
|
T98 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T17 |
42 |
|
T64 |
49 |
|
T98 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T17 |
43 |
|
T64 |
56 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T17 |
42 |
|
T64 |
44 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T17 |
43 |
|
T64 |
56 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T17 |
41 |
|
T64 |
43 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T17 |
42 |
|
T64 |
53 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T17 |
39 |
|
T64 |
43 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T17 |
41 |
|
T64 |
51 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T17 |
37 |
|
T64 |
41 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T17 |
40 |
|
T64 |
50 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T17 |
37 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T17 |
39 |
|
T64 |
50 |
|
T98 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
21 |
|
T64 |
18 |
|
T98 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T17 |
36 |
|
T64 |
37 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
21 |
|
T64 |
15 |
|
T98 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T17 |
38 |
|
T64 |
48 |
|
T98 |
34 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58091 |
1 |
|
|
T17 |
1691 |
|
T64 |
2330 |
|
T98 |
2073 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47126 |
1 |
|
|
T17 |
927 |
|
T64 |
956 |
|
T98 |
976 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53107 |
1 |
|
|
T17 |
1201 |
|
T64 |
1127 |
|
T98 |
1715 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50437 |
1 |
|
|
T17 |
2292 |
|
T64 |
1207 |
|
T98 |
1206 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T17 |
50 |
|
T64 |
57 |
|
T98 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1739 |
1 |
|
|
T17 |
50 |
|
T64 |
63 |
|
T98 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T17 |
50 |
|
T64 |
57 |
|
T98 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T17 |
49 |
|
T64 |
61 |
|
T98 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T17 |
49 |
|
T64 |
54 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T17 |
49 |
|
T64 |
61 |
|
T98 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T17 |
49 |
|
T64 |
53 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T17 |
48 |
|
T64 |
60 |
|
T98 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T17 |
48 |
|
T64 |
51 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T17 |
47 |
|
T64 |
59 |
|
T98 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
23 |
|
T64 |
23 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T17 |
46 |
|
T64 |
48 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
24 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T17 |
46 |
|
T64 |
59 |
|
T98 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T17 |
44 |
|
T64 |
47 |
|
T98 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T17 |
46 |
|
T64 |
59 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T17 |
42 |
|
T64 |
46 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T17 |
42 |
|
T64 |
58 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T17 |
42 |
|
T64 |
46 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T17 |
41 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T17 |
41 |
|
T64 |
43 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T17 |
40 |
|
T64 |
58 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T17 |
40 |
|
T64 |
42 |
|
T98 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T17 |
39 |
|
T64 |
55 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T17 |
37 |
|
T64 |
41 |
|
T98 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T17 |
38 |
|
T64 |
51 |
|
T98 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T17 |
37 |
|
T64 |
39 |
|
T98 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T17 |
37 |
|
T64 |
49 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T17 |
36 |
|
T64 |
36 |
|
T98 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T17 |
36 |
|
T64 |
48 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
23 |
|
T64 |
22 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T17 |
35 |
|
T64 |
36 |
|
T98 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
23 |
|
T64 |
16 |
|
T98 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T17 |
33 |
|
T64 |
46 |
|
T98 |
42 |