Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4618636 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1024 |
| auto[1] |
2414110 |
1 |
|
|
T1 |
960 |
|
T11 |
2971 |
|
T18 |
115 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5843795 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1170 |
| auto[1] |
1188951 |
1 |
|
|
T1 |
814 |
|
T11 |
847 |
|
T18 |
48 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4594883 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
892 |
| auto[1] |
2437863 |
1 |
|
|
T1 |
1092 |
|
T11 |
2723 |
|
T18 |
91 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
625777 |
1 |
|
|
T1 |
154 |
|
T11 |
719 |
|
T18 |
14 |
| auto[1] |
auto[0] |
auto[1] |
592931 |
1 |
|
|
T1 |
421 |
|
T11 |
309 |
|
T18 |
22 |
| auto[1] |
auto[1] |
auto[0] |
623135 |
1 |
|
|
T1 |
124 |
|
T11 |
1157 |
|
T18 |
29 |
| auto[1] |
auto[1] |
auto[1] |
596020 |
1 |
|
|
T1 |
393 |
|
T11 |
538 |
|
T18 |
26 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |