Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4619436 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
685 |
| auto[1] |
2413310 |
1 |
|
|
T1 |
1299 |
|
T11 |
1862 |
|
T18 |
145 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5859847 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1114 |
| auto[1] |
1172899 |
1 |
|
|
T1 |
870 |
|
T11 |
847 |
|
T18 |
25 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4624045 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
915 |
| auto[1] |
2408701 |
1 |
|
|
T1 |
1069 |
|
T11 |
2494 |
|
T18 |
66 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
619133 |
1 |
|
|
T1 |
92 |
|
T11 |
1025 |
|
T18 |
14 |
| auto[1] |
auto[0] |
auto[1] |
586656 |
1 |
|
|
T1 |
301 |
|
T11 |
570 |
|
T18 |
10 |
| auto[1] |
auto[1] |
auto[0] |
616669 |
1 |
|
|
T1 |
107 |
|
T11 |
622 |
|
T18 |
27 |
| auto[1] |
auto[1] |
auto[1] |
586243 |
1 |
|
|
T1 |
569 |
|
T11 |
277 |
|
T18 |
15 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |