Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4590311 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1135 |
| auto[1] |
2442435 |
1 |
|
|
T1 |
849 |
|
T11 |
2242 |
|
T18 |
46 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5860686 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1397 |
| auto[1] |
1172060 |
1 |
|
|
T1 |
587 |
|
T11 |
960 |
|
T18 |
54 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4619418 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1188 |
| auto[1] |
2413328 |
1 |
|
|
T1 |
796 |
|
T11 |
2470 |
|
T18 |
128 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
615504 |
1 |
|
|
T1 |
109 |
|
T11 |
764 |
|
T18 |
52 |
| auto[1] |
auto[0] |
auto[1] |
581630 |
1 |
|
|
T1 |
360 |
|
T11 |
566 |
|
T18 |
42 |
| auto[1] |
auto[1] |
auto[0] |
625764 |
1 |
|
|
T1 |
100 |
|
T11 |
746 |
|
T18 |
22 |
| auto[1] |
auto[1] |
auto[1] |
590430 |
1 |
|
|
T1 |
227 |
|
T11 |
394 |
|
T18 |
12 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |