Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4599784 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1078 |
| auto[1] |
2432962 |
1 |
|
|
T1 |
906 |
|
T11 |
2948 |
|
T18 |
113 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5851631 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
1179 |
| auto[1] |
1181115 |
1 |
|
|
T1 |
805 |
|
T11 |
1006 |
|
T18 |
32 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4614990 |
1 |
|
|
T24 |
205 |
|
T25 |
600 |
|
T1 |
959 |
| auto[1] |
2417756 |
1 |
|
|
T1 |
1025 |
|
T11 |
2933 |
|
T18 |
84 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
616857 |
1 |
|
|
T1 |
124 |
|
T11 |
755 |
|
T18 |
20 |
| auto[1] |
auto[0] |
auto[1] |
589054 |
1 |
|
|
T1 |
472 |
|
T11 |
459 |
|
T18 |
9 |
| auto[1] |
auto[1] |
auto[0] |
619784 |
1 |
|
|
T1 |
96 |
|
T11 |
1172 |
|
T18 |
32 |
| auto[1] |
auto[1] |
auto[1] |
592061 |
1 |
|
|
T1 |
333 |
|
T11 |
547 |
|
T18 |
23 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |