Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	6297974	1			T23	257		T24	449		T25	392
all_values[1]	6297974	1			T23	257		T24	449		T25	392
all_values[2]	6297974	1			T23	257		T24	449		T25	392
all_values[3]	6297974	1			T23	257		T24	449		T25	392
all_values[4]	6297974	1			T23	257		T24	449		T25	392
all_values[5]	6297974	1			T23	257		T24	449		T25	392
all_values[6]	6297974	1			T23	257		T24	449		T25	392
all_values[7]	6297974	1			T23	257		T24	449		T25	392
all_values[8]	6297974	1			T23	257		T24	449		T25	392
all_values[9]	6297974	1			T23	257		T24	449		T25	392
all_values[10]	6297974	1			T23	257		T24	449		T25	392
all_values[11]	6297974	1			T23	257		T24	449		T25	392
all_values[12]	6297974	1			T23	257		T24	449		T25	392
all_values[13]	6297974	1			T23	257		T24	449		T25	392
all_values[14]	6297974	1			T23	257		T24	449		T25	392
all_values[15]	6297974	1			T23	257		T24	449		T25	392
all_values[16]	6297974	1			T23	257		T24	449		T25	392
all_values[17]	6297974	1			T23	257		T24	449		T25	392
all_values[18]	6297974	1			T23	257		T24	449		T25	392
all_values[19]	6297974	1			T23	257		T24	449		T25	392
all_values[20]	6297974	1			T23	257		T24	449		T25	392
all_values[21]	6297974	1			T23	257		T24	449		T25	392
all_values[22]	6297974	1			T23	257		T24	449		T25	392
all_values[23]	6297974	1			T23	257		T24	449		T25	392
all_values[24]	6297974	1			T23	257		T24	449		T25	392
all_values[25]	6297974	1			T23	257		T24	449		T25	392
all_values[26]	6297974	1			T23	257		T24	449		T25	392
all_values[27]	6297974	1			T23	257		T24	449		T25	392
all_values[28]	6297974	1			T23	257		T24	449		T25	392
all_values[29]	6297974	1			T23	257		T24	449		T25	392
all_values[30]	6297974	1			T23	257		T24	449		T25	392
all_values[31]	6297974	1			T23	257		T24	449		T25	392

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

135970912

1

T23

8224

T24

14368

T25

12544

auto[1]

65564256

1

T28

3855

T29

48834

T31

1180

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

82839238

1

T23

8224

T24

14368

T25

12544

auto[1]

118695930

1

T28

6504

T29

89178

T31

1673

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

199801025

1

T23

8224

T24

14368

T25

12544

auto[1]

1734143

1

T31

214

T33

167

T1

2201

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2386756	1			T23	257		T24	449		T25	392
all_values[0]	auto[0]	auto[0]	auto[1]	1834278	1			T28	89		T29	1576		T31	17
all_values[0]	auto[0]	auto[1]	auto[0]	203698	1			T28	17		T29	136		T31	9
all_values[0]	auto[0]	auto[1]	auto[1]	1819274	1			T28	105		T29	1203		T31	41
all_values[0]	auto[1]	auto[0]	auto[1]	27235	1			T31	2		T33	5		T1	42
all_values[0]	auto[1]	auto[1]	auto[1]	26733	1			T31	6		T1	32		T105	1
all_values[1]	auto[0]	auto[0]	auto[0]	2390234	1			T23	257		T24	449		T25	392
all_values[1]	auto[0]	auto[0]	auto[1]	1820687	1			T28	97		T29	1637		T31	30
all_values[1]	auto[0]	auto[1]	auto[0]	200365	1			T28	12		T29	109		T31	14
all_values[1]	auto[0]	auto[1]	auto[1]	1832468	1			T28	124		T29	1221		T31	12
all_values[1]	auto[1]	auto[0]	auto[1]	27462	1			T31	6		T33	2		T1	41
all_values[1]	auto[1]	auto[1]	auto[1]	26758	1			T31	1		T1	31		T105	1
all_values[2]	auto[0]	auto[0]	auto[0]	2389544	1			T23	257		T24	449		T25	392
all_values[2]	auto[0]	auto[0]	auto[1]	1843171	1			T28	101		T29	1455		T31	13
all_values[2]	auto[0]	auto[1]	auto[0]	201085	1			T28	34		T29	84		T31	20
all_values[2]	auto[0]	auto[1]	auto[1]	1810016	1			T28	81		T29	1340		T31	24
all_values[2]	auto[1]	auto[0]	auto[1]	27400	1			T31	5		T33	5		T1	37
all_values[2]	auto[1]	auto[1]	auto[1]	26758	1			T31	6		T1	28		T106	35
all_values[3]	auto[0]	auto[0]	auto[0]	2384558	1			T23	257		T24	449		T25	392
all_values[3]	auto[0]	auto[0]	auto[1]	1838537	1			T28	87		T29	1305		T31	31
all_values[3]	auto[0]	auto[1]	auto[0]	205797	1			T28	10		T29	101		T31	22
all_values[3]	auto[0]	auto[1]	auto[1]	1814722	1			T28	143		T29	1359		T31	3
all_values[3]	auto[1]	auto[0]	auto[1]	27214	1			T31	8		T33	3		T1	41
all_values[3]	auto[1]	auto[1]	auto[1]	27146	1			T31	2		T33	3		T1	34
all_values[4]	auto[0]	auto[0]	auto[0]	2388265	1			T23	257		T24	449		T25	392
all_values[4]	auto[0]	auto[0]	auto[1]	1833210	1			T28	74		T29	1377		T31	23
all_values[4]	auto[0]	auto[1]	auto[0]	202535	1			T28	23		T29	73		T31	6
all_values[4]	auto[0]	auto[1]	auto[1]	1819545	1			T28	124		T29	1475		T31	31
all_values[4]	auto[1]	auto[0]	auto[1]	27438	1			T31	4		T33	2		T1	27
all_values[4]	auto[1]	auto[1]	auto[1]	26981	1			T31	2		T33	3		T1	41
all_values[5]	auto[0]	auto[0]	auto[0]	2383642	1			T23	257		T24	449		T25	392
all_values[5]	auto[0]	auto[0]	auto[1]	1834092	1			T28	105		T29	1215		T31	33
all_values[5]	auto[0]	auto[1]	auto[0]	199143	1			T28	28		T29	86		T31	13
all_values[5]	auto[0]	auto[1]	auto[1]	1826908	1			T28	96		T29	1578		T31	25
all_values[5]	auto[1]	auto[0]	auto[1]	27342	1			T31	5		T33	4		T1	45
all_values[5]	auto[1]	auto[1]	auto[1]	26847	1			T31	5		T33	3		T1	30
all_values[6]	auto[0]	auto[0]	auto[0]	2385943	1			T23	257		T24	449		T25	392
all_values[6]	auto[0]	auto[0]	auto[1]	1843534	1			T28	66		T29	1216		T31	30
all_values[6]	auto[0]	auto[1]	auto[0]	200800	1			T28	19		T29	84		T31	19
all_values[6]	auto[0]	auto[1]	auto[1]	1813645	1			T28	139		T29	1569		T31	13
all_values[6]	auto[1]	auto[0]	auto[1]	27341	1			T31	2		T33	1		T1	26
all_values[6]	auto[1]	auto[1]	auto[1]	26711	1			T31	2		T33	2		T1	32
all_values[7]	auto[0]	auto[0]	auto[0]	2383328	1			T23	257		T24	449		T25	392
all_values[7]	auto[0]	auto[0]	auto[1]	1839909	1			T28	74		T29	1583		T31	28
all_values[7]	auto[0]	auto[1]	auto[0]	206652	1			T28	36		T29	123		T31	14
all_values[7]	auto[0]	auto[1]	auto[1]	1814057	1			T28	107		T29	1163		T31	11
all_values[7]	auto[1]	auto[0]	auto[1]	27231	1			T31	4		T33	6		T1	35
all_values[7]	auto[1]	auto[1]	auto[1]	26797	1			T33	1		T1	41		T105	2
all_values[8]	auto[0]	auto[0]	auto[0]	2385252	1			T23	257		T24	449		T25	392
all_values[8]	auto[0]	auto[0]	auto[1]	1849526	1			T28	87		T29	1402		T31	32
all_values[8]	auto[0]	auto[1]	auto[0]	198027	1			T28	12		T29	107		T31	8
all_values[8]	auto[0]	auto[1]	auto[1]	1810967	1			T28	99		T29	1310		T31	16
all_values[8]	auto[1]	auto[0]	auto[1]	27171	1			T31	6		T33	4		T1	37
all_values[8]	auto[1]	auto[1]	auto[1]	27031	1			T31	2		T33	2		T1	28
all_values[9]	auto[0]	auto[0]	auto[0]	2388268	1			T23	257		T24	449		T25	392
all_values[9]	auto[0]	auto[0]	auto[1]	1842200	1			T28	98		T29	1478		T31	31
all_values[9]	auto[0]	auto[1]	auto[0]	201151	1			T28	45		T29	63		T31	8
all_values[9]	auto[0]	auto[1]	auto[1]	1812195	1			T28	66		T29	1393		T31	6
all_values[9]	auto[1]	auto[0]	auto[1]	27357	1			T31	5		T33	3		T1	37
all_values[9]	auto[1]	auto[1]	auto[1]	26803	1			T31	2		T33	2		T1	36
all_values[10]	auto[0]	auto[0]	auto[0]	2388197	1			T23	257		T24	449		T25	392
all_values[10]	auto[0]	auto[0]	auto[1]	1838715	1			T28	79		T29	1483		T31	17
all_values[10]	auto[0]	auto[1]	auto[0]	200700	1			T28	14		T29	117		T31	3
all_values[10]	auto[0]	auto[1]	auto[1]	1816189	1			T28	137		T29	1292		T31	45
all_values[10]	auto[1]	auto[0]	auto[1]	27260	1			T31	3		T33	4		T1	51
all_values[10]	auto[1]	auto[1]	auto[1]	26913	1			T31	3		T33	3		T1	25
all_values[11]	auto[0]	auto[0]	auto[0]	2385262	1			T23	257		T24	449		T25	392
all_values[11]	auto[0]	auto[0]	auto[1]	1834738	1			T28	105		T29	1213		T31	50
all_values[11]	auto[0]	auto[1]	auto[0]	197927	1			T28	9		T29	164		T31	7
all_values[11]	auto[0]	auto[1]	auto[1]	1825912	1			T28	111		T29	1532		T31	3
all_values[11]	auto[1]	auto[0]	auto[1]	27372	1			T31	6		T33	2		T1	38
all_values[11]	auto[1]	auto[1]	auto[1]	26763	1			T1	38		T105	1		T106	26
all_values[12]	auto[0]	auto[0]	auto[0]	2390312	1			T23	257		T24	449		T25	392
all_values[12]	auto[0]	auto[0]	auto[1]	1840738	1			T28	108		T29	1712		T31	17
all_values[12]	auto[0]	auto[1]	auto[0]	202013	1			T28	3		T29	99		T31	18
all_values[12]	auto[0]	auto[1]	auto[1]	1810430	1			T28	119		T29	1052		T31	26
all_values[12]	auto[1]	auto[0]	auto[1]	27431	1			T31	4		T33	3		T1	50
all_values[12]	auto[1]	auto[1]	auto[1]	27050	1			T31	3		T33	3		T1	23
all_values[13]	auto[0]	auto[0]	auto[0]	2386180	1			T23	257		T24	449		T25	392
all_values[13]	auto[0]	auto[0]	auto[1]	1845798	1			T28	106		T29	946		T31	13
all_values[13]	auto[0]	auto[1]	auto[0]	202346	1			T28	5		T29	213		T31	17
all_values[13]	auto[0]	auto[1]	auto[1]	1809410	1			T28	103		T29	1738		T31	17
all_values[13]	auto[1]	auto[0]	auto[1]	27443	1			T31	7		T33	3		T1	26
all_values[13]	auto[1]	auto[1]	auto[1]	26797	1			T33	1		T1	30		T105	1
all_values[14]	auto[0]	auto[0]	auto[0]	2386764	1			T23	257		T24	449		T25	392
all_values[14]	auto[0]	auto[0]	auto[1]	1832647	1			T28	106		T29	1437		T31	35
all_values[14]	auto[0]	auto[1]	auto[0]	200594	1			T28	19		T29	110		T31	5
all_values[14]	auto[0]	auto[1]	auto[1]	1824008	1			T28	98		T29	1318		T31	8
all_values[14]	auto[1]	auto[0]	auto[1]	27288	1			T31	7		T33	2		T1	33
all_values[14]	auto[1]	auto[1]	auto[1]	26673	1			T31	1		T33	3		T1	37
all_values[15]	auto[0]	auto[0]	auto[0]	2385995	1			T23	257		T24	449		T25	392
all_values[15]	auto[0]	auto[0]	auto[1]	1835132	1			T28	105		T29	1363		T31	52
all_values[15]	auto[0]	auto[1]	auto[0]	201530	1			T28	9		T29	92		T31	14
all_values[15]	auto[0]	auto[1]	auto[1]	1821051	1			T28	99		T29	1463		T31	6
all_values[15]	auto[1]	auto[0]	auto[1]	27114	1			T31	8		T33	3		T1	36
all_values[15]	auto[1]	auto[1]	auto[1]	27152	1			T31	1		T33	3		T1	49
all_values[16]	auto[0]	auto[0]	auto[0]	2388623	1			T23	257		T24	449		T25	392
all_values[16]	auto[0]	auto[0]	auto[1]	1828845	1			T28	125		T29	1235		T31	7
all_values[16]	auto[0]	auto[1]	auto[0]	204941	1			T28	15		T29	73		T31	32
all_values[16]	auto[0]	auto[1]	auto[1]	1821290	1			T28	87		T29	1547		T31	30
all_values[16]	auto[1]	auto[0]	auto[1]	27486	1			T31	5		T33	7		T1	45
all_values[16]	auto[1]	auto[1]	auto[1]	26789	1			T31	2		T33	1		T1	24
all_values[17]	auto[0]	auto[0]	auto[0]	2385631	1			T23	257		T24	449		T25	392
all_values[17]	auto[0]	auto[0]	auto[1]	1813786	1			T28	106		T29	1266		T31	17
all_values[17]	auto[0]	auto[1]	auto[0]	200133	1			T28	11		T29	57		T31	14
all_values[17]	auto[0]	auto[1]	auto[1]	1844100	1			T28	93		T29	1567		T31	34
all_values[17]	auto[1]	auto[0]	auto[1]	27304	1			T31	4		T33	1		T1	39
all_values[17]	auto[1]	auto[1]	auto[1]	27020	1			T31	2		T33	3		T1	34
all_values[18]	auto[0]	auto[0]	auto[0]	2386802	1			T23	257		T24	449		T25	392
all_values[18]	auto[0]	auto[0]	auto[1]	1843363	1			T28	116		T29	1394		T31	25
all_values[18]	auto[0]	auto[1]	auto[0]	203213	1			T28	17		T29	120		T31	25
all_values[18]	auto[0]	auto[1]	auto[1]	1810145	1			T28	69		T29	1412		T31	2
all_values[18]	auto[1]	auto[0]	auto[1]	27374	1			T31	3		T33	4		T1	37
all_values[18]	auto[1]	auto[1]	auto[1]	27077	1			T33	2		T1	27		T105	2
all_values[19]	auto[0]	auto[0]	auto[0]	2383029	1			T23	257		T24	449		T25	392
all_values[19]	auto[0]	auto[0]	auto[1]	1831941	1			T28	111		T29	1568		T31	37
all_values[19]	auto[0]	auto[1]	auto[0]	203880	1			T28	12		T29	103		T31	11
all_values[19]	auto[0]	auto[1]	auto[1]	1824969	1			T28	91		T29	1270		T31	8
all_values[19]	auto[1]	auto[0]	auto[1]	27408	1			T31	4		T33	5		T1	26
all_values[19]	auto[1]	auto[1]	auto[1]	26747	1			T33	1		T1	41		T105	4
all_values[20]	auto[0]	auto[0]	auto[0]	2386906	1			T23	257		T24	449		T25	392
all_values[20]	auto[0]	auto[0]	auto[1]	1837275	1			T28	101		T29	1278		T31	35
all_values[20]	auto[0]	auto[1]	auto[0]	199819	1			T28	11		T29	48		T31	28
all_values[20]	auto[0]	auto[1]	auto[1]	1819726	1			T28	125		T29	1572		T31	8
all_values[20]	auto[1]	auto[0]	auto[1]	27368	1			T31	3		T33	5		T1	29
all_values[20]	auto[1]	auto[1]	auto[1]	26880	1			T31	1		T33	1		T1	40
all_values[21]	auto[0]	auto[0]	auto[0]	2383819	1			T23	257		T24	449		T25	392
all_values[21]	auto[0]	auto[0]	auto[1]	1824594	1			T28	138		T29	1424		T31	11
all_values[21]	auto[0]	auto[1]	auto[0]	206278	1			T28	13		T29	114		T31	22
all_values[21]	auto[0]	auto[1]	auto[1]	1829210	1			T28	58		T29	1363		T31	40
all_values[21]	auto[1]	auto[0]	auto[1]	27499	1			T31	3		T33	3		T1	46
all_values[21]	auto[1]	auto[1]	auto[1]	26574	1			T31	5		T33	2		T1	21
all_values[22]	auto[0]	auto[0]	auto[0]	2387610	1			T23	257		T24	449		T25	392
all_values[22]	auto[0]	auto[0]	auto[1]	1834356	1			T28	114		T29	1549		T31	18
all_values[22]	auto[0]	auto[1]	auto[0]	201203	1			T28	25		T29	90		T31	18
all_values[22]	auto[0]	auto[1]	auto[1]	1820794	1			T28	91		T29	1246		T31	31
all_values[22]	auto[1]	auto[0]	auto[1]	27504	1			T31	5		T33	5		T1	26
all_values[22]	auto[1]	auto[1]	auto[1]	26507	1			T31	1		T1	44		T106	31
all_values[23]	auto[0]	auto[0]	auto[0]	2385146	1			T23	257		T24	449		T25	392
all_values[23]	auto[0]	auto[0]	auto[1]	1843171	1			T28	103		T29	1148		T31	17
all_values[23]	auto[0]	auto[1]	auto[0]	198882	1			T28	18		T29	162		T31	15
all_values[23]	auto[0]	auto[1]	auto[1]	1816505	1			T28	103		T29	1568		T31	29
all_values[23]	auto[1]	auto[0]	auto[1]	27333	1			T31	4		T33	2		T1	30
all_values[23]	auto[1]	auto[1]	auto[1]	26937	1			T31	3		T33	4		T1	40
all_values[24]	auto[0]	auto[0]	auto[0]	2388541	1			T23	257		T24	449		T25	392
all_values[24]	auto[0]	auto[0]	auto[1]	1823953	1			T28	105		T29	1367		T31	24
all_values[24]	auto[0]	auto[1]	auto[0]	202784	1			T28	15		T29	88		T31	8
all_values[24]	auto[0]	auto[1]	auto[1]	1828466	1			T28	99		T29	1429		T31	28
all_values[24]	auto[1]	auto[0]	auto[1]	27258	1			T31	6		T33	4		T1	37
all_values[24]	auto[1]	auto[1]	auto[1]	26972	1			T31	4		T33	2		T1	21
all_values[25]	auto[0]	auto[0]	auto[0]	2385548	1			T23	257		T24	449		T25	392
all_values[25]	auto[0]	auto[0]	auto[1]	1837340	1			T28	97		T29	1296		T31	20
all_values[25]	auto[0]	auto[1]	auto[0]	201684	1			T28	30		T29	137		T31	14
all_values[25]	auto[0]	auto[1]	auto[1]	1819208	1			T28	96		T29	1483		T31	21
all_values[25]	auto[1]	auto[0]	auto[1]	27044	1			T31	6		T33	5		T1	32
all_values[25]	auto[1]	auto[1]	auto[1]	27150	1			T31	1		T1	30		T105	1
all_values[26]	auto[0]	auto[0]	auto[0]	2389644	1			T23	257		T24	449		T25	392
all_values[26]	auto[0]	auto[0]	auto[1]	1833721	1			T28	86		T29	1249		T31	41
all_values[26]	auto[0]	auto[1]	auto[0]	202593	1			T28	27		T29	101		T31	6
all_values[26]	auto[0]	auto[1]	auto[1]	1817779	1			T28	108		T29	1590		T31	9
all_values[26]	auto[1]	auto[0]	auto[1]	27291	1			T31	6		T33	4		T1	33
all_values[26]	auto[1]	auto[1]	auto[1]	26946	1			T31	1		T33	2		T1	36
all_values[27]	auto[0]	auto[0]	auto[0]	2389381	1			T23	257		T24	449		T25	392
all_values[27]	auto[0]	auto[0]	auto[1]	1829573	1			T28	105		T29	1224		T31	23
all_values[27]	auto[0]	auto[1]	auto[0]	201391	1			T28	16		T29	114		T31	16
all_values[27]	auto[0]	auto[1]	auto[1]	1823345	1			T28	110		T29	1555		T31	27
all_values[27]	auto[1]	auto[0]	auto[1]	27468	1			T31	3		T33	4		T1	27
all_values[27]	auto[1]	auto[1]	auto[1]	26816	1			T31	1		T33	1		T1	39
all_values[28]	auto[0]	auto[0]	auto[0]	2388919	1			T23	257		T24	449		T25	392
all_values[28]	auto[0]	auto[0]	auto[1]	1829154	1			T28	95		T29	1351		T31	13
all_values[28]	auto[0]	auto[1]	auto[0]	204867	1			T28	25		T29	89		T31	14
all_values[28]	auto[0]	auto[1]	auto[1]	1820891	1			T28	108		T29	1496		T31	37
all_values[28]	auto[1]	auto[0]	auto[1]	27188	1			T31	2		T33	4		T1	34
all_values[28]	auto[1]	auto[1]	auto[1]	26955	1			T31	4		T33	1		T1	30
all_values[29]	auto[0]	auto[0]	auto[0]	2387208	1			T23	257		T24	449		T25	392
all_values[29]	auto[0]	auto[0]	auto[1]	1827679	1			T28	130		T29	1417		T31	32
all_values[29]	auto[0]	auto[1]	auto[0]	202417	1			T28	6		T29	87		T31	7
all_values[29]	auto[0]	auto[1]	auto[1]	1826535	1			T28	86		T29	1350		T31	21
all_values[29]	auto[1]	auto[0]	auto[1]	27335	1			T31	5		T33	2		T1	32
all_values[29]	auto[1]	auto[1]	auto[1]	26800	1			T31	2		T33	3		T1	29
all_values[30]	auto[0]	auto[0]	auto[0]	2382084	1			T23	257		T24	449		T25	392
all_values[30]	auto[0]	auto[0]	auto[1]	1831727	1			T28	88		T29	1169		T31	10
all_values[30]	auto[0]	auto[1]	auto[0]	205989	1			T28	13		T29	115		T31	9
all_values[30]	auto[0]	auto[1]	auto[1]	1823989	1			T28	112		T29	1601		T31	32
all_values[30]	auto[1]	auto[0]	auto[1]	27376	1			T31	3		T33	4		T1	28
all_values[30]	auto[1]	auto[1]	auto[1]	26809	1			T31	2		T33	1		T1	39
all_values[31]	auto[0]	auto[0]	auto[0]	2385577	1			T23	257		T24	449		T25	392
all_values[31]	auto[0]	auto[0]	auto[1]	1846025	1			T28	109		T29	1381		T31	20
all_values[31]	auto[0]	auto[1]	auto[0]	201833	1			T28	18		T29	111		T31	20
all_values[31]	auto[0]	auto[1]	auto[1]	1810623	1			T28	101		T29	1409		T31	13
all_values[31]	auto[1]	auto[0]	auto[1]	27194	1			T31	3		T33	3		T1	25
all_values[31]	auto[1]	auto[1]	auto[1]	26722	1			T31	2		T1	43		T105	2

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal