Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4238383 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2059591 |
1 |
|
|
T28 |
136 |
|
T29 |
1330 |
|
T31 |
27 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5283511 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
1014463 |
1 |
|
|
T28 |
74 |
|
T29 |
775 |
|
T31 |
12 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4240203 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2057771 |
1 |
|
|
T28 |
142 |
|
T29 |
1532 |
|
T31 |
32 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
520871 |
1 |
|
|
T28 |
24 |
|
T29 |
488 |
|
T31 |
17 |
| auto[1] |
auto[0] |
auto[1] |
507886 |
1 |
|
|
T28 |
35 |
|
T29 |
445 |
|
T31 |
8 |
| auto[1] |
auto[1] |
auto[0] |
522437 |
1 |
|
|
T28 |
44 |
|
T29 |
269 |
|
T31 |
3 |
| auto[1] |
auto[1] |
auto[1] |
506577 |
1 |
|
|
T28 |
39 |
|
T29 |
330 |
|
T31 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |