Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4258481 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2039493 |
1 |
|
|
T28 |
122 |
|
T29 |
1151 |
|
T31 |
47 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5291919 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
1006055 |
1 |
|
|
T28 |
62 |
|
T29 |
694 |
|
T31 |
17 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4261706 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2036268 |
1 |
|
|
T28 |
156 |
|
T29 |
1455 |
|
T31 |
32 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
518975 |
1 |
|
|
T28 |
48 |
|
T29 |
488 |
|
T31 |
3 |
| auto[1] |
auto[0] |
auto[1] |
507305 |
1 |
|
|
T28 |
29 |
|
T29 |
410 |
|
T31 |
4 |
| auto[1] |
auto[1] |
auto[0] |
511238 |
1 |
|
|
T28 |
46 |
|
T29 |
273 |
|
T31 |
12 |
| auto[1] |
auto[1] |
auto[1] |
498750 |
1 |
|
|
T28 |
33 |
|
T29 |
284 |
|
T31 |
13 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |