Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4255650 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2042324 |
1 |
|
|
T28 |
121 |
|
T29 |
1730 |
|
T31 |
47 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
5275815 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
1022159 |
1 |
|
|
T28 |
76 |
|
T29 |
715 |
|
T31 |
11 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
4224549 |
1 |
|
|
T23 |
257 |
|
T24 |
449 |
|
T25 |
392 |
| auto[1] |
2073425 |
1 |
|
|
T28 |
135 |
|
T29 |
1450 |
|
T31 |
24 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
525993 |
1 |
|
|
T28 |
43 |
|
T29 |
298 |
|
T31 |
3 |
| auto[1] |
auto[0] |
auto[1] |
514114 |
1 |
|
|
T28 |
30 |
|
T29 |
311 |
|
T31 |
10 |
| auto[1] |
auto[1] |
auto[0] |
525273 |
1 |
|
|
T28 |
16 |
|
T29 |
437 |
|
T31 |
10 |
| auto[1] |
auto[1] |
auto[1] |
508045 |
1 |
|
|
T28 |
46 |
|
T29 |
404 |
|
T31 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |