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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.63 99.06 99.24 100.00 99.80 99.68 99.99


Total test records in report: 936
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html

T545 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_intr_rand_pgm.3171294675 Aug 28 07:49:21 PM UTC 24 Aug 28 07:49:24 PM UTC 24 50974412 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_full_random.1775797217 Aug 28 07:49:22 PM UTC 24 Aug 28 07:49:25 PM UTC 24 42087374 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_intr_with_filter_rand_intr_event.1837662775 Aug 28 07:49:21 PM UTC 24 Aug 28 07:49:25 PM UTC 24 39142270 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_alert_test.2594474272 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:26 PM UTC 24 14453294 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_random_dout_din_no_pullup_pulldown.4194707251 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:26 PM UTC 24 27138993 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/33.gpio_filter_stress.1946244678 Aug 28 07:48:54 PM UTC 24 Aug 28 07:49:26 PM UTC 24 869180413 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_rand_intr_trigger.150669559 Aug 28 07:49:21 PM UTC 24 Aug 28 07:49:26 PM UTC 24 989655802 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_random_dout_din.2636896948 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:26 PM UTC 24 57042305 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_smoke_no_pullup_pulldown.4106948972 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:26 PM UTC 24 738353097 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_dout_din_regs_random_rw.469101002 Aug 28 07:49:25 PM UTC 24 Aug 28 07:49:27 PM UTC 24 46903154 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_intr_rand_pgm.477341648 Aug 28 07:49:25 PM UTC 24 Aug 28 07:49:27 PM UTC 24 32280002 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_smoke.650048417 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:27 PM UTC 24 370855020 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_random_long_reg_writes_reg_reads.4201794116 Aug 28 07:49:22 PM UTC 24 Aug 28 07:49:27 PM UTC 24 305612044 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_full_random.3692568188 Aug 28 07:49:26 PM UTC 24 Aug 28 07:49:28 PM UTC 24 96937526 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_rand_intr_trigger.1108847557 Aug 28 07:49:25 PM UTC 24 Aug 28 07:49:28 PM UTC 24 59873236 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_intr_with_filter_rand_intr_event.1005475331 Aug 28 07:49:25 PM UTC 24 Aug 28 07:49:28 PM UTC 24 118024692 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/38.gpio_filter_stress.2487497452 Aug 28 07:49:19 PM UTC 24 Aug 28 07:49:29 PM UTC 24 154094398 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_alert_test.4094946428 Aug 28 07:49:27 PM UTC 24 Aug 28 07:49:29 PM UTC 24 33411886 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_smoke.2759256335 Aug 28 07:49:28 PM UTC 24 Aug 28 07:49:30 PM UTC 24 400782545 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/16.gpio_stress_all.4044809243 Aug 28 07:47:28 PM UTC 24 Aug 28 07:49:57 PM UTC 24 59546251465 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/34.gpio_stress_all.384317850 Aug 28 07:49:02 PM UTC 24 Aug 28 07:49:31 PM UTC 24 919941359 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_smoke_no_pullup_pulldown.1332515454 Aug 28 07:49:28 PM UTC 24 Aug 28 07:49:31 PM UTC 24 68429961 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_intr_rand_pgm.2444471134 Aug 28 07:49:29 PM UTC 24 Aug 28 07:49:31 PM UTC 24 66715202 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_dout_din_regs_random_rw.1955344220 Aug 28 07:49:29 PM UTC 24 Aug 28 07:49:31 PM UTC 24 149554193 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/36.gpio_filter_stress.599889475 Aug 28 07:49:08 PM UTC 24 Aug 28 07:49:31 PM UTC 24 2243718455 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_random_dout_din.2475194083 Aug 28 07:49:29 PM UTC 24 Aug 28 07:49:32 PM UTC 24 51244970 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_random_dout_din_no_pullup_pulldown.4110469719 Aug 28 07:49:29 PM UTC 24 Aug 28 07:49:32 PM UTC 24 51176160 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_full_random.708232260 Aug 28 07:49:30 PM UTC 24 Aug 28 07:49:32 PM UTC 24 34562769 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_alert_test.2371472774 Aug 28 07:49:31 PM UTC 24 Aug 28 07:49:33 PM UTC 24 24084268 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/24.gpio_stress_all.2436052815 Aug 28 07:48:07 PM UTC 24 Aug 28 07:49:33 PM UTC 24 61643911445 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_random_long_reg_writes_reg_reads.1683787255 Aug 28 07:49:26 PM UTC 24 Aug 28 07:49:34 PM UTC 24 1945256080 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_full_random.1925439141 Aug 28 07:49:54 PM UTC 24 Aug 28 07:49:56 PM UTC 24 259431584 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_random_dout_din_no_pullup_pulldown.1313106613 Aug 28 07:49:32 PM UTC 24 Aug 28 07:49:35 PM UTC 24 263857046 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_smoke.1000401184 Aug 28 07:49:32 PM UTC 24 Aug 28 07:49:35 PM UTC 24 265953287 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_random_dout_din.3970533684 Aug 28 07:49:32 PM UTC 24 Aug 28 07:49:35 PM UTC 24 50057130 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/37.gpio_filter_stress.2786720127 Aug 28 07:49:15 PM UTC 24 Aug 28 07:49:35 PM UTC 24 1390802531 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_random_long_reg_writes_reg_reads.1257364739 Aug 28 07:49:30 PM UTC 24 Aug 28 07:49:36 PM UTC 24 2030757642 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_intr_with_filter_rand_intr_event.2599533672 Aug 28 07:49:30 PM UTC 24 Aug 28 07:49:36 PM UTC 24 79692660 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_intr_rand_pgm.1204203553 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:38 PM UTC 24 90364497 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_alert_test.2416277522 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:38 PM UTC 24 22982538 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_smoke.2499283961 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:38 PM UTC 24 22290946 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_full_random.2341693472 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 98566602 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_rand_intr_trigger.2690489154 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 84250666 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_smoke_no_pullup_pulldown.1383717645 Aug 28 07:49:51 PM UTC 24 Aug 28 07:49:54 PM UTC 24 179212722 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_random_dout_din.1211421839 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 196900059 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_intr_with_filter_rand_intr_event.1801005977 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 33328139 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_random_long_reg_writes_reg_reads.2854429742 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 32428349 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_dout_din_regs_random_rw.2238805577 Aug 28 07:49:37 PM UTC 24 Aug 28 07:49:39 PM UTC 24 75519243 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_smoke_no_pullup_pulldown.2810566285 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:39 PM UTC 24 47566911 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_intr_rand_pgm.2366836100 Aug 28 07:49:37 PM UTC 24 Aug 28 07:49:39 PM UTC 24 24336802 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_random_dout_din_no_pullup_pulldown.3721056430 Aug 28 07:49:37 PM UTC 24 Aug 28 07:49:39 PM UTC 24 381003142 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_smoke.2538969205 Aug 28 07:49:50 PM UTC 24 Aug 28 07:49:54 PM UTC 24 38681439 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_filter_stress.269128204 Aug 28 07:49:45 PM UTC 24 Aug 28 07:49:54 PM UTC 24 158435986 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_intr_with_filter_rand_intr_event.2126210423 Aug 28 07:49:49 PM UTC 24 Aug 28 07:49:54 PM UTC 24 60339590 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/0.gpio_stress_all.1193386632 Aug 28 07:45:44 PM UTC 24 Aug 28 07:49:41 PM UTC 24 17589304812 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_alert_test.1369526567 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:42 PM UTC 24 37851844 ps
T61 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_stress_all_with_rand_reset.126417518 Aug 28 07:49:24 PM UTC 24 Aug 28 07:49:42 PM UTC 24 10212110192 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_random_dout_din.1094562764 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:42 PM UTC 24 59625066 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_full_random.1842698641 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:42 PM UTC 24 841544748 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_random_long_reg_writes_reg_reads.3088346450 Aug 28 07:49:49 PM UTC 24 Aug 28 07:49:54 PM UTC 24 464470997 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_dout_din_regs_random_rw.631811696 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:42 PM UTC 24 229858993 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_rand_intr_trigger.3961483706 Aug 28 07:49:37 PM UTC 24 Aug 28 07:49:42 PM UTC 24 89384211 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_random_dout_din_no_pullup_pulldown.2722076830 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:43 PM UTC 24 88892323 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_intr_rand_pgm.175748587 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:43 PM UTC 24 568446196 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_smoke.3105425603 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:43 PM UTC 24 192899540 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_smoke_no_pullup_pulldown.2120714172 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:43 PM UTC 24 43191014 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_intr_with_filter_rand_intr_event.2612390142 Aug 28 07:49:38 PM UTC 24 Aug 28 07:49:43 PM UTC 24 98606591 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/30.gpio_stress_all.442571908 Aug 28 07:48:41 PM UTC 24 Aug 28 07:49:44 PM UTC 24 12157263832 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/21.gpio_stress_all.1659994380 Aug 28 07:47:53 PM UTC 24 Aug 28 07:49:54 PM UTC 24 29919732472 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_rand_intr_trigger.684703518 Aug 28 07:49:42 PM UTC 24 Aug 28 07:49:44 PM UTC 24 307580963 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_alert_test.1514235045 Aug 28 07:49:43 PM UTC 24 Aug 28 07:49:45 PM UTC 24 11039240 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_full_random.3534785172 Aug 28 07:49:43 PM UTC 24 Aug 28 07:49:45 PM UTC 24 74189441 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_smoke.1419181135 Aug 28 07:49:43 PM UTC 24 Aug 28 07:49:45 PM UTC 24 71747733 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_smoke_no_pullup_pulldown.1656395150 Aug 28 07:49:43 PM UTC 24 Aug 28 07:49:45 PM UTC 24 226719733 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_dout_din_regs_random_rw.4205845185 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:46 PM UTC 24 98501635 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_random_dout_din_no_pullup_pulldown.1585286736 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:46 PM UTC 24 74907299 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_random_long_reg_writes_reg_reads.1886936166 Aug 28 07:49:43 PM UTC 24 Aug 28 07:49:47 PM UTC 24 130743575 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_random_dout_din.574810806 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:47 PM UTC 24 388676912 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_intr_rand_pgm.2724287 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:47 PM UTC 24 756736874 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_filter_stress.2264124705 Aug 28 07:49:38 PM UTC 24 Aug 28 07:49:55 PM UTC 24 1793451732 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_intr_with_filter_rand_intr_event.617138131 Aug 28 07:49:42 PM UTC 24 Aug 28 07:49:48 PM UTC 24 88793868 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_full_random.3305916209 Aug 28 07:49:45 PM UTC 24 Aug 28 07:49:48 PM UTC 24 90706841 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_alert_test.2686957842 Aug 28 07:49:47 PM UTC 24 Aug 28 07:49:49 PM UTC 24 17391634 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_rand_intr_trigger.3874536906 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:49 PM UTC 24 139679773 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_filter_stress.2156547384 Aug 28 07:49:25 PM UTC 24 Aug 28 07:49:55 PM UTC 24 968885333 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_smoke.654444093 Aug 28 07:49:47 PM UTC 24 Aug 28 07:49:49 PM UTC 24 156488314 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_intr_with_filter_rand_intr_event.3463851572 Aug 28 07:49:44 PM UTC 24 Aug 28 07:49:50 PM UTC 24 69894186 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_dout_din_regs_random_rw.2192358233 Aug 28 07:49:48 PM UTC 24 Aug 28 07:49:50 PM UTC 24 57405125 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_random_long_reg_writes_reg_reads.3581580089 Aug 28 07:49:45 PM UTC 24 Aug 28 07:49:50 PM UTC 24 147563276 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_random_dout_din_no_pullup_pulldown.354523243 Aug 28 07:49:48 PM UTC 24 Aug 28 07:49:50 PM UTC 24 143108604 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_smoke_no_pullup_pulldown.2846481931 Aug 28 07:49:48 PM UTC 24 Aug 28 07:49:50 PM UTC 24 46781003 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_filter_stress.309091420 Aug 28 07:49:36 PM UTC 24 Aug 28 07:49:50 PM UTC 24 303934421 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_random_long_reg_writes_reg_reads.2529142818 Aug 28 07:49:40 PM UTC 24 Aug 28 07:49:50 PM UTC 24 787291575 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_intr_rand_pgm.4033877634 Aug 28 07:49:52 PM UTC 24 Aug 28 07:49:54 PM UTC 24 68969115 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_intr_with_filter_rand_intr_event.3215341894 Aug 28 07:49:53 PM UTC 24 Aug 28 07:49:55 PM UTC 24 20169723 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_random_dout_din.2776244825 Aug 28 07:49:48 PM UTC 24 Aug 28 07:49:51 PM UTC 24 76317043 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_intr_rand_pgm.3408411772 Aug 28 07:49:49 PM UTC 24 Aug 28 07:49:52 PM UTC 24 169511899 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_alert_test.1450664098 Aug 28 07:49:50 PM UTC 24 Aug 28 07:49:53 PM UTC 24 10456395 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_full_random.2477737896 Aug 28 07:49:50 PM UTC 24 Aug 28 07:49:53 PM UTC 24 40489618 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_filter_stress.1686837374 Aug 28 07:49:21 PM UTC 24 Aug 28 07:49:53 PM UTC 24 3156492456 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_rand_intr_trigger.3500149947 Aug 28 07:49:49 PM UTC 24 Aug 28 07:49:53 PM UTC 24 192335558 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_random_dout_din.795987043 Aug 28 07:49:51 PM UTC 24 Aug 28 07:49:53 PM UTC 24 132060787 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_dout_din_regs_random_rw.2831494944 Aug 28 07:49:52 PM UTC 24 Aug 28 07:49:54 PM UTC 24 20842164 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_random_dout_din_no_pullup_pulldown.1645131059 Aug 28 07:49:52 PM UTC 24 Aug 28 07:49:54 PM UTC 24 386262839 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_alert_test.3949583961 Aug 28 07:49:54 PM UTC 24 Aug 28 07:49:56 PM UTC 24 57731379 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_filter_stress.750723155 Aug 28 07:49:30 PM UTC 24 Aug 28 07:49:57 PM UTC 24 1094171127 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_random_long_reg_writes_reg_reads.2312545409 Aug 28 07:49:54 PM UTC 24 Aug 28 07:49:57 PM UTC 24 193101110 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_smoke.2844306814 Aug 28 07:49:54 PM UTC 24 Aug 28 07:49:57 PM UTC 24 141214414 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_random_dout_din.4112038601 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:58 PM UTC 24 24706495 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_random_dout_din_no_pullup_pulldown.2957059669 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:58 PM UTC 24 22516606 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_dout_din_regs_random_rw.1124999797 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:58 PM UTC 24 115449332 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_intr_rand_pgm.2676529710 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:58 PM UTC 24 149826201 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_smoke_no_pullup_pulldown.3664834078 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:58 PM UTC 24 43461995 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/28.gpio_stress_all.3419542018 Aug 28 07:48:30 PM UTC 24 Aug 28 07:49:58 PM UTC 24 6003894803 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_intr_with_filter_rand_intr_event.1456563741 Aug 28 07:49:56 PM UTC 24 Aug 28 07:49:59 PM UTC 24 60173613 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_rand_intr_trigger.1356414435 Aug 28 07:49:55 PM UTC 24 Aug 28 07:49:59 PM UTC 24 291260270 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_full_random.2416463852 Aug 28 07:49:57 PM UTC 24 Aug 28 07:49:59 PM UTC 24 249604379 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_alert_test.3228907255 Aug 28 07:49:58 PM UTC 24 Aug 28 07:50:00 PM UTC 24 24051206 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_random_dout_din_no_pullup_pulldown.1287023790 Aug 28 07:49:58 PM UTC 24 Aug 28 07:50:00 PM UTC 24 22942722 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_smoke_no_pullup_pulldown.262987970 Aug 28 07:49:58 PM UTC 24 Aug 28 07:50:00 PM UTC 24 98129316 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_random_dout_din.3139154457 Aug 28 07:49:58 PM UTC 24 Aug 28 07:50:00 PM UTC 24 34124989 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_smoke.2076098094 Aug 28 07:49:58 PM UTC 24 Aug 28 07:50:01 PM UTC 24 107136595 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_dout_din_regs_random_rw.1385410095 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:01 PM UTC 24 39473225 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_intr_rand_pgm.833750970 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:02 PM UTC 24 30876040 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_random_long_reg_writes_reg_reads.1606033289 Aug 28 07:49:57 PM UTC 24 Aug 28 07:50:02 PM UTC 24 433632978 ps
T62 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/5.gpio_stress_all_with_rand_reset.1384199553 Aug 28 07:46:17 PM UTC 24 Aug 28 07:50:02 PM UTC 24 5213161903 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_full_random.75551222 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:02 PM UTC 24 36923337 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_intr_with_filter_rand_intr_event.31338579 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:02 PM UTC 24 25830866 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_alert_test.4184305025 Aug 28 07:50:01 PM UTC 24 Aug 28 07:50:02 PM UTC 24 37811378 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_rand_intr_trigger.468939401 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:04 PM UTC 24 74973234 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_filter_stress.1515219925 Aug 28 07:49:42 PM UTC 24 Aug 28 07:50:05 PM UTC 24 761103870 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/42.gpio_stress_all.3782076156 Aug 28 07:49:36 PM UTC 24 Aug 28 07:50:07 PM UTC 24 4099106137 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_random_long_reg_writes_reg_reads.1786411871 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:08 PM UTC 24 1986295464 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/40.gpio_stress_all.415731358 Aug 28 07:49:27 PM UTC 24 Aug 28 07:50:10 PM UTC 24 3000195754 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/8.gpio_stress_all.3683576453 Aug 28 07:46:32 PM UTC 24 Aug 28 07:50:10 PM UTC 24 13360556397 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_filter_stress.1479930491 Aug 28 07:49:49 PM UTC 24 Aug 28 07:50:11 PM UTC 24 2190375828 ps
T63 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_stress_all_with_rand_reset.462533479 Aug 28 07:49:43 PM UTC 24 Aug 28 07:50:12 PM UTC 24 1794043835 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_filter_stress.820891277 Aug 28 07:49:54 PM UTC 24 Aug 28 07:50:19 PM UTC 24 372679718 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/1.gpio_stress_all.3482084757 Aug 28 07:45:52 PM UTC 24 Aug 28 07:50:26 PM UTC 24 92192320491 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_filter_stress.492586418 Aug 28 07:49:57 PM UTC 24 Aug 28 07:50:27 PM UTC 24 8123434998 ps
T64 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_stress_all_with_rand_reset.1525085939 Aug 28 07:49:50 PM UTC 24 Aug 28 07:50:30 PM UTC 24 2952254254 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_filter_stress.51132231 Aug 28 07:49:59 PM UTC 24 Aug 28 07:50:34 PM UTC 24 4449835498 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/16.gpio_stress_all_with_rand_reset.1287777284 Aug 28 07:47:28 PM UTC 24 Aug 28 07:50:36 PM UTC 24 3407931098 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/46.gpio_stress_all.1865363127 Aug 28 07:49:50 PM UTC 24 Aug 28 07:50:40 PM UTC 24 1932863438 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/11.gpio_stress_all.4114193586 Aug 28 07:46:50 PM UTC 24 Aug 28 07:50:47 PM UTC 24 18662887666 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/17.gpio_stress_all_with_rand_reset.462150469 Aug 28 07:47:34 PM UTC 24 Aug 28 07:50:50 PM UTC 24 29925425551 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/2.gpio_stress_all.1745596898 Aug 28 07:45:58 PM UTC 24 Aug 28 07:51:02 PM UTC 24 41216261342 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/33.gpio_stress_all.1630894418 Aug 28 07:48:56 PM UTC 24 Aug 28 07:51:11 PM UTC 24 15892951225 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/25.gpio_stress_all.389773671 Aug 28 07:48:12 PM UTC 24 Aug 28 07:51:12 PM UTC 24 11059667785 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/18.gpio_stress_all.1556784478 Aug 28 07:47:38 PM UTC 24 Aug 28 07:51:21 PM UTC 24 7023626851 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/24.gpio_stress_all_with_rand_reset.1926390039 Aug 28 07:48:07 PM UTC 24 Aug 28 07:51:33 PM UTC 24 4786084437 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/31.gpio_stress_all.1309698546 Aug 28 07:48:47 PM UTC 24 Aug 28 07:51:38 PM UTC 24 6180029278 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/38.gpio_stress_all.3093694989 Aug 28 07:49:20 PM UTC 24 Aug 28 07:51:48 PM UTC 24 15666648107 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/17.gpio_stress_all.1425549521 Aug 28 07:47:33 PM UTC 24 Aug 28 07:51:50 PM UTC 24 40980318564 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/32.gpio_stress_all.1673407054 Aug 28 07:48:52 PM UTC 24 Aug 28 07:51:57 PM UTC 24 22714942976 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/39.gpio_stress_all.475755237 Aug 28 07:49:23 PM UTC 24 Aug 28 07:52:08 PM UTC 24 20431358036 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_stress_all_with_rand_reset.3717794855 Aug 28 07:49:58 PM UTC 24 Aug 28 07:52:17 PM UTC 24 3486780545 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/27.gpio_stress_all.2416315910 Aug 28 07:48:22 PM UTC 24 Aug 28 07:52:20 PM UTC 24 16933445792 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/49.gpio_stress_all.3142579406 Aug 28 07:50:01 PM UTC 24 Aug 28 07:52:25 PM UTC 24 8524393835 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/29.gpio_stress_all.1659600740 Aug 28 07:48:34 PM UTC 24 Aug 28 07:52:33 PM UTC 24 71705436546 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/35.gpio_stress_all.996750263 Aug 28 07:49:06 PM UTC 24 Aug 28 07:52:34 PM UTC 24 27181932654 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_stress_all.3497091176 Aug 28 07:49:40 PM UTC 24 Aug 28 07:52:41 PM UTC 24 20795699276 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/37.gpio_stress_all.1193760554 Aug 28 07:49:15 PM UTC 24 Aug 28 07:53:01 PM UTC 24 52189882196 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/28.gpio_stress_all_with_rand_reset.2913139871 Aug 28 07:48:30 PM UTC 24 Aug 28 07:53:01 PM UTC 24 32524516153 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/36.gpio_stress_all.1144212497 Aug 28 07:49:10 PM UTC 24 Aug 28 07:53:03 PM UTC 24 29281382178 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/44.gpio_stress_all.3690257567 Aug 28 07:49:43 PM UTC 24 Aug 28 07:53:23 PM UTC 24 15470501195 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/41.gpio_stress_all.3640230564 Aug 28 07:49:31 PM UTC 24 Aug 28 07:53:34 PM UTC 24 70058854151 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/48.gpio_stress_all.4291669533 Aug 28 07:49:57 PM UTC 24 Aug 28 07:53:43 PM UTC 24 169584327203 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/47.gpio_stress_all.2569153337 Aug 28 07:49:54 PM UTC 24 Aug 28 07:53:50 PM UTC 24 17852802654 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/43.gpio_stress_all_with_rand_reset.979569619 Aug 28 07:49:40 PM UTC 24 Aug 28 07:54:21 PM UTC 24 6995648882 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/default/45.gpio_stress_all.249002211 Aug 28 07:49:46 PM UTC 24 Aug 28 07:55:35 PM UTC 24 45091854863 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_csr_rw.4043486368 Aug 28 09:31:39 PM UTC 24 Aug 28 09:31:41 PM UTC 24 34736206 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_same_csr_outstanding.3202234592 Aug 28 09:31:39 PM UTC 24 Aug 28 09:31:41 PM UTC 24 56317256 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_csr_aliasing.3196511311 Aug 28 09:31:40 PM UTC 24 Aug 28 09:31:42 PM UTC 24 86331650 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_csr_mem_rw_with_rand_reset.1227717014 Aug 28 09:31:40 PM UTC 24 Aug 28 09:31:42 PM UTC 24 47626633 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_tl_intg_err.2446018858 Aug 28 09:31:40 PM UTC 24 Aug 28 09:31:43 PM UTC 24 73914613 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_intr_test.713852964 Aug 28 09:31:41 PM UTC 24 Aug 28 09:31:43 PM UTC 24 25247394 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_tl_errors.4089733145 Aug 28 09:31:40 PM UTC 24 Aug 28 09:31:43 PM UTC 24 689484662 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_csr_hw_reset.3582048044 Aug 28 09:31:42 PM UTC 24 Aug 28 09:31:44 PM UTC 24 76718082 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_csr_rw.4172055355 Aug 28 09:31:43 PM UTC 24 Aug 28 09:31:45 PM UTC 24 38970640 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_same_csr_outstanding.115704073 Aug 28 09:31:43 PM UTC 24 Aug 28 09:31:45 PM UTC 24 27688162 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_csr_aliasing.1715615050 Aug 28 09:31:43 PM UTC 24 Aug 28 09:31:46 PM UTC 24 28851627 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_csr_mem_rw_with_rand_reset.1132089647 Aug 28 09:31:44 PM UTC 24 Aug 28 09:31:46 PM UTC 24 30800061 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_intr_test.2620131170 Aug 28 09:31:45 PM UTC 24 Aug 28 09:31:47 PM UTC 24 11798447 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_csr_hw_reset.433996282 Aug 28 09:31:45 PM UTC 24 Aug 28 09:31:47 PM UTC 24 36825863 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_tl_intg_err.1590403752 Aug 28 09:31:44 PM UTC 24 Aug 28 09:31:47 PM UTC 24 180679023 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/0.gpio_csr_bit_bash.1908946652 Aug 28 09:31:42 PM UTC 24 Aug 28 09:31:47 PM UTC 24 400912477 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_csr_rw.2745861087 Aug 28 09:31:46 PM UTC 24 Aug 28 09:31:48 PM UTC 24 22507066 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_csr_aliasing.2693855661 Aug 28 09:31:46 PM UTC 24 Aug 28 09:31:48 PM UTC 24 32504896 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_same_csr_outstanding.2039536125 Aug 28 09:31:46 PM UTC 24 Aug 28 09:31:48 PM UTC 24 160624690 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_csr_mem_rw_with_rand_reset.269993029 Aug 28 09:31:46 PM UTC 24 Aug 28 09:31:48 PM UTC 24 132093788 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_tl_errors.2420189441 Aug 28 09:31:45 PM UTC 24 Aug 28 09:31:49 PM UTC 24 818004555 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/1.gpio_csr_bit_bash.4243374802 Aug 28 09:31:45 PM UTC 24 Aug 28 09:31:49 PM UTC 24 1132070459 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_intr_test.2768015754 Aug 28 09:31:47 PM UTC 24 Aug 28 09:31:49 PM UTC 24 17172665 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_csr_hw_reset.1941606630 Aug 28 09:31:47 PM UTC 24 Aug 28 09:31:49 PM UTC 24 20375364 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_tl_intg_err.3925344800 Aug 28 09:31:47 PM UTC 24 Aug 28 09:31:50 PM UTC 24 124511825 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_csr_bit_bash.21749426 Aug 28 09:31:47 PM UTC 24 Aug 28 09:31:50 PM UTC 24 150917363 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_csr_rw.62554834 Aug 28 09:31:48 PM UTC 24 Aug 28 09:31:50 PM UTC 24 12989922 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_same_csr_outstanding.875821230 Aug 28 09:31:48 PM UTC 24 Aug 28 09:31:50 PM UTC 24 16861982 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_csr_aliasing.535047518 Aug 28 09:31:48 PM UTC 24 Aug 28 09:31:50 PM UTC 24 152453359 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_csr_mem_rw_with_rand_reset.3004947700 Aug 28 09:31:48 PM UTC 24 Aug 28 09:31:51 PM UTC 24 64954138 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/2.gpio_tl_errors.3518644182 Aug 28 09:31:47 PM UTC 24 Aug 28 09:31:51 PM UTC 24 740404682 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_intr_test.1370434537 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:51 PM UTC 24 16030168 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_csr_rw.3679889909 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:52 PM UTC 24 42334834 ps
T83 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_csr_hw_reset.1650364295 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:52 PM UTC 24 49363704 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_tl_intg_err.1356823687 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:52 PM UTC 24 70629457 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_same_csr_outstanding.452740848 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:53 PM UTC 24 596286648 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_csr_mem_rw_with_rand_reset.1698424873 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:53 PM UTC 24 71881155 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_intr_test.2893350808 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:53 PM UTC 24 52121578 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_csr_aliasing.1612034642 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:53 PM UTC 24 19857696 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_tl_intg_err.3671080410 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:53 PM UTC 24 36808623 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_tl_errors.3165728021 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:54 PM UTC 24 144275324 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_csr_hw_reset.1073293983 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:54 PM UTC 24 47770885 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_csr_rw.1423098364 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:54 PM UTC 24 13678749 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_same_csr_outstanding.2663948921 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:54 PM UTC 24 46700094 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_csr_mem_rw_with_rand_reset.1133934555 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:54 PM UTC 24 71177291 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_tl_errors.2463213778 Aug 28 09:31:51 PM UTC 24 Aug 28 09:31:55 PM UTC 24 1002432046 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/9.gpio_intr_test.3335535027 Aug 28 09:31:59 PM UTC 24 Aug 28 09:32:01 PM UTC 24 51101759 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_intr_test.3971109501 Aug 28 09:31:54 PM UTC 24 Aug 28 09:31:55 PM UTC 24 31757574 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_csr_rw.1676882240 Aug 28 09:31:54 PM UTC 24 Aug 28 09:31:55 PM UTC 24 50003133 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_tl_intg_err.2769706013 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:55 PM UTC 24 1178174349 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/3.gpio_csr_bit_bash.1027468191 Aug 28 09:31:50 PM UTC 24 Aug 28 09:31:55 PM UTC 24 389796177 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_same_csr_outstanding.3652158873 Aug 28 09:31:54 PM UTC 24 Aug 28 09:31:56 PM UTC 24 20006632 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_tl_intg_err.1145141441 Aug 28 09:31:54 PM UTC 24 Aug 28 09:31:56 PM UTC 24 69135840 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_csr_mem_rw_with_rand_reset.955063990 Aug 28 09:31:54 PM UTC 24 Aug 28 09:31:56 PM UTC 24 35459595 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/4.gpio_csr_bit_bash.2611732846 Aug 28 09:31:52 PM UTC 24 Aug 28 09:31:57 PM UTC 24 175003324 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_intr_test.3575681705 Aug 28 09:31:55 PM UTC 24 Aug 28 09:31:57 PM UTC 24 16427887 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_csr_rw.1695578213 Aug 28 09:31:55 PM UTC 24 Aug 28 09:31:57 PM UTC 24 14878657 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_same_csr_outstanding.476923269 Aug 28 09:31:55 PM UTC 24 Aug 28 09:31:57 PM UTC 24 134114703 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/6.gpio_tl_errors.3340880185 Aug 28 09:31:55 PM UTC 24 Aug 28 09:31:58 PM UTC 24 29726278 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_csr_mem_rw_with_rand_reset.952250754 Aug 28 09:31:55 PM UTC 24 Aug 28 09:31:58 PM UTC 24 94711082 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_intr_test.2132959092 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:58 PM UTC 24 26522268 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_csr_rw.172419494 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:58 PM UTC 24 38954134 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_same_csr_outstanding.2118540338 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:58 PM UTC 24 53678677 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/5.gpio_tl_errors.1757102285 Aug 28 09:31:53 PM UTC 24 Aug 28 09:31:58 PM UTC 24 694061234 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_csr_mem_rw_with_rand_reset.1009126420 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:59 PM UTC 24 23617073 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_tl_intg_err.1223196373 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:59 PM UTC 24 295162388 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/7.gpio_tl_errors.885727232 Aug 28 09:31:56 PM UTC 24 Aug 28 09:31:59 PM UTC 24 48160072 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_intr_test.455450592 Aug 28 09:31:57 PM UTC 24 Aug 28 09:31:59 PM UTC 24 17055068 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/9.gpio_csr_rw.3192573426 Aug 28 09:31:58 PM UTC 24 Aug 28 09:31:59 PM UTC 24 23291430 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/9.gpio_same_csr_outstanding.3248201122 Aug 28 09:31:58 PM UTC 24 Aug 28 09:32:00 PM UTC 24 22365826 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_tl_errors.1145144623 Aug 28 09:31:57 PM UTC 24 Aug 28 09:32:00 PM UTC 24 68798292 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/8.gpio_tl_intg_err.576081280 Aug 28 09:31:57 PM UTC 24 Aug 28 09:32:00 PM UTC 24 153379104 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/10.gpio_csr_rw.3569435488 Aug 28 09:31:59 PM UTC 24 Aug 28 09:32:01 PM UTC 24 49777206 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/10.gpio_same_csr_outstanding.2305980360 Aug 28 09:31:59 PM UTC 24 Aug 28 09:32:01 PM UTC 24 78245033 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/9.gpio_tl_intg_err.578521722 Aug 28 09:31:59 PM UTC 24 Aug 28 09:32:02 PM UTC 24 120909654 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/9.gpio_csr_mem_rw_with_rand_reset.3724203054 Aug 28 09:31:59 PM UTC 24 Aug 28 09:32:02 PM UTC 24 70737325 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/10.gpio_intr_test.2583592158 Aug 28 09:32:00 PM UTC 24 Aug 28 09:32:02 PM UTC 24 38557816 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/11.gpio_csr_rw.2410007037 Aug 28 09:32:00 PM UTC 24 Aug 28 09:32:02 PM UTC 24 16644097 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_28/gpio-sim-vcs/coverage/cover_reg_top/11.gpio_same_csr_outstanding.2682802755 Aug 28 09:32:00 PM UTC 24 Aug 28 09:32:02 PM UTC 24 36908196 ps
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