cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57749 |
1 |
|
|
T35 |
2471 |
|
T112 |
1547 |
|
T113 |
2222 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45144 |
1 |
|
|
T35 |
814 |
|
T112 |
1347 |
|
T113 |
570 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58454 |
1 |
|
|
T35 |
1548 |
|
T112 |
824 |
|
T113 |
1301 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48600 |
1 |
|
|
T35 |
608 |
|
T112 |
1209 |
|
T113 |
804 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T35 |
35 |
|
T112 |
60 |
|
T113 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
27 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T35 |
35 |
|
T112 |
63 |
|
T113 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T35 |
34 |
|
T112 |
59 |
|
T113 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
27 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T35 |
32 |
|
T112 |
61 |
|
T113 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T35 |
33 |
|
T112 |
59 |
|
T113 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
26 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T35 |
31 |
|
T112 |
60 |
|
T113 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T35 |
33 |
|
T112 |
56 |
|
T113 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
26 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T35 |
30 |
|
T112 |
58 |
|
T113 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T35 |
32 |
|
T112 |
55 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
26 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T35 |
30 |
|
T112 |
54 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T35 |
32 |
|
T112 |
54 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
26 |
|
T112 |
8 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T35 |
30 |
|
T112 |
52 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T35 |
32 |
|
T112 |
53 |
|
T113 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T35 |
29 |
|
T112 |
52 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T35 |
32 |
|
T112 |
53 |
|
T113 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T35 |
29 |
|
T112 |
52 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T35 |
31 |
|
T112 |
52 |
|
T113 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T35 |
28 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T35 |
28 |
|
T112 |
50 |
|
T113 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T35 |
27 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T35 |
28 |
|
T112 |
49 |
|
T113 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T35 |
27 |
|
T112 |
50 |
|
T113 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T35 |
28 |
|
T112 |
49 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T35 |
26 |
|
T112 |
49 |
|
T113 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T35 |
27 |
|
T112 |
48 |
|
T113 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T35 |
26 |
|
T112 |
49 |
|
T113 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T35 |
27 |
|
T112 |
47 |
|
T113 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T35 |
25 |
|
T112 |
46 |
|
T113 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
27 |
|
T112 |
11 |
|
T113 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T35 |
25 |
|
T112 |
46 |
|
T113 |
16 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
26 |
|
T112 |
7 |
|
T113 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T35 |
25 |
|
T112 |
44 |
|
T113 |
33 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55191 |
1 |
|
|
T35 |
1930 |
|
T112 |
1034 |
|
T113 |
1044 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51124 |
1 |
|
|
T35 |
468 |
|
T112 |
1083 |
|
T113 |
983 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61581 |
1 |
|
|
T35 |
2704 |
|
T112 |
966 |
|
T113 |
2179 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42072 |
1 |
|
|
T35 |
671 |
|
T112 |
2002 |
|
T113 |
743 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T35 |
29 |
|
T112 |
55 |
|
T113 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
21 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T35 |
29 |
|
T112 |
47 |
|
T113 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T35 |
29 |
|
T112 |
52 |
|
T113 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
21 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T35 |
28 |
|
T112 |
47 |
|
T113 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T35 |
28 |
|
T112 |
52 |
|
T113 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T35 |
29 |
|
T112 |
46 |
|
T113 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T35 |
28 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
28 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T35 |
28 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
26 |
|
T112 |
43 |
|
T113 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T35 |
27 |
|
T112 |
49 |
|
T113 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T35 |
26 |
|
T112 |
43 |
|
T113 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T35 |
27 |
|
T112 |
49 |
|
T113 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T35 |
25 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T35 |
26 |
|
T112 |
47 |
|
T113 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T35 |
24 |
|
T112 |
42 |
|
T113 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T35 |
26 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T35 |
24 |
|
T112 |
42 |
|
T113 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T35 |
26 |
|
T112 |
45 |
|
T113 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T35 |
22 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
23 |
|
T112 |
44 |
|
T113 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T35 |
21 |
|
T112 |
40 |
|
T113 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T35 |
23 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T35 |
21 |
|
T112 |
39 |
|
T113 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T35 |
23 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T35 |
20 |
|
T112 |
36 |
|
T113 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T35 |
22 |
|
T112 |
42 |
|
T113 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T35 |
20 |
|
T112 |
36 |
|
T113 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
20 |
|
T112 |
8 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T35 |
22 |
|
T112 |
42 |
|
T113 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
20 |
|
T112 |
16 |
|
T113 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T35 |
20 |
|
T112 |
36 |
|
T113 |
28 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60676 |
1 |
|
|
T35 |
1222 |
|
T112 |
1100 |
|
T113 |
2531 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46233 |
1 |
|
|
T35 |
731 |
|
T112 |
1120 |
|
T113 |
960 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56203 |
1 |
|
|
T35 |
1312 |
|
T112 |
1982 |
|
T113 |
698 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45856 |
1 |
|
|
T35 |
2190 |
|
T112 |
791 |
|
T113 |
660 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T35 |
37 |
|
T112 |
47 |
|
T113 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
18 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T35 |
43 |
|
T112 |
50 |
|
T113 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T35 |
37 |
|
T112 |
47 |
|
T113 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
18 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T35 |
43 |
|
T112 |
50 |
|
T113 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T35 |
36 |
|
T112 |
47 |
|
T113 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
17 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T35 |
43 |
|
T112 |
50 |
|
T113 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T35 |
36 |
|
T112 |
47 |
|
T113 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
17 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T35 |
42 |
|
T112 |
50 |
|
T113 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T35 |
33 |
|
T112 |
47 |
|
T113 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
17 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T35 |
42 |
|
T112 |
50 |
|
T113 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T35 |
32 |
|
T112 |
47 |
|
T113 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T35 |
17 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T35 |
42 |
|
T112 |
49 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T35 |
31 |
|
T112 |
45 |
|
T113 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T35 |
42 |
|
T112 |
48 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T35 |
30 |
|
T112 |
44 |
|
T113 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T35 |
42 |
|
T112 |
45 |
|
T113 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T35 |
29 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T35 |
28 |
|
T112 |
43 |
|
T113 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T35 |
40 |
|
T112 |
42 |
|
T113 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T35 |
26 |
|
T112 |
42 |
|
T113 |
37 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T35 |
40 |
|
T112 |
41 |
|
T113 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T35 |
26 |
|
T112 |
40 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T35 |
39 |
|
T112 |
39 |
|
T113 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T35 |
26 |
|
T112 |
39 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T35 |
39 |
|
T112 |
37 |
|
T113 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T35 |
26 |
|
T112 |
39 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T35 |
38 |
|
T112 |
36 |
|
T113 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
23 |
|
T112 |
17 |
|
T113 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T35 |
22 |
|
T112 |
38 |
|
T113 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
17 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T35 |
38 |
|
T112 |
34 |
|
T113 |
24 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54029 |
1 |
|
|
T35 |
1467 |
|
T112 |
1483 |
|
T113 |
927 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44740 |
1 |
|
|
T35 |
882 |
|
T112 |
762 |
|
T113 |
793 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60736 |
1 |
|
|
T35 |
1242 |
|
T112 |
1206 |
|
T113 |
872 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50396 |
1 |
|
|
T35 |
1957 |
|
T112 |
1618 |
|
T113 |
2310 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
21 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T35 |
36 |
|
T112 |
40 |
|
T113 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
14 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T35 |
38 |
|
T112 |
38 |
|
T113 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
21 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T35 |
35 |
|
T112 |
40 |
|
T113 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T35 |
38 |
|
T112 |
38 |
|
T113 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T35 |
34 |
|
T112 |
39 |
|
T113 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T35 |
37 |
|
T112 |
37 |
|
T113 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T35 |
34 |
|
T112 |
38 |
|
T113 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T35 |
37 |
|
T112 |
37 |
|
T113 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T35 |
34 |
|
T112 |
36 |
|
T113 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T35 |
36 |
|
T112 |
37 |
|
T113 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T35 |
34 |
|
T112 |
36 |
|
T113 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T35 |
36 |
|
T112 |
36 |
|
T113 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T35 |
33 |
|
T112 |
36 |
|
T113 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T35 |
33 |
|
T112 |
36 |
|
T113 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T35 |
36 |
|
T112 |
34 |
|
T113 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T35 |
32 |
|
T112 |
36 |
|
T113 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T35 |
34 |
|
T112 |
34 |
|
T113 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
20 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T35 |
31 |
|
T112 |
34 |
|
T113 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T35 |
34 |
|
T112 |
34 |
|
T113 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T35 |
34 |
|
T112 |
33 |
|
T113 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T35 |
31 |
|
T112 |
32 |
|
T113 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T35 |
32 |
|
T112 |
32 |
|
T113 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T35 |
31 |
|
T112 |
31 |
|
T113 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T35 |
31 |
|
T112 |
29 |
|
T113 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T35 |
31 |
|
T112 |
31 |
|
T113 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
17 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T35 |
31 |
|
T112 |
27 |
|
T113 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T35 |
31 |
|
T112 |
29 |
|
T113 |
40 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55371 |
1 |
|
|
T35 |
1015 |
|
T112 |
1625 |
|
T113 |
1044 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47379 |
1 |
|
|
T35 |
1109 |
|
T112 |
1479 |
|
T113 |
1014 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58411 |
1 |
|
|
T35 |
1158 |
|
T112 |
1196 |
|
T113 |
794 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47564 |
1 |
|
|
T35 |
2134 |
|
T112 |
786 |
|
T113 |
1976 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T35 |
42 |
|
T112 |
40 |
|
T113 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T35 |
47 |
|
T112 |
39 |
|
T113 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T35 |
42 |
|
T112 |
40 |
|
T113 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T35 |
46 |
|
T112 |
39 |
|
T113 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T35 |
42 |
|
T112 |
39 |
|
T113 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T35 |
46 |
|
T112 |
37 |
|
T113 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T35 |
42 |
|
T112 |
37 |
|
T113 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T35 |
45 |
|
T112 |
35 |
|
T113 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T35 |
41 |
|
T112 |
36 |
|
T113 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T35 |
45 |
|
T112 |
34 |
|
T113 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T35 |
41 |
|
T112 |
36 |
|
T113 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T35 |
44 |
|
T112 |
34 |
|
T113 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T35 |
38 |
|
T112 |
35 |
|
T113 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T35 |
42 |
|
T112 |
34 |
|
T113 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T35 |
38 |
|
T112 |
34 |
|
T113 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T35 |
41 |
|
T112 |
34 |
|
T113 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T35 |
37 |
|
T112 |
33 |
|
T113 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T35 |
40 |
|
T112 |
33 |
|
T113 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T35 |
35 |
|
T112 |
32 |
|
T113 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T35 |
39 |
|
T112 |
31 |
|
T113 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T35 |
33 |
|
T112 |
32 |
|
T113 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T35 |
39 |
|
T112 |
29 |
|
T113 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T35 |
31 |
|
T112 |
32 |
|
T113 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T35 |
38 |
|
T112 |
26 |
|
T113 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T35 |
30 |
|
T112 |
31 |
|
T113 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T35 |
36 |
|
T112 |
25 |
|
T113 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T35 |
30 |
|
T112 |
29 |
|
T113 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T35 |
35 |
|
T112 |
25 |
|
T113 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T35 |
29 |
|
T112 |
29 |
|
T113 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
16 |
|
T112 |
24 |
|
T113 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T35 |
35 |
|
T112 |
24 |
|
T113 |
30 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56057 |
1 |
|
|
T35 |
901 |
|
T112 |
1171 |
|
T113 |
1135 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44798 |
1 |
|
|
T35 |
873 |
|
T112 |
844 |
|
T113 |
687 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63633 |
1 |
|
|
T35 |
1382 |
|
T112 |
1924 |
|
T113 |
2537 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45730 |
1 |
|
|
T35 |
2232 |
|
T112 |
1143 |
|
T113 |
731 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T35 |
45 |
|
T112 |
47 |
|
T113 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T35 |
43 |
|
T112 |
50 |
|
T113 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T35 |
45 |
|
T112 |
46 |
|
T113 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T35 |
42 |
|
T112 |
48 |
|
T113 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T35 |
44 |
|
T112 |
45 |
|
T113 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T35 |
41 |
|
T112 |
48 |
|
T113 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T35 |
43 |
|
T112 |
43 |
|
T113 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T35 |
41 |
|
T112 |
45 |
|
T113 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T35 |
42 |
|
T112 |
42 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
42 |
|
T112 |
42 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T35 |
39 |
|
T112 |
42 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T35 |
41 |
|
T112 |
41 |
|
T113 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T35 |
36 |
|
T112 |
41 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T35 |
41 |
|
T112 |
40 |
|
T113 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T35 |
36 |
|
T112 |
41 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T35 |
40 |
|
T112 |
39 |
|
T113 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T35 |
35 |
|
T112 |
40 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
15 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T35 |
34 |
|
T112 |
40 |
|
T113 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
21 |
|
T112 |
14 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T35 |
34 |
|
T112 |
39 |
|
T113 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T35 |
36 |
|
T112 |
37 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
21 |
|
T112 |
14 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T35 |
34 |
|
T112 |
38 |
|
T113 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T35 |
35 |
|
T112 |
35 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
21 |
|
T112 |
14 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T35 |
34 |
|
T112 |
38 |
|
T113 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T35 |
34 |
|
T112 |
35 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
21 |
|
T112 |
14 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T35 |
34 |
|
T112 |
37 |
|
T113 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T35 |
33 |
|
T112 |
35 |
|
T113 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T35 |
21 |
|
T112 |
14 |
|
T113 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T35 |
31 |
|
T112 |
35 |
|
T113 |
22 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50952 |
1 |
|
|
T35 |
1255 |
|
T112 |
951 |
|
T113 |
1177 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47757 |
1 |
|
|
T35 |
2092 |
|
T112 |
712 |
|
T113 |
953 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56542 |
1 |
|
|
T35 |
1137 |
|
T112 |
1127 |
|
T113 |
926 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53770 |
1 |
|
|
T35 |
749 |
|
T112 |
2174 |
|
T113 |
1928 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T35 |
45 |
|
T112 |
50 |
|
T113 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
25 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T35 |
44 |
|
T112 |
52 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T35 |
45 |
|
T112 |
48 |
|
T113 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
25 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T35 |
44 |
|
T112 |
47 |
|
T113 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T35 |
43 |
|
T112 |
51 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T35 |
43 |
|
T112 |
46 |
|
T113 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T35 |
40 |
|
T112 |
45 |
|
T113 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T35 |
40 |
|
T112 |
45 |
|
T113 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T35 |
40 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T35 |
39 |
|
T112 |
49 |
|
T113 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T35 |
40 |
|
T112 |
43 |
|
T113 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T35 |
36 |
|
T112 |
49 |
|
T113 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T35 |
40 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T35 |
24 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T35 |
35 |
|
T112 |
48 |
|
T113 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
24 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T35 |
33 |
|
T112 |
48 |
|
T113 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T35 |
39 |
|
T112 |
35 |
|
T113 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
24 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T35 |
32 |
|
T112 |
48 |
|
T113 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T35 |
39 |
|
T112 |
33 |
|
T113 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
24 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T35 |
31 |
|
T112 |
48 |
|
T113 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T35 |
39 |
|
T112 |
31 |
|
T113 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
24 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T35 |
29 |
|
T112 |
47 |
|
T113 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T35 |
39 |
|
T112 |
29 |
|
T113 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T35 |
24 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T35 |
27 |
|
T112 |
47 |
|
T113 |
27 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59721 |
1 |
|
|
T35 |
2514 |
|
T112 |
2036 |
|
T113 |
1647 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49906 |
1 |
|
|
T35 |
993 |
|
T112 |
717 |
|
T113 |
1053 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54731 |
1 |
|
|
T35 |
985 |
|
T112 |
1541 |
|
T113 |
966 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44879 |
1 |
|
|
T35 |
851 |
|
T112 |
834 |
|
T113 |
1128 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T35 |
52 |
|
T112 |
40 |
|
T113 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T35 |
55 |
|
T112 |
36 |
|
T113 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T35 |
51 |
|
T112 |
39 |
|
T113 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T35 |
53 |
|
T112 |
35 |
|
T113 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T35 |
51 |
|
T112 |
38 |
|
T113 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T35 |
52 |
|
T112 |
34 |
|
T113 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T35 |
50 |
|
T112 |
37 |
|
T113 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T35 |
52 |
|
T112 |
34 |
|
T113 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T35 |
50 |
|
T112 |
37 |
|
T113 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T35 |
52 |
|
T112 |
33 |
|
T113 |
54 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T35 |
48 |
|
T112 |
36 |
|
T113 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
12 |
|
T112 |
25 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T35 |
52 |
|
T112 |
33 |
|
T113 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T35 |
48 |
|
T112 |
35 |
|
T113 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T35 |
50 |
|
T112 |
34 |
|
T113 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T35 |
47 |
|
T112 |
34 |
|
T113 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T35 |
46 |
|
T112 |
32 |
|
T113 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T35 |
46 |
|
T112 |
32 |
|
T113 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T35 |
45 |
|
T112 |
31 |
|
T113 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T35 |
45 |
|
T112 |
31 |
|
T113 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T35 |
44 |
|
T112 |
31 |
|
T113 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T35 |
43 |
|
T112 |
29 |
|
T113 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T35 |
43 |
|
T112 |
31 |
|
T113 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T35 |
39 |
|
T112 |
29 |
|
T113 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
42 |
|
T112 |
29 |
|
T113 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T35 |
36 |
|
T112 |
26 |
|
T113 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T35 |
41 |
|
T112 |
28 |
|
T113 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T35 |
35 |
|
T112 |
26 |
|
T113 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
21 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T35 |
39 |
|
T112 |
28 |
|
T113 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T35 |
11 |
|
T112 |
24 |
|
T113 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T35 |
33 |
|
T112 |
25 |
|
T113 |
43 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59099 |
1 |
|
|
T35 |
1067 |
|
T112 |
1005 |
|
T113 |
744 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50054 |
1 |
|
|
T35 |
1975 |
|
T112 |
754 |
|
T113 |
755 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55818 |
1 |
|
|
T35 |
1290 |
|
T112 |
1071 |
|
T113 |
2447 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43501 |
1 |
|
|
T35 |
1061 |
|
T112 |
2030 |
|
T113 |
852 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T35 |
50 |
|
T112 |
57 |
|
T113 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T35 |
45 |
|
T112 |
54 |
|
T113 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T35 |
50 |
|
T112 |
56 |
|
T113 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T35 |
45 |
|
T112 |
54 |
|
T113 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T35 |
50 |
|
T112 |
54 |
|
T113 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T35 |
46 |
|
T112 |
53 |
|
T113 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T35 |
49 |
|
T112 |
51 |
|
T113 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T35 |
45 |
|
T112 |
51 |
|
T113 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T35 |
46 |
|
T112 |
48 |
|
T113 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T35 |
44 |
|
T112 |
51 |
|
T113 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T35 |
44 |
|
T112 |
46 |
|
T113 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T35 |
43 |
|
T112 |
45 |
|
T113 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T35 |
40 |
|
T112 |
51 |
|
T113 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T35 |
42 |
|
T112 |
43 |
|
T113 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T35 |
40 |
|
T112 |
51 |
|
T113 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T35 |
40 |
|
T112 |
42 |
|
T113 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T35 |
38 |
|
T112 |
51 |
|
T113 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T35 |
40 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
18 |
|
T112 |
19 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T35 |
38 |
|
T112 |
50 |
|
T113 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T35 |
38 |
|
T112 |
50 |
|
T113 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T35 |
38 |
|
T112 |
50 |
|
T113 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T35 |
38 |
|
T112 |
49 |
|
T113 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T35 |
37 |
|
T112 |
48 |
|
T113 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
14 |
|
T112 |
15 |
|
T113 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T35 |
36 |
|
T112 |
32 |
|
T113 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T35 |
37 |
|
T112 |
48 |
|
T113 |
36 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60255 |
1 |
|
|
T35 |
1089 |
|
T112 |
1696 |
|
T113 |
2146 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49627 |
1 |
|
|
T35 |
1127 |
|
T112 |
730 |
|
T113 |
831 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57828 |
1 |
|
|
T35 |
2383 |
|
T112 |
2346 |
|
T113 |
1208 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41842 |
1 |
|
|
T35 |
714 |
|
T112 |
592 |
|
T113 |
648 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T35 |
47 |
|
T112 |
31 |
|
T113 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T35 |
45 |
|
T112 |
29 |
|
T113 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T35 |
46 |
|
T112 |
30 |
|
T113 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T35 |
42 |
|
T112 |
29 |
|
T113 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T35 |
45 |
|
T112 |
29 |
|
T113 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T35 |
42 |
|
T112 |
28 |
|
T113 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T35 |
42 |
|
T112 |
28 |
|
T113 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T35 |
41 |
|
T112 |
26 |
|
T113 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T35 |
41 |
|
T112 |
27 |
|
T113 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T35 |
40 |
|
T112 |
26 |
|
T113 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T35 |
41 |
|
T112 |
27 |
|
T113 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T35 |
40 |
|
T112 |
26 |
|
T113 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T35 |
41 |
|
T112 |
26 |
|
T113 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T35 |
39 |
|
T112 |
25 |
|
T113 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T35 |
39 |
|
T112 |
25 |
|
T113 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T35 |
38 |
|
T112 |
25 |
|
T113 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T35 |
38 |
|
T112 |
25 |
|
T113 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T35 |
36 |
|
T112 |
25 |
|
T113 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T35 |
37 |
|
T112 |
25 |
|
T113 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T35 |
35 |
|
T112 |
23 |
|
T113 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
37 |
|
T112 |
23 |
|
T113 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T35 |
33 |
|
T112 |
23 |
|
T113 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T35 |
37 |
|
T112 |
22 |
|
T113 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T35 |
33 |
|
T112 |
22 |
|
T113 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T35 |
37 |
|
T112 |
22 |
|
T113 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T35 |
32 |
|
T112 |
21 |
|
T113 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T35 |
21 |
|
T112 |
20 |
|
T113 |
19 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T35 |
36 |
|
T112 |
21 |
|
T113 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
21 |
|
T112 |
23 |
|
T113 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T35 |
30 |
|
T112 |
21 |
|
T113 |
26 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59271 |
1 |
|
|
T35 |
950 |
|
T112 |
1613 |
|
T113 |
2118 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44444 |
1 |
|
|
T35 |
1055 |
|
T112 |
1316 |
|
T113 |
624 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50269 |
1 |
|
|
T35 |
1093 |
|
T112 |
942 |
|
T113 |
1272 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54004 |
1 |
|
|
T35 |
2144 |
|
T112 |
1133 |
|
T113 |
969 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T35 |
55 |
|
T112 |
51 |
|
T113 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
16 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T35 |
55 |
|
T112 |
53 |
|
T113 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T35 |
54 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
16 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T35 |
55 |
|
T112 |
52 |
|
T113 |
40 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T35 |
52 |
|
T112 |
49 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T35 |
56 |
|
T112 |
52 |
|
T113 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T35 |
52 |
|
T112 |
48 |
|
T113 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T35 |
56 |
|
T112 |
50 |
|
T113 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T35 |
49 |
|
T112 |
48 |
|
T113 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T35 |
56 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T35 |
47 |
|
T112 |
48 |
|
T113 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T35 |
53 |
|
T112 |
48 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T35 |
46 |
|
T112 |
45 |
|
T113 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T35 |
53 |
|
T112 |
47 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T35 |
43 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T35 |
51 |
|
T112 |
45 |
|
T113 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T35 |
42 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T35 |
49 |
|
T112 |
45 |
|
T113 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T35 |
41 |
|
T112 |
45 |
|
T113 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T35 |
15 |
|
T112 |
13 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T35 |
48 |
|
T112 |
44 |
|
T113 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T35 |
41 |
|
T112 |
44 |
|
T113 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T35 |
47 |
|
T112 |
42 |
|
T113 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T35 |
41 |
|
T112 |
43 |
|
T113 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T35 |
43 |
|
T112 |
41 |
|
T113 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T35 |
41 |
|
T112 |
42 |
|
T113 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T35 |
43 |
|
T112 |
39 |
|
T113 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
40 |
|
T112 |
42 |
|
T113 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T35 |
41 |
|
T112 |
37 |
|
T113 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T35 |
15 |
|
T112 |
15 |
|
T113 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T35 |
40 |
|
T112 |
39 |
|
T113 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T35 |
41 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55793 |
1 |
|
|
T35 |
2504 |
|
T112 |
2081 |
|
T113 |
2271 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47929 |
1 |
|
|
T35 |
968 |
|
T112 |
1053 |
|
T113 |
826 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53897 |
1 |
|
|
T35 |
1081 |
|
T112 |
1117 |
|
T113 |
1191 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50481 |
1 |
|
|
T35 |
865 |
|
T112 |
973 |
|
T113 |
685 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T35 |
45 |
|
T112 |
42 |
|
T113 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1773 |
1 |
|
|
T35 |
49 |
|
T112 |
39 |
|
T113 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T35 |
45 |
|
T112 |
41 |
|
T113 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T35 |
48 |
|
T112 |
36 |
|
T113 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T35 |
43 |
|
T112 |
41 |
|
T113 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T35 |
48 |
|
T112 |
36 |
|
T113 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T35 |
43 |
|
T112 |
40 |
|
T113 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T35 |
48 |
|
T112 |
36 |
|
T113 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T35 |
43 |
|
T112 |
39 |
|
T113 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T35 |
47 |
|
T112 |
35 |
|
T113 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T35 |
42 |
|
T112 |
38 |
|
T113 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T35 |
47 |
|
T112 |
33 |
|
T113 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T35 |
42 |
|
T112 |
38 |
|
T113 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T35 |
44 |
|
T112 |
32 |
|
T113 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T35 |
37 |
|
T112 |
38 |
|
T113 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T35 |
44 |
|
T112 |
31 |
|
T113 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T35 |
36 |
|
T112 |
37 |
|
T113 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T35 |
43 |
|
T112 |
30 |
|
T113 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T35 |
35 |
|
T112 |
36 |
|
T113 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T35 |
14 |
|
T112 |
19 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T35 |
42 |
|
T112 |
30 |
|
T113 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
33 |
|
T112 |
35 |
|
T113 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
14 |
|
T112 |
18 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T35 |
38 |
|
T112 |
30 |
|
T113 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T35 |
33 |
|
T112 |
35 |
|
T113 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
14 |
|
T112 |
18 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T35 |
38 |
|
T112 |
29 |
|
T113 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
32 |
|
T112 |
33 |
|
T113 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
14 |
|
T112 |
18 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T35 |
36 |
|
T112 |
29 |
|
T113 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T35 |
14 |
|
T112 |
18 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T35 |
35 |
|
T112 |
29 |
|
T113 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
16 |
|
T113 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T35 |
14 |
|
T112 |
18 |
|
T113 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
25 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53150 |
1 |
|
|
T35 |
1321 |
|
T112 |
1176 |
|
T113 |
833 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47011 |
1 |
|
|
T35 |
919 |
|
T112 |
840 |
|
T113 |
760 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57324 |
1 |
|
|
T35 |
2562 |
|
T112 |
1208 |
|
T113 |
816 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50532 |
1 |
|
|
T35 |
525 |
|
T112 |
1758 |
|
T113 |
2421 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1695 |
1 |
|
|
T35 |
38 |
|
T112 |
44 |
|
T113 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T35 |
38 |
|
T112 |
44 |
|
T113 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T35 |
39 |
|
T112 |
42 |
|
T113 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T35 |
38 |
|
T112 |
44 |
|
T113 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T35 |
39 |
|
T112 |
41 |
|
T113 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T35 |
37 |
|
T112 |
43 |
|
T113 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T35 |
39 |
|
T112 |
40 |
|
T113 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T35 |
33 |
|
T112 |
43 |
|
T113 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T35 |
38 |
|
T112 |
40 |
|
T113 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
28 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
32 |
|
T112 |
43 |
|
T113 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T35 |
37 |
|
T112 |
39 |
|
T113 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
27 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T35 |
31 |
|
T112 |
42 |
|
T113 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T35 |
37 |
|
T112 |
38 |
|
T113 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
27 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T35 |
29 |
|
T112 |
39 |
|
T113 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T35 |
37 |
|
T112 |
37 |
|
T113 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
27 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T35 |
29 |
|
T112 |
37 |
|
T113 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T35 |
36 |
|
T112 |
36 |
|
T113 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
27 |
|
T112 |
22 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T35 |
28 |
|
T112 |
37 |
|
T113 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
27 |
|
T112 |
21 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T35 |
27 |
|
T112 |
37 |
|
T113 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T35 |
35 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
27 |
|
T112 |
21 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T35 |
25 |
|
T112 |
36 |
|
T113 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T35 |
35 |
|
T112 |
33 |
|
T113 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
27 |
|
T112 |
21 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T35 |
24 |
|
T112 |
35 |
|
T113 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T35 |
35 |
|
T112 |
33 |
|
T113 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
27 |
|
T112 |
21 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T35 |
23 |
|
T112 |
35 |
|
T113 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
25 |
|
T112 |
21 |
|
T113 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T35 |
35 |
|
T112 |
33 |
|
T113 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
27 |
|
T112 |
21 |
|
T113 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T35 |
22 |
|
T112 |
35 |
|
T113 |
40 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63589 |
1 |
|
|
T35 |
1008 |
|
T112 |
1855 |
|
T113 |
1134 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41436 |
1 |
|
|
T35 |
1158 |
|
T112 |
722 |
|
T113 |
662 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54656 |
1 |
|
|
T35 |
955 |
|
T112 |
1580 |
|
T113 |
1206 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49747 |
1 |
|
|
T35 |
2044 |
|
T112 |
946 |
|
T113 |
1939 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T35 |
53 |
|
T112 |
42 |
|
T113 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T35 |
56 |
|
T112 |
37 |
|
T113 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T35 |
51 |
|
T112 |
41 |
|
T113 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T35 |
55 |
|
T112 |
37 |
|
T113 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T35 |
51 |
|
T112 |
39 |
|
T113 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T35 |
53 |
|
T112 |
37 |
|
T113 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T35 |
51 |
|
T112 |
38 |
|
T113 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T35 |
52 |
|
T112 |
37 |
|
T113 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T35 |
49 |
|
T112 |
37 |
|
T113 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T35 |
51 |
|
T112 |
36 |
|
T113 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T35 |
49 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T35 |
49 |
|
T112 |
36 |
|
T113 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T35 |
49 |
|
T112 |
34 |
|
T113 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T35 |
48 |
|
T112 |
35 |
|
T113 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T35 |
49 |
|
T112 |
34 |
|
T113 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T35 |
46 |
|
T112 |
35 |
|
T113 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T35 |
47 |
|
T112 |
34 |
|
T113 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T35 |
43 |
|
T112 |
35 |
|
T113 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T35 |
47 |
|
T112 |
33 |
|
T113 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
18 |
|
T112 |
24 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T35 |
40 |
|
T112 |
35 |
|
T113 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T35 |
39 |
|
T112 |
33 |
|
T113 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T35 |
45 |
|
T112 |
32 |
|
T113 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T35 |
36 |
|
T112 |
33 |
|
T113 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T35 |
44 |
|
T112 |
30 |
|
T113 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T35 |
35 |
|
T112 |
32 |
|
T113 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T35 |
44 |
|
T112 |
30 |
|
T113 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T35 |
35 |
|
T112 |
31 |
|
T113 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T35 |
44 |
|
T112 |
30 |
|
T113 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T35 |
33 |
|
T112 |
30 |
|
T113 |
30 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55442 |
1 |
|
|
T35 |
915 |
|
T112 |
683 |
|
T113 |
967 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49727 |
1 |
|
|
T35 |
1050 |
|
T112 |
1873 |
|
T113 |
662 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52437 |
1 |
|
|
T35 |
1048 |
|
T112 |
780 |
|
T113 |
1023 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50416 |
1 |
|
|
T35 |
2353 |
|
T112 |
1372 |
|
T113 |
2309 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T35 |
51 |
|
T112 |
60 |
|
T113 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1739 |
1 |
|
|
T35 |
49 |
|
T112 |
61 |
|
T113 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T35 |
51 |
|
T112 |
58 |
|
T113 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T35 |
49 |
|
T112 |
61 |
|
T113 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T35 |
49 |
|
T112 |
55 |
|
T113 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T35 |
48 |
|
T112 |
59 |
|
T113 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T35 |
49 |
|
T112 |
54 |
|
T113 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T35 |
48 |
|
T112 |
58 |
|
T113 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T35 |
48 |
|
T112 |
54 |
|
T113 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T35 |
48 |
|
T112 |
56 |
|
T113 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T35 |
48 |
|
T112 |
53 |
|
T113 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T35 |
47 |
|
T112 |
55 |
|
T113 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T35 |
46 |
|
T112 |
53 |
|
T113 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T35 |
45 |
|
T112 |
55 |
|
T113 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T35 |
44 |
|
T112 |
50 |
|
T113 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T35 |
44 |
|
T112 |
54 |
|
T113 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T35 |
43 |
|
T112 |
48 |
|
T113 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T35 |
44 |
|
T112 |
53 |
|
T113 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T35 |
43 |
|
T112 |
47 |
|
T113 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T35 |
44 |
|
T112 |
53 |
|
T113 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T35 |
40 |
|
T112 |
52 |
|
T113 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T35 |
38 |
|
T112 |
52 |
|
T113 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T35 |
40 |
|
T112 |
41 |
|
T113 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T35 |
38 |
|
T112 |
51 |
|
T113 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T35 |
39 |
|
T112 |
41 |
|
T113 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T35 |
36 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T35 |
13 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T35 |
38 |
|
T112 |
40 |
|
T113 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
16 |
|
T112 |
16 |
|
T113 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T35 |
36 |
|
T112 |
47 |
|
T113 |
36 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53838 |
1 |
|
|
T35 |
1161 |
|
T112 |
831 |
|
T113 |
2086 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45225 |
1 |
|
|
T35 |
1925 |
|
T112 |
1001 |
|
T113 |
842 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59562 |
1 |
|
|
T35 |
1621 |
|
T112 |
1354 |
|
T113 |
1014 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49732 |
1 |
|
|
T35 |
839 |
|
T112 |
1869 |
|
T113 |
957 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T35 |
38 |
|
T112 |
45 |
|
T113 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
23 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T35 |
35 |
|
T112 |
46 |
|
T113 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T35 |
36 |
|
T112 |
42 |
|
T113 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
23 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T35 |
33 |
|
T112 |
44 |
|
T113 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T35 |
35 |
|
T112 |
40 |
|
T113 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T35 |
33 |
|
T112 |
44 |
|
T113 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T35 |
35 |
|
T112 |
39 |
|
T113 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T35 |
33 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T35 |
35 |
|
T112 |
39 |
|
T113 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T35 |
33 |
|
T112 |
43 |
|
T113 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T35 |
32 |
|
T112 |
37 |
|
T113 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T35 |
33 |
|
T112 |
42 |
|
T113 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T35 |
32 |
|
T112 |
36 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T35 |
33 |
|
T112 |
41 |
|
T113 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T35 |
32 |
|
T112 |
40 |
|
T113 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T35 |
31 |
|
T112 |
31 |
|
T113 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T35 |
32 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T35 |
29 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
22 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T35 |
30 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T35 |
29 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
22 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T35 |
30 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T35 |
29 |
|
T112 |
30 |
|
T113 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
22 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T35 |
29 |
|
T112 |
39 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T35 |
29 |
|
T112 |
30 |
|
T113 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
22 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T35 |
29 |
|
T112 |
38 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T35 |
27 |
|
T112 |
30 |
|
T113 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T35 |
22 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T35 |
29 |
|
T112 |
37 |
|
T113 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T35 |
26 |
|
T112 |
29 |
|
T113 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T35 |
22 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T35 |
29 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52481 |
1 |
|
|
T35 |
828 |
|
T112 |
1227 |
|
T113 |
1311 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48396 |
1 |
|
|
T35 |
1072 |
|
T112 |
1030 |
|
T113 |
964 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58343 |
1 |
|
|
T35 |
2355 |
|
T112 |
1410 |
|
T113 |
606 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49574 |
1 |
|
|
T35 |
1016 |
|
T112 |
1533 |
|
T113 |
2192 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T35 |
58 |
|
T112 |
45 |
|
T113 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T35 |
53 |
|
T112 |
41 |
|
T113 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T35 |
56 |
|
T112 |
45 |
|
T113 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T35 |
20 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T35 |
53 |
|
T112 |
38 |
|
T113 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T35 |
53 |
|
T112 |
44 |
|
T113 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T35 |
51 |
|
T112 |
36 |
|
T113 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T35 |
50 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T35 |
51 |
|
T112 |
36 |
|
T113 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T35 |
48 |
|
T112 |
42 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T35 |
50 |
|
T112 |
35 |
|
T113 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T35 |
44 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T35 |
48 |
|
T112 |
35 |
|
T113 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
41 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T35 |
47 |
|
T112 |
33 |
|
T113 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T35 |
41 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T35 |
41 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T35 |
46 |
|
T112 |
33 |
|
T113 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T35 |
44 |
|
T112 |
32 |
|
T113 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T35 |
43 |
|
T112 |
30 |
|
T113 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T35 |
43 |
|
T112 |
29 |
|
T113 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T35 |
42 |
|
T112 |
28 |
|
T113 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T35 |
37 |
|
T112 |
36 |
|
T113 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T35 |
40 |
|
T112 |
26 |
|
T113 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
14 |
|
T112 |
14 |
|
T113 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T35 |
37 |
|
T112 |
35 |
|
T113 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T35 |
40 |
|
T112 |
26 |
|
T113 |
31 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58903 |
1 |
|
|
T35 |
1427 |
|
T112 |
1132 |
|
T113 |
1107 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49818 |
1 |
|
|
T35 |
765 |
|
T112 |
868 |
|
T113 |
1974 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55556 |
1 |
|
|
T35 |
1118 |
|
T112 |
1342 |
|
T113 |
1075 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45023 |
1 |
|
|
T35 |
2068 |
|
T112 |
1662 |
|
T113 |
876 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T35 |
41 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T35 |
46 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T35 |
40 |
|
T112 |
44 |
|
T113 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T35 |
46 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T35 |
40 |
|
T112 |
43 |
|
T113 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T35 |
46 |
|
T112 |
41 |
|
T113 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T35 |
40 |
|
T112 |
42 |
|
T113 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T35 |
46 |
|
T112 |
41 |
|
T113 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T35 |
38 |
|
T112 |
42 |
|
T113 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T35 |
44 |
|
T112 |
40 |
|
T113 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T35 |
37 |
|
T112 |
39 |
|
T113 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T35 |
43 |
|
T112 |
40 |
|
T113 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T35 |
36 |
|
T112 |
36 |
|
T113 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T35 |
40 |
|
T112 |
40 |
|
T113 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T35 |
34 |
|
T112 |
35 |
|
T113 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T35 |
40 |
|
T112 |
40 |
|
T113 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T35 |
33 |
|
T112 |
34 |
|
T113 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T35 |
40 |
|
T112 |
40 |
|
T113 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T35 |
33 |
|
T112 |
32 |
|
T113 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
18 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T35 |
39 |
|
T112 |
40 |
|
T113 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T35 |
31 |
|
T112 |
31 |
|
T113 |
24 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
18 |
|
T112 |
22 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T35 |
30 |
|
T112 |
30 |
|
T113 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
18 |
|
T112 |
22 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T35 |
37 |
|
T112 |
36 |
|
T113 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T35 |
30 |
|
T112 |
28 |
|
T113 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
18 |
|
T112 |
22 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T35 |
36 |
|
T112 |
36 |
|
T113 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T35 |
28 |
|
T112 |
28 |
|
T113 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
18 |
|
T112 |
22 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
23 |
|
T112 |
21 |
|
T113 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T35 |
27 |
|
T112 |
28 |
|
T113 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
18 |
|
T112 |
22 |
|
T113 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T35 |
35 |
|
T112 |
35 |
|
T113 |
28 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59562 |
1 |
|
|
T35 |
2226 |
|
T112 |
1251 |
|
T113 |
990 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41544 |
1 |
|
|
T35 |
776 |
|
T112 |
694 |
|
T113 |
499 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61536 |
1 |
|
|
T35 |
1528 |
|
T112 |
2186 |
|
T113 |
2490 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47243 |
1 |
|
|
T35 |
945 |
|
T112 |
940 |
|
T113 |
1150 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T35 |
38 |
|
T112 |
41 |
|
T113 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T35 |
37 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T35 |
37 |
|
T112 |
40 |
|
T113 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T35 |
37 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T35 |
36 |
|
T112 |
40 |
|
T113 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
22 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T35 |
38 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T35 |
35 |
|
T112 |
39 |
|
T113 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T35 |
22 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T35 |
38 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T35 |
35 |
|
T112 |
39 |
|
T113 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
22 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T35 |
37 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T35 |
34 |
|
T112 |
37 |
|
T113 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T35 |
22 |
|
T112 |
23 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T35 |
35 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T35 |
33 |
|
T112 |
34 |
|
T113 |
26 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T35 |
34 |
|
T112 |
38 |
|
T113 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T35 |
31 |
|
T112 |
34 |
|
T113 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T35 |
34 |
|
T112 |
37 |
|
T113 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T35 |
31 |
|
T112 |
34 |
|
T113 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T35 |
33 |
|
T112 |
35 |
|
T113 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T35 |
28 |
|
T112 |
34 |
|
T113 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T35 |
33 |
|
T112 |
35 |
|
T113 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T35 |
28 |
|
T112 |
32 |
|
T113 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T35 |
32 |
|
T112 |
34 |
|
T113 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T35 |
28 |
|
T112 |
29 |
|
T113 |
22 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T35 |
32 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T35 |
27 |
|
T112 |
27 |
|
T113 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T35 |
32 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T35 |
27 |
|
T112 |
25 |
|
T113 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T35 |
31 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T35 |
26 |
|
T112 |
25 |
|
T113 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T35 |
31 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58011 |
1 |
|
|
T35 |
2426 |
|
T112 |
1498 |
|
T113 |
1281 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43267 |
1 |
|
|
T35 |
963 |
|
T112 |
1562 |
|
T113 |
796 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62792 |
1 |
|
|
T35 |
922 |
|
T112 |
1155 |
|
T113 |
876 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45198 |
1 |
|
|
T35 |
1093 |
|
T112 |
888 |
|
T113 |
1942 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T35 |
44 |
|
T112 |
38 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T35 |
43 |
|
T112 |
37 |
|
T113 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T35 |
44 |
|
T112 |
36 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T35 |
43 |
|
T112 |
36 |
|
T113 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T35 |
44 |
|
T112 |
35 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T35 |
42 |
|
T112 |
36 |
|
T113 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T35 |
43 |
|
T112 |
35 |
|
T113 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T35 |
42 |
|
T112 |
36 |
|
T113 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T35 |
41 |
|
T112 |
35 |
|
T113 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T35 |
41 |
|
T112 |
34 |
|
T113 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T35 |
41 |
|
T112 |
35 |
|
T113 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
20 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T35 |
40 |
|
T112 |
34 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T35 |
40 |
|
T112 |
35 |
|
T113 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T35 |
39 |
|
T112 |
34 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T35 |
38 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
37 |
|
T112 |
33 |
|
T113 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T35 |
38 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T35 |
35 |
|
T112 |
33 |
|
T113 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T35 |
37 |
|
T112 |
34 |
|
T113 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T35 |
35 |
|
T112 |
32 |
|
T113 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T35 |
37 |
|
T112 |
34 |
|
T113 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T35 |
34 |
|
T112 |
32 |
|
T113 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T35 |
36 |
|
T112 |
33 |
|
T113 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T35 |
34 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
34 |
|
T112 |
32 |
|
T113 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T35 |
34 |
|
T112 |
30 |
|
T113 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T35 |
34 |
|
T112 |
32 |
|
T113 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T35 |
32 |
|
T112 |
28 |
|
T113 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T35 |
19 |
|
T112 |
22 |
|
T113 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T35 |
33 |
|
T112 |
31 |
|
T113 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T35 |
19 |
|
T112 |
23 |
|
T113 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T35 |
30 |
|
T112 |
27 |
|
T113 |
29 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58391 |
1 |
|
|
T35 |
1366 |
|
T112 |
2103 |
|
T113 |
2220 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45824 |
1 |
|
|
T35 |
1880 |
|
T112 |
1185 |
|
T113 |
885 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60281 |
1 |
|
|
T35 |
1500 |
|
T112 |
765 |
|
T113 |
1096 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44366 |
1 |
|
|
T35 |
848 |
|
T112 |
861 |
|
T113 |
760 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T35 |
35 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T35 |
32 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T35 |
34 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T35 |
31 |
|
T112 |
49 |
|
T113 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T35 |
33 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T35 |
31 |
|
T112 |
48 |
|
T113 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T35 |
33 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T35 |
31 |
|
T112 |
47 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T35 |
32 |
|
T112 |
51 |
|
T113 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T35 |
30 |
|
T112 |
45 |
|
T113 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T35 |
32 |
|
T112 |
51 |
|
T113 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T35 |
30 |
|
T112 |
44 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T35 |
31 |
|
T112 |
49 |
|
T113 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T35 |
28 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T35 |
31 |
|
T112 |
49 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T35 |
28 |
|
T112 |
41 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T35 |
31 |
|
T112 |
49 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T35 |
27 |
|
T112 |
39 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T35 |
30 |
|
T112 |
49 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T35 |
26 |
|
T112 |
39 |
|
T113 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T35 |
30 |
|
T112 |
49 |
|
T113 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T35 |
25 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
30 |
|
T112 |
48 |
|
T113 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T35 |
25 |
|
T112 |
34 |
|
T113 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T35 |
30 |
|
T112 |
48 |
|
T113 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T35 |
25 |
|
T112 |
32 |
|
T113 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T35 |
29 |
|
T112 |
46 |
|
T113 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T35 |
25 |
|
T112 |
31 |
|
T113 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
20 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T35 |
28 |
|
T112 |
46 |
|
T113 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T35 |
23 |
|
T112 |
30 |
|
T113 |
28 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55193 |
1 |
|
|
T35 |
1224 |
|
T112 |
1160 |
|
T113 |
1179 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50837 |
1 |
|
|
T35 |
967 |
|
T112 |
712 |
|
T113 |
1958 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57076 |
1 |
|
|
T35 |
1110 |
|
T112 |
2037 |
|
T113 |
898 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46244 |
1 |
|
|
T35 |
2100 |
|
T112 |
1047 |
|
T113 |
862 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T35 |
49 |
|
T112 |
50 |
|
T113 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T35 |
46 |
|
T112 |
52 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T35 |
48 |
|
T112 |
48 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T35 |
45 |
|
T112 |
50 |
|
T113 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T35 |
45 |
|
T112 |
46 |
|
T113 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T35 |
46 |
|
T112 |
50 |
|
T113 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T35 |
43 |
|
T112 |
45 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T35 |
44 |
|
T112 |
48 |
|
T113 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T35 |
43 |
|
T112 |
44 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T35 |
44 |
|
T112 |
47 |
|
T113 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T35 |
42 |
|
T112 |
41 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
18 |
|
T112 |
18 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T35 |
43 |
|
T112 |
47 |
|
T113 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T35 |
42 |
|
T112 |
40 |
|
T113 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T35 |
42 |
|
T112 |
39 |
|
T113 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T35 |
40 |
|
T112 |
46 |
|
T113 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T35 |
42 |
|
T112 |
39 |
|
T113 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T35 |
39 |
|
T112 |
45 |
|
T113 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T35 |
42 |
|
T112 |
38 |
|
T113 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T35 |
39 |
|
T112 |
45 |
|
T113 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T35 |
39 |
|
T112 |
36 |
|
T113 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T35 |
39 |
|
T112 |
44 |
|
T113 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T35 |
36 |
|
T112 |
33 |
|
T113 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T35 |
37 |
|
T112 |
44 |
|
T113 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T35 |
35 |
|
T112 |
33 |
|
T113 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T35 |
37 |
|
T112 |
42 |
|
T113 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T35 |
33 |
|
T112 |
31 |
|
T113 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T35 |
37 |
|
T112 |
42 |
|
T113 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
15 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T35 |
32 |
|
T112 |
31 |
|
T113 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
18 |
|
T112 |
17 |
|
T113 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T35 |
37 |
|
T112 |
41 |
|
T113 |
26 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63863 |
1 |
|
|
T35 |
1366 |
|
T112 |
1440 |
|
T113 |
1499 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45905 |
1 |
|
|
T35 |
752 |
|
T112 |
1536 |
|
T113 |
830 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57604 |
1 |
|
|
T35 |
1586 |
|
T112 |
1135 |
|
T113 |
1922 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42426 |
1 |
|
|
T35 |
1850 |
|
T112 |
939 |
|
T113 |
866 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T35 |
39 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T35 |
23 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T35 |
34 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T35 |
39 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T35 |
23 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T35 |
32 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T35 |
39 |
|
T112 |
34 |
|
T113 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T35 |
32 |
|
T112 |
39 |
|
T113 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T35 |
38 |
|
T112 |
34 |
|
T113 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T35 |
32 |
|
T112 |
39 |
|
T113 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T35 |
37 |
|
T112 |
33 |
|
T113 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T35 |
32 |
|
T112 |
39 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
37 |
|
T112 |
32 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T35 |
32 |
|
T112 |
38 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T35 |
36 |
|
T112 |
31 |
|
T113 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T35 |
31 |
|
T112 |
38 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T35 |
36 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T35 |
31 |
|
T112 |
38 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T35 |
36 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T35 |
31 |
|
T112 |
38 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T35 |
35 |
|
T112 |
30 |
|
T113 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T35 |
22 |
|
T112 |
22 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T35 |
31 |
|
T112 |
37 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T35 |
32 |
|
T112 |
30 |
|
T113 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T35 |
31 |
|
T112 |
37 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
31 |
|
T112 |
29 |
|
T113 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T35 |
31 |
|
T112 |
32 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T35 |
31 |
|
T112 |
29 |
|
T113 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T35 |
30 |
|
T112 |
32 |
|
T113 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T35 |
29 |
|
T112 |
29 |
|
T113 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T35 |
27 |
|
T112 |
32 |
|
T113 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
17 |
|
T112 |
26 |
|
T113 |
13 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T35 |
29 |
|
T112 |
27 |
|
T113 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T35 |
22 |
|
T112 |
21 |
|
T113 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T35 |
23 |
|
T112 |
31 |
|
T113 |
31 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65206 |
1 |
|
|
T35 |
1219 |
|
T112 |
2740 |
|
T113 |
1052 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45550 |
1 |
|
|
T35 |
817 |
|
T112 |
668 |
|
T113 |
855 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54554 |
1 |
|
|
T35 |
2457 |
|
T112 |
1286 |
|
T113 |
2181 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43386 |
1 |
|
|
T35 |
681 |
|
T112 |
552 |
|
T113 |
825 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T35 |
38 |
|
T112 |
34 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
34 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T35 |
36 |
|
T112 |
30 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T35 |
38 |
|
T112 |
34 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
34 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T35 |
34 |
|
T112 |
29 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T35 |
37 |
|
T112 |
34 |
|
T113 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T35 |
34 |
|
T112 |
29 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T35 |
37 |
|
T112 |
34 |
|
T113 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T35 |
34 |
|
T112 |
28 |
|
T113 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T35 |
35 |
|
T112 |
32 |
|
T113 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T35 |
35 |
|
T112 |
32 |
|
T113 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T35 |
35 |
|
T112 |
31 |
|
T113 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T35 |
35 |
|
T112 |
31 |
|
T113 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T35 |
32 |
|
T112 |
25 |
|
T113 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T35 |
34 |
|
T112 |
30 |
|
T113 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T35 |
32 |
|
T112 |
23 |
|
T113 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T35 |
33 |
|
T112 |
29 |
|
T113 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T35 |
32 |
|
T112 |
23 |
|
T113 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T35 |
32 |
|
T112 |
22 |
|
T113 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T35 |
31 |
|
T112 |
19 |
|
T113 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T35 |
27 |
|
T112 |
18 |
|
T113 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T35 |
26 |
|
T112 |
18 |
|
T113 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T35 |
31 |
|
T112 |
22 |
|
T113 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T35 |
32 |
|
T112 |
27 |
|
T113 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
33 |
|
T112 |
26 |
|
T113 |
19 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T35 |
23 |
|
T112 |
18 |
|
T113 |
28 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55301 |
1 |
|
|
T35 |
1345 |
|
T112 |
1563 |
|
T113 |
1249 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44111 |
1 |
|
|
T35 |
1263 |
|
T112 |
1076 |
|
T113 |
621 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61704 |
1 |
|
|
T35 |
1750 |
|
T112 |
1731 |
|
T113 |
2407 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47559 |
1 |
|
|
T35 |
933 |
|
T112 |
676 |
|
T113 |
579 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T35 |
53 |
|
T112 |
48 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
13 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T35 |
54 |
|
T112 |
46 |
|
T113 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T35 |
52 |
|
T112 |
48 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
13 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T35 |
53 |
|
T112 |
45 |
|
T113 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T35 |
52 |
|
T112 |
47 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
12 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T35 |
54 |
|
T112 |
43 |
|
T113 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T35 |
52 |
|
T112 |
46 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T35 |
12 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T35 |
54 |
|
T112 |
42 |
|
T113 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T35 |
52 |
|
T112 |
45 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
12 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T35 |
54 |
|
T112 |
40 |
|
T113 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T35 |
52 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T35 |
12 |
|
T112 |
19 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T35 |
53 |
|
T112 |
38 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
52 |
|
T112 |
44 |
|
T113 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T35 |
51 |
|
T112 |
39 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T35 |
49 |
|
T112 |
44 |
|
T113 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T35 |
48 |
|
T112 |
37 |
|
T113 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T35 |
49 |
|
T112 |
44 |
|
T113 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T35 |
47 |
|
T112 |
37 |
|
T113 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T35 |
48 |
|
T112 |
44 |
|
T113 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T35 |
46 |
|
T112 |
35 |
|
T113 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T35 |
48 |
|
T112 |
44 |
|
T113 |
31 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T35 |
46 |
|
T112 |
34 |
|
T113 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T35 |
47 |
|
T112 |
44 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T35 |
43 |
|
T112 |
33 |
|
T113 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T35 |
47 |
|
T112 |
43 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T35 |
37 |
|
T112 |
31 |
|
T113 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T35 |
46 |
|
T112 |
40 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T35 |
37 |
|
T112 |
30 |
|
T113 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
13 |
|
T112 |
16 |
|
T113 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T35 |
45 |
|
T112 |
39 |
|
T113 |
29 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
12 |
|
T112 |
18 |
|
T113 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T35 |
36 |
|
T112 |
29 |
|
T113 |
24 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59452 |
1 |
|
|
T35 |
2449 |
|
T112 |
997 |
|
T113 |
859 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41617 |
1 |
|
|
T35 |
888 |
|
T112 |
1208 |
|
T113 |
873 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53891 |
1 |
|
|
T35 |
1329 |
|
T112 |
971 |
|
T113 |
993 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54462 |
1 |
|
|
T35 |
791 |
|
T112 |
1796 |
|
T113 |
2098 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T35 |
40 |
|
T112 |
47 |
|
T113 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T35 |
39 |
|
T112 |
46 |
|
T113 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
20 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T35 |
37 |
|
T112 |
46 |
|
T113 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T35 |
40 |
|
T112 |
46 |
|
T113 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T35 |
36 |
|
T112 |
46 |
|
T113 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T35 |
39 |
|
T112 |
46 |
|
T113 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T35 |
36 |
|
T112 |
45 |
|
T113 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T35 |
39 |
|
T112 |
45 |
|
T113 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
34 |
|
T112 |
44 |
|
T113 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T35 |
39 |
|
T112 |
45 |
|
T113 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T35 |
34 |
|
T112 |
44 |
|
T113 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T35 |
38 |
|
T112 |
44 |
|
T113 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T35 |
34 |
|
T112 |
43 |
|
T113 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T35 |
37 |
|
T112 |
43 |
|
T113 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T35 |
34 |
|
T112 |
43 |
|
T113 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T35 |
37 |
|
T112 |
41 |
|
T113 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T35 |
33 |
|
T112 |
42 |
|
T113 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
19 |
|
T112 |
20 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T35 |
37 |
|
T112 |
39 |
|
T113 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T35 |
32 |
|
T112 |
41 |
|
T113 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T35 |
37 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T35 |
31 |
|
T112 |
38 |
|
T113 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T35 |
30 |
|
T112 |
38 |
|
T113 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T35 |
35 |
|
T112 |
34 |
|
T113 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T35 |
28 |
|
T112 |
38 |
|
T113 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T35 |
33 |
|
T112 |
33 |
|
T113 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
21 |
|
T112 |
18 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T35 |
26 |
|
T112 |
38 |
|
T113 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
19 |
|
T113 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T35 |
33 |
|
T112 |
30 |
|
T113 |
30 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56453 |
1 |
|
|
T35 |
1007 |
|
T112 |
1323 |
|
T113 |
2273 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47286 |
1 |
|
|
T35 |
888 |
|
T112 |
903 |
|
T113 |
973 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58400 |
1 |
|
|
T35 |
1387 |
|
T112 |
1167 |
|
T113 |
927 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47931 |
1 |
|
|
T35 |
2006 |
|
T112 |
1768 |
|
T113 |
697 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T35 |
44 |
|
T112 |
39 |
|
T113 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T35 |
44 |
|
T112 |
35 |
|
T113 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T35 |
44 |
|
T112 |
39 |
|
T113 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T35 |
43 |
|
T112 |
33 |
|
T113 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T35 |
42 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T35 |
42 |
|
T112 |
31 |
|
T113 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T35 |
41 |
|
T112 |
38 |
|
T113 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T35 |
42 |
|
T112 |
30 |
|
T113 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T35 |
40 |
|
T112 |
37 |
|
T113 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T35 |
40 |
|
T112 |
30 |
|
T113 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T35 |
40 |
|
T112 |
36 |
|
T113 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
24 |
|
T112 |
24 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T35 |
40 |
|
T112 |
30 |
|
T113 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T35 |
40 |
|
T112 |
36 |
|
T113 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T35 |
39 |
|
T112 |
31 |
|
T113 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T35 |
39 |
|
T112 |
36 |
|
T113 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T35 |
38 |
|
T112 |
29 |
|
T113 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T35 |
38 |
|
T112 |
36 |
|
T113 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T35 |
35 |
|
T112 |
29 |
|
T113 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T35 |
37 |
|
T112 |
36 |
|
T113 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T35 |
35 |
|
T112 |
29 |
|
T113 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T35 |
36 |
|
T112 |
36 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T35 |
35 |
|
T112 |
28 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T35 |
35 |
|
T112 |
35 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T35 |
35 |
|
T112 |
28 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T35 |
34 |
|
T112 |
35 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T35 |
33 |
|
T112 |
33 |
|
T113 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
19 |
|
T113 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T35 |
23 |
|
T112 |
23 |
|
T113 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T35 |
33 |
|
T112 |
27 |
|
T113 |
28 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57732 |
1 |
|
|
T35 |
2097 |
|
T112 |
1486 |
|
T113 |
2383 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50628 |
1 |
|
|
T35 |
1121 |
|
T112 |
961 |
|
T113 |
827 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52675 |
1 |
|
|
T35 |
1157 |
|
T112 |
1845 |
|
T113 |
948 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48189 |
1 |
|
|
T35 |
1079 |
|
T112 |
878 |
|
T113 |
722 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T35 |
47 |
|
T112 |
39 |
|
T113 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
17 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T35 |
44 |
|
T112 |
41 |
|
T113 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T35 |
45 |
|
T112 |
37 |
|
T113 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T35 |
17 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T35 |
44 |
|
T112 |
40 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T35 |
43 |
|
T112 |
36 |
|
T113 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T35 |
44 |
|
T112 |
38 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T35 |
42 |
|
T112 |
36 |
|
T113 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T35 |
43 |
|
T112 |
37 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T35 |
42 |
|
T112 |
35 |
|
T113 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T35 |
42 |
|
T112 |
36 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T35 |
42 |
|
T112 |
34 |
|
T113 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T35 |
41 |
|
T112 |
36 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T35 |
42 |
|
T112 |
34 |
|
T113 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T35 |
41 |
|
T112 |
32 |
|
T113 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T35 |
42 |
|
T112 |
34 |
|
T113 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T35 |
41 |
|
T112 |
31 |
|
T113 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T35 |
42 |
|
T112 |
34 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T35 |
40 |
|
T112 |
30 |
|
T113 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T35 |
41 |
|
T112 |
34 |
|
T113 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T35 |
16 |
|
T112 |
20 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T35 |
39 |
|
T112 |
29 |
|
T113 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T35 |
40 |
|
T112 |
33 |
|
T113 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
16 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T35 |
39 |
|
T112 |
29 |
|
T113 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
40 |
|
T112 |
32 |
|
T113 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
16 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T35 |
36 |
|
T112 |
29 |
|
T113 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T35 |
40 |
|
T112 |
32 |
|
T113 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
16 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T35 |
36 |
|
T112 |
29 |
|
T113 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T35 |
38 |
|
T112 |
31 |
|
T113 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
16 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T35 |
34 |
|
T112 |
28 |
|
T113 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T35 |
14 |
|
T112 |
21 |
|
T113 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T35 |
35 |
|
T112 |
31 |
|
T113 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T35 |
16 |
|
T112 |
19 |
|
T113 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T35 |
34 |
|
T112 |
28 |
|
T113 |
24 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58702 |
1 |
|
|
T35 |
2132 |
|
T112 |
1825 |
|
T113 |
940 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47412 |
1 |
|
|
T35 |
931 |
|
T112 |
883 |
|
T113 |
680 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55008 |
1 |
|
|
T35 |
1354 |
|
T112 |
1342 |
|
T113 |
1150 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47196 |
1 |
|
|
T35 |
1131 |
|
T112 |
1085 |
|
T113 |
2173 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T35 |
49 |
|
T112 |
44 |
|
T113 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
16 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T35 |
43 |
|
T112 |
47 |
|
T113 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T35 |
49 |
|
T112 |
44 |
|
T113 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T35 |
16 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T35 |
40 |
|
T112 |
45 |
|
T113 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T35 |
49 |
|
T112 |
43 |
|
T113 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T35 |
41 |
|
T112 |
43 |
|
T113 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T35 |
49 |
|
T112 |
42 |
|
T113 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T35 |
41 |
|
T112 |
43 |
|
T113 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T35 |
46 |
|
T112 |
42 |
|
T113 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T35 |
39 |
|
T112 |
43 |
|
T113 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T35 |
46 |
|
T112 |
40 |
|
T113 |
35 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T35 |
39 |
|
T112 |
43 |
|
T113 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T35 |
46 |
|
T112 |
38 |
|
T113 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T35 |
35 |
|
T112 |
43 |
|
T113 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T35 |
44 |
|
T112 |
37 |
|
T113 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T35 |
35 |
|
T112 |
42 |
|
T113 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
43 |
|
T112 |
36 |
|
T113 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T35 |
35 |
|
T112 |
42 |
|
T113 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T35 |
41 |
|
T112 |
35 |
|
T113 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T35 |
34 |
|
T112 |
42 |
|
T113 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T35 |
40 |
|
T112 |
33 |
|
T113 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T35 |
34 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T35 |
39 |
|
T112 |
32 |
|
T113 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T35 |
34 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T35 |
38 |
|
T112 |
30 |
|
T113 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T35 |
33 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T35 |
37 |
|
T112 |
30 |
|
T113 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T35 |
33 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T35 |
10 |
|
T112 |
17 |
|
T113 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T35 |
35 |
|
T112 |
29 |
|
T113 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T35 |
15 |
|
T112 |
14 |
|
T113 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T35 |
33 |
|
T112 |
38 |
|
T113 |
37 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57021 |
1 |
|
|
T35 |
1699 |
|
T112 |
1294 |
|
T113 |
2457 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47869 |
1 |
|
|
T35 |
2027 |
|
T112 |
883 |
|
T113 |
962 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59099 |
1 |
|
|
T35 |
941 |
|
T112 |
1906 |
|
T113 |
1069 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45785 |
1 |
|
|
T35 |
670 |
|
T112 |
1094 |
|
T113 |
751 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T35 |
42 |
|
T112 |
45 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T35 |
41 |
|
T112 |
45 |
|
T113 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T35 |
42 |
|
T112 |
43 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T35 |
41 |
|
T112 |
44 |
|
T113 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T35 |
42 |
|
T112 |
42 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T35 |
39 |
|
T112 |
43 |
|
T113 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T35 |
42 |
|
T112 |
41 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T35 |
37 |
|
T112 |
41 |
|
T113 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T35 |
42 |
|
T112 |
39 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T35 |
36 |
|
T112 |
41 |
|
T113 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T35 |
41 |
|
T112 |
39 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T35 |
24 |
|
T112 |
16 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T35 |
35 |
|
T112 |
40 |
|
T113 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T35 |
40 |
|
T112 |
39 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T35 |
34 |
|
T112 |
39 |
|
T113 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T35 |
38 |
|
T112 |
38 |
|
T113 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T35 |
33 |
|
T112 |
38 |
|
T113 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T35 |
38 |
|
T112 |
38 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T35 |
33 |
|
T112 |
38 |
|
T113 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T35 |
33 |
|
T112 |
37 |
|
T113 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T35 |
31 |
|
T112 |
35 |
|
T113 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T35 |
30 |
|
T112 |
35 |
|
T113 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T35 |
36 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T35 |
29 |
|
T112 |
33 |
|
T113 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T35 |
35 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T35 |
27 |
|
T112 |
32 |
|
T113 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T35 |
34 |
|
T112 |
34 |
|
T113 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T35 |
23 |
|
T112 |
15 |
|
T113 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T35 |
27 |
|
T112 |
32 |
|
T113 |
18 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55876 |
1 |
|
|
T35 |
1516 |
|
T112 |
1847 |
|
T113 |
1181 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47654 |
1 |
|
|
T35 |
821 |
|
T112 |
1223 |
|
T113 |
744 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56947 |
1 |
|
|
T35 |
2185 |
|
T112 |
1004 |
|
T113 |
1997 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48340 |
1 |
|
|
T35 |
1006 |
|
T112 |
849 |
|
T113 |
961 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T35 |
39 |
|
T112 |
52 |
|
T113 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T35 |
43 |
|
T112 |
53 |
|
T113 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T35 |
38 |
|
T112 |
51 |
|
T113 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T35 |
16 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T35 |
42 |
|
T112 |
51 |
|
T113 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T35 |
37 |
|
T112 |
50 |
|
T113 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T35 |
42 |
|
T112 |
49 |
|
T113 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T35 |
37 |
|
T112 |
50 |
|
T113 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T35 |
42 |
|
T112 |
49 |
|
T113 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T35 |
36 |
|
T112 |
49 |
|
T113 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T35 |
42 |
|
T112 |
46 |
|
T113 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T35 |
35 |
|
T112 |
48 |
|
T113 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T35 |
34 |
|
T112 |
48 |
|
T113 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T35 |
41 |
|
T112 |
46 |
|
T113 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T35 |
31 |
|
T112 |
47 |
|
T113 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T35 |
41 |
|
T112 |
44 |
|
T113 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T35 |
30 |
|
T112 |
47 |
|
T113 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T35 |
40 |
|
T112 |
41 |
|
T113 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T35 |
30 |
|
T112 |
46 |
|
T113 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T35 |
15 |
|
T112 |
17 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T35 |
39 |
|
T112 |
39 |
|
T113 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T35 |
29 |
|
T112 |
44 |
|
T113 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
15 |
|
T112 |
16 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T35 |
28 |
|
T112 |
43 |
|
T113 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
15 |
|
T112 |
16 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T35 |
38 |
|
T112 |
38 |
|
T113 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T35 |
27 |
|
T112 |
41 |
|
T113 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
15 |
|
T112 |
16 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T35 |
37 |
|
T112 |
37 |
|
T113 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T35 |
27 |
|
T112 |
41 |
|
T113 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
15 |
|
T112 |
16 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T35 |
37 |
|
T112 |
35 |
|
T113 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T35 |
19 |
|
T112 |
18 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T35 |
26 |
|
T112 |
39 |
|
T113 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T35 |
15 |
|
T112 |
16 |
|
T113 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T35 |
37 |
|
T112 |
34 |
|
T113 |
30 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54233 |
1 |
|
|
T35 |
1076 |
|
T112 |
1356 |
|
T113 |
1349 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47424 |
1 |
|
|
T35 |
851 |
|
T112 |
1498 |
|
T113 |
709 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56375 |
1 |
|
|
T35 |
1640 |
|
T112 |
1205 |
|
T113 |
2093 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50904 |
1 |
|
|
T35 |
2013 |
|
T112 |
1198 |
|
T113 |
806 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T35 |
42 |
|
T112 |
44 |
|
T113 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
19 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T35 |
39 |
|
T112 |
42 |
|
T113 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T35 |
41 |
|
T112 |
43 |
|
T113 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T35 |
19 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T35 |
39 |
|
T112 |
42 |
|
T113 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T35 |
41 |
|
T112 |
41 |
|
T113 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T35 |
39 |
|
T112 |
42 |
|
T113 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T35 |
40 |
|
T112 |
40 |
|
T113 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T35 |
38 |
|
T112 |
42 |
|
T113 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T35 |
37 |
|
T112 |
41 |
|
T113 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T35 |
39 |
|
T112 |
38 |
|
T113 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T35 |
36 |
|
T112 |
41 |
|
T113 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T35 |
38 |
|
T112 |
37 |
|
T113 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T35 |
35 |
|
T112 |
41 |
|
T113 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T35 |
36 |
|
T112 |
37 |
|
T113 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T35 |
35 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T35 |
33 |
|
T112 |
34 |
|
T113 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T35 |
34 |
|
T112 |
40 |
|
T113 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T35 |
33 |
|
T112 |
34 |
|
T113 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T35 |
33 |
|
T112 |
39 |
|
T113 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T35 |
33 |
|
T112 |
33 |
|
T113 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T35 |
33 |
|
T112 |
38 |
|
T113 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T35 |
31 |
|
T112 |
33 |
|
T113 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T35 |
31 |
|
T112 |
38 |
|
T113 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T35 |
31 |
|
T112 |
31 |
|
T113 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T35 |
30 |
|
T112 |
38 |
|
T113 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T35 |
29 |
|
T112 |
29 |
|
T113 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T35 |
28 |
|
T112 |
37 |
|
T113 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T35 |
15 |
|
T112 |
12 |
|
T113 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T35 |
28 |
|
T112 |
28 |
|
T113 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T35 |
18 |
|
T112 |
14 |
|
T113 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T35 |
27 |
|
T112 |
37 |
|
T113 |
32 |