cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53308 |
1 |
|
|
T34 |
1642 |
|
T17 |
255 |
|
T102 |
1291 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53855 |
1 |
|
|
T34 |
485 |
|
T17 |
1078 |
|
T102 |
2523 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50364 |
1 |
|
|
T34 |
879 |
|
T17 |
147 |
|
T102 |
1455 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46856 |
1 |
|
|
T34 |
505 |
|
T17 |
51 |
|
T102 |
1493 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T34 |
27 |
|
T17 |
8 |
|
T102 |
68 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T34 |
30 |
|
T17 |
7 |
|
T102 |
68 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
67 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
68 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
62 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
66 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
62 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
66 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T34 |
25 |
|
T17 |
8 |
|
T102 |
58 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
64 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T34 |
24 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
64 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T34 |
26 |
|
T17 |
4 |
|
T102 |
64 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T34 |
26 |
|
T17 |
4 |
|
T102 |
63 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T34 |
26 |
|
T17 |
4 |
|
T102 |
63 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
63 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
63 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
62 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
48 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
61 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
60 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
59 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52188 |
1 |
|
|
T34 |
674 |
|
T17 |
37 |
|
T102 |
1191 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45789 |
1 |
|
|
T34 |
1487 |
|
T17 |
259 |
|
T102 |
1237 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59747 |
1 |
|
|
T34 |
913 |
|
T17 |
935 |
|
T102 |
1690 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47665 |
1 |
|
|
T34 |
457 |
|
T17 |
223 |
|
T102 |
2607 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T34 |
23 |
|
T17 |
10 |
|
T102 |
69 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T34 |
25 |
|
T17 |
10 |
|
T102 |
69 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T34 |
22 |
|
T17 |
9 |
|
T102 |
68 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T34 |
24 |
|
T17 |
10 |
|
T102 |
67 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T34 |
22 |
|
T17 |
9 |
|
T102 |
67 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T34 |
24 |
|
T17 |
10 |
|
T102 |
64 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T34 |
22 |
|
T17 |
9 |
|
T102 |
66 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T34 |
24 |
|
T17 |
9 |
|
T102 |
63 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
65 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T34 |
24 |
|
T17 |
9 |
|
T102 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T34 |
24 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T34 |
20 |
|
T17 |
9 |
|
T102 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T34 |
20 |
|
T17 |
9 |
|
T102 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T34 |
19 |
|
T17 |
9 |
|
T102 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T34 |
22 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T34 |
22 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T34 |
22 |
|
T17 |
8 |
|
T102 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T34 |
17 |
|
T17 |
9 |
|
T102 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T34 |
22 |
|
T17 |
8 |
|
T102 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T34 |
16 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T34 |
20 |
|
T17 |
8 |
|
T102 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58754 |
1 |
|
|
T34 |
828 |
|
T17 |
149 |
|
T102 |
2632 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41709 |
1 |
|
|
T34 |
368 |
|
T17 |
156 |
|
T102 |
1487 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56274 |
1 |
|
|
T34 |
1018 |
|
T17 |
1052 |
|
T102 |
1564 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48768 |
1 |
|
|
T34 |
1472 |
|
T17 |
151 |
|
T102 |
1052 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T34 |
16 |
|
T17 |
8 |
|
T102 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T34 |
16 |
|
T17 |
8 |
|
T102 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T34 |
16 |
|
T17 |
8 |
|
T102 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
35 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52581 |
1 |
|
|
T34 |
698 |
|
T17 |
124 |
|
T102 |
2995 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47613 |
1 |
|
|
T34 |
1523 |
|
T17 |
73 |
|
T102 |
1225 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60395 |
1 |
|
|
T34 |
967 |
|
T17 |
1211 |
|
T102 |
1934 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45852 |
1 |
|
|
T34 |
358 |
|
T17 |
116 |
|
T102 |
796 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
13 |
|
T17 |
3 |
|
T102 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50887 |
1 |
|
|
T34 |
757 |
|
T17 |
126 |
|
T102 |
977 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51060 |
1 |
|
|
T34 |
668 |
|
T17 |
226 |
|
T102 |
2777 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59965 |
1 |
|
|
T34 |
637 |
|
T17 |
1062 |
|
T102 |
1378 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43664 |
1 |
|
|
T34 |
1557 |
|
T17 |
104 |
|
T102 |
1547 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
79 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
74 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
75 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
71 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
75 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
70 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
74 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
67 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
70 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T34 |
24 |
|
T17 |
8 |
|
T102 |
67 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
70 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T34 |
22 |
|
T17 |
8 |
|
T102 |
63 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
69 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
61 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
68 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
67 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
64 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
64 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
61 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T34 |
18 |
|
T17 |
7 |
|
T102 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T34 |
18 |
|
T17 |
7 |
|
T102 |
60 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
10 |
|
T17 |
2 |
|
T102 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58203 |
1 |
|
|
T34 |
499 |
|
T17 |
1263 |
|
T102 |
1723 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44592 |
1 |
|
|
T34 |
656 |
|
T17 |
69 |
|
T102 |
2458 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59659 |
1 |
|
|
T34 |
1836 |
|
T17 |
135 |
|
T102 |
1509 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44119 |
1 |
|
|
T34 |
453 |
|
T17 |
84 |
|
T102 |
1102 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
32 |
|
T17 |
5 |
|
T102 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T34 |
31 |
|
T17 |
7 |
|
T102 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T34 |
31 |
|
T17 |
5 |
|
T102 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T34 |
29 |
|
T17 |
6 |
|
T102 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T34 |
28 |
|
T17 |
6 |
|
T102 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T34 |
26 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T34 |
26 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T34 |
26 |
|
T17 |
6 |
|
T102 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T34 |
29 |
|
T17 |
3 |
|
T102 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T34 |
29 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T34 |
28 |
|
T17 |
3 |
|
T102 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
34 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55895 |
1 |
|
|
T34 |
1838 |
|
T17 |
137 |
|
T102 |
1839 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49920 |
1 |
|
|
T34 |
460 |
|
T17 |
82 |
|
T102 |
2221 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50481 |
1 |
|
|
T34 |
851 |
|
T17 |
1239 |
|
T102 |
1732 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49831 |
1 |
|
|
T34 |
470 |
|
T17 |
83 |
|
T102 |
1137 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T34 |
17 |
|
T17 |
2 |
|
T102 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53286 |
1 |
|
|
T34 |
722 |
|
T17 |
257 |
|
T102 |
1436 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48542 |
1 |
|
|
T34 |
1592 |
|
T17 |
51 |
|
T102 |
1184 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61519 |
1 |
|
|
T34 |
900 |
|
T17 |
306 |
|
T102 |
2836 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44260 |
1 |
|
|
T34 |
418 |
|
T17 |
972 |
|
T102 |
1343 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T34 |
24 |
|
T17 |
2 |
|
T102 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T34 |
24 |
|
T17 |
2 |
|
T102 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T34 |
23 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T34 |
23 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T34 |
23 |
|
T17 |
2 |
|
T102 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T34 |
23 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T34 |
23 |
|
T17 |
2 |
|
T102 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T34 |
21 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T34 |
21 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T34 |
21 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T34 |
15 |
|
T17 |
2 |
|
T102 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T34 |
21 |
|
T17 |
2 |
|
T102 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T34 |
14 |
|
T17 |
2 |
|
T102 |
47 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56210 |
1 |
|
|
T34 |
1002 |
|
T17 |
322 |
|
T102 |
1903 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43612 |
1 |
|
|
T34 |
620 |
|
T17 |
144 |
|
T102 |
1451 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60523 |
1 |
|
|
T34 |
614 |
|
T17 |
131 |
|
T102 |
2801 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46804 |
1 |
|
|
T34 |
1464 |
|
T17 |
936 |
|
T102 |
819 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T34 |
27 |
|
T17 |
6 |
|
T102 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T34 |
27 |
|
T17 |
6 |
|
T102 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
8 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
31 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54684 |
1 |
|
|
T34 |
654 |
|
T17 |
206 |
|
T102 |
1846 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41953 |
1 |
|
|
T34 |
764 |
|
T17 |
89 |
|
T102 |
1197 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59524 |
1 |
|
|
T34 |
1736 |
|
T17 |
1045 |
|
T102 |
2018 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49242 |
1 |
|
|
T34 |
328 |
|
T17 |
182 |
|
T102 |
1991 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
58 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T34 |
28 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T34 |
27 |
|
T17 |
6 |
|
T102 |
55 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T34 |
26 |
|
T17 |
6 |
|
T102 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T34 |
26 |
|
T17 |
6 |
|
T102 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T34 |
27 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T34 |
17 |
|
T17 |
6 |
|
T102 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T34 |
27 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
33 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56198 |
1 |
|
|
T34 |
707 |
|
T17 |
1077 |
|
T102 |
1698 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41193 |
1 |
|
|
T34 |
456 |
|
T17 |
73 |
|
T102 |
1093 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63209 |
1 |
|
|
T34 |
871 |
|
T17 |
143 |
|
T102 |
3024 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46190 |
1 |
|
|
T34 |
1518 |
|
T17 |
203 |
|
T102 |
1024 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T34 |
27 |
|
T17 |
8 |
|
T102 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T34 |
27 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T34 |
25 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T34 |
25 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T34 |
24 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T34 |
23 |
|
T17 |
3 |
|
T102 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T34 |
22 |
|
T17 |
1 |
|
T102 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T34 |
22 |
|
T102 |
47 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T34 |
21 |
|
T102 |
46 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T34 |
21 |
|
T102 |
46 |
|
T103 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T34 |
21 |
|
T102 |
44 |
|
T103 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T34 |
21 |
|
T102 |
43 |
|
T103 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T34 |
20 |
|
T102 |
43 |
|
T103 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T34 |
20 |
|
T102 |
42 |
|
T103 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
39 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55742 |
1 |
|
|
T34 |
1110 |
|
T17 |
1080 |
|
T102 |
1326 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46158 |
1 |
|
|
T34 |
1516 |
|
T17 |
110 |
|
T102 |
1546 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55836 |
1 |
|
|
T34 |
569 |
|
T17 |
168 |
|
T102 |
2296 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46966 |
1 |
|
|
T34 |
441 |
|
T17 |
89 |
|
T102 |
1378 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
76 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
79 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
73 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
79 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
71 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
77 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
71 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
75 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
71 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
71 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
68 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
11 |
|
T17 |
6 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
70 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
66 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
69 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
64 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
67 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
66 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
63 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
65 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
61 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
61 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
60 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
59 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
58 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
54 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59618 |
1 |
|
|
T34 |
1818 |
|
T17 |
195 |
|
T102 |
2050 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48458 |
1 |
|
|
T34 |
524 |
|
T17 |
234 |
|
T102 |
2021 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53907 |
1 |
|
|
T34 |
823 |
|
T17 |
923 |
|
T102 |
1763 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43527 |
1 |
|
|
T34 |
451 |
|
T17 |
79 |
|
T102 |
1019 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T34 |
24 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T34 |
22 |
|
T17 |
9 |
|
T102 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T34 |
18 |
|
T17 |
7 |
|
T102 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T34 |
15 |
|
T17 |
6 |
|
T102 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T34 |
13 |
|
T17 |
5 |
|
T102 |
38 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53484 |
1 |
|
|
T34 |
647 |
|
T17 |
316 |
|
T102 |
1462 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46196 |
1 |
|
|
T34 |
669 |
|
T17 |
134 |
|
T102 |
1299 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55774 |
1 |
|
|
T34 |
813 |
|
T17 |
995 |
|
T102 |
2684 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50606 |
1 |
|
|
T34 |
1463 |
|
T17 |
106 |
|
T102 |
1459 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
61 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
61 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T34 |
12 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T34 |
11 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T34 |
11 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T34 |
11 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54296 |
1 |
|
|
T34 |
450 |
|
T17 |
152 |
|
T102 |
1727 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50125 |
1 |
|
|
T34 |
857 |
|
T17 |
77 |
|
T102 |
2091 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56949 |
1 |
|
|
T34 |
856 |
|
T17 |
1166 |
|
T102 |
1908 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45513 |
1 |
|
|
T34 |
1388 |
|
T17 |
131 |
|
T102 |
1316 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T34 |
36 |
|
T17 |
8 |
|
T102 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T34 |
36 |
|
T17 |
8 |
|
T102 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T34 |
35 |
|
T17 |
8 |
|
T102 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T34 |
35 |
|
T17 |
8 |
|
T102 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T34 |
35 |
|
T17 |
8 |
|
T102 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T34 |
35 |
|
T17 |
8 |
|
T102 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T34 |
34 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T34 |
34 |
|
T17 |
6 |
|
T102 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T34 |
34 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
5 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
4 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
4 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
4 |
|
T17 |
1 |
|
T102 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T34 |
34 |
|
T17 |
4 |
|
T102 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
11 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64051 |
1 |
|
|
T34 |
1792 |
|
T17 |
1074 |
|
T102 |
2748 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42512 |
1 |
|
|
T34 |
529 |
|
T17 |
102 |
|
T102 |
1012 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53765 |
1 |
|
|
T34 |
624 |
|
T17 |
263 |
|
T102 |
1818 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45803 |
1 |
|
|
T34 |
542 |
|
T17 |
92 |
|
T102 |
1281 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T34 |
29 |
|
T17 |
2 |
|
T102 |
61 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T34 |
27 |
|
T17 |
1 |
|
T102 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T34 |
17 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T34 |
26 |
|
T17 |
1 |
|
T102 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T34 |
26 |
|
T17 |
1 |
|
T102 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T34 |
24 |
|
T102 |
51 |
|
T103 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T34 |
24 |
|
T102 |
51 |
|
T103 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T34 |
24 |
|
T102 |
50 |
|
T103 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T34 |
24 |
|
T102 |
49 |
|
T103 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T34 |
23 |
|
T102 |
48 |
|
T103 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T34 |
11 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T34 |
22 |
|
T102 |
48 |
|
T103 |
7 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57180 |
1 |
|
|
T34 |
974 |
|
T17 |
42 |
|
T102 |
2978 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45499 |
1 |
|
|
T34 |
567 |
|
T17 |
169 |
|
T102 |
1386 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55031 |
1 |
|
|
T34 |
469 |
|
T17 |
74 |
|
T102 |
1411 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48721 |
1 |
|
|
T34 |
1569 |
|
T17 |
1123 |
|
T102 |
1311 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T34 |
25 |
|
T17 |
12 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T34 |
30 |
|
T17 |
11 |
|
T102 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T34 |
24 |
|
T17 |
12 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T34 |
30 |
|
T17 |
11 |
|
T102 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T34 |
24 |
|
T17 |
12 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T34 |
30 |
|
T17 |
11 |
|
T102 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T34 |
24 |
|
T17 |
11 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T34 |
30 |
|
T17 |
11 |
|
T102 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T34 |
24 |
|
T17 |
10 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T34 |
29 |
|
T17 |
11 |
|
T102 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T34 |
23 |
|
T17 |
10 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T34 |
28 |
|
T17 |
10 |
|
T102 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T34 |
23 |
|
T17 |
10 |
|
T102 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T34 |
27 |
|
T17 |
10 |
|
T102 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T34 |
23 |
|
T17 |
10 |
|
T102 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T34 |
27 |
|
T17 |
10 |
|
T102 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T34 |
26 |
|
T17 |
10 |
|
T102 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T34 |
26 |
|
T17 |
9 |
|
T102 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T34 |
20 |
|
T17 |
9 |
|
T102 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T34 |
26 |
|
T17 |
9 |
|
T102 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T34 |
20 |
|
T17 |
9 |
|
T102 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T34 |
20 |
|
T17 |
9 |
|
T102 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T34 |
19 |
|
T17 |
9 |
|
T102 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T34 |
18 |
|
T17 |
9 |
|
T102 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56539 |
1 |
|
|
T34 |
789 |
|
T17 |
287 |
|
T102 |
1873 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45919 |
1 |
|
|
T34 |
587 |
|
T17 |
127 |
|
T102 |
2135 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57905 |
1 |
|
|
T34 |
2059 |
|
T17 |
187 |
|
T102 |
1501 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45579 |
1 |
|
|
T34 |
278 |
|
T17 |
927 |
|
T102 |
1405 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T34 |
16 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T34 |
12 |
|
T17 |
5 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T34 |
14 |
|
T17 |
3 |
|
T102 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T34 |
14 |
|
T17 |
4 |
|
T102 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T34 |
15 |
|
T17 |
3 |
|
T102 |
45 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54034 |
1 |
|
|
T34 |
610 |
|
T17 |
1239 |
|
T102 |
1300 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42653 |
1 |
|
|
T34 |
672 |
|
T17 |
38 |
|
T102 |
1301 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58248 |
1 |
|
|
T34 |
611 |
|
T17 |
204 |
|
T102 |
1768 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51908 |
1 |
|
|
T34 |
1609 |
|
T17 |
96 |
|
T102 |
2452 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T34 |
33 |
|
T17 |
1 |
|
T102 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T34 |
31 |
|
T17 |
1 |
|
T102 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T34 |
29 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T34 |
31 |
|
T17 |
1 |
|
T102 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T34 |
31 |
|
T17 |
1 |
|
T102 |
63 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T34 |
30 |
|
T17 |
1 |
|
T102 |
60 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T34 |
30 |
|
T17 |
1 |
|
T102 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T34 |
30 |
|
T17 |
1 |
|
T102 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T34 |
26 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T34 |
30 |
|
T17 |
1 |
|
T102 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T34 |
30 |
|
T17 |
1 |
|
T102 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T34 |
29 |
|
T17 |
1 |
|
T102 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T34 |
29 |
|
T17 |
1 |
|
T102 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
8 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T34 |
29 |
|
T17 |
1 |
|
T102 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T34 |
29 |
|
T17 |
1 |
|
T102 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T34 |
29 |
|
T17 |
1 |
|
T102 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
6 |
|
T102 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T34 |
28 |
|
T17 |
1 |
|
T102 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T34 |
20 |
|
T17 |
3 |
|
T102 |
39 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55916 |
1 |
|
|
T34 |
1626 |
|
T17 |
284 |
|
T102 |
3186 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42715 |
1 |
|
|
T34 |
659 |
|
T17 |
200 |
|
T102 |
1090 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57451 |
1 |
|
|
T34 |
530 |
|
T17 |
206 |
|
T102 |
1513 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49697 |
1 |
|
|
T34 |
670 |
|
T17 |
876 |
|
T102 |
1181 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T34 |
33 |
|
T17 |
3 |
|
T102 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T34 |
35 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T34 |
33 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T34 |
33 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T34 |
31 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T34 |
33 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T34 |
31 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
31 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T34 |
31 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T34 |
7 |
|
T17 |
4 |
|
T102 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T34 |
30 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T34 |
28 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T34 |
30 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
10 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T34 |
28 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T34 |
29 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T34 |
29 |
|
T17 |
3 |
|
T102 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T34 |
29 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T34 |
28 |
|
T17 |
3 |
|
T102 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T34 |
27 |
|
T17 |
2 |
|
T102 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
28 |
|
T17 |
3 |
|
T102 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T34 |
26 |
|
T17 |
2 |
|
T102 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T34 |
27 |
|
T17 |
3 |
|
T102 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T34 |
26 |
|
T17 |
2 |
|
T102 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T34 |
26 |
|
T17 |
2 |
|
T102 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T34 |
26 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T34 |
26 |
|
T17 |
2 |
|
T102 |
42 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55156 |
1 |
|
|
T34 |
589 |
|
T17 |
265 |
|
T102 |
1402 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45387 |
1 |
|
|
T34 |
633 |
|
T17 |
1034 |
|
T102 |
1462 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55452 |
1 |
|
|
T34 |
1621 |
|
T17 |
135 |
|
T102 |
1433 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50744 |
1 |
|
|
T34 |
706 |
|
T17 |
129 |
|
T102 |
2484 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
65 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
61 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
64 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
63 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
60 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T34 |
26 |
|
T17 |
3 |
|
T102 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T34 |
26 |
|
T17 |
3 |
|
T102 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
9 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T34 |
25 |
|
T17 |
3 |
|
T102 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T34 |
24 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
23 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T34 |
23 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60125 |
1 |
|
|
T34 |
809 |
|
T17 |
1093 |
|
T102 |
2232 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48261 |
1 |
|
|
T34 |
366 |
|
T17 |
115 |
|
T102 |
2230 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54256 |
1 |
|
|
T34 |
1882 |
|
T17 |
27 |
|
T102 |
1193 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44577 |
1 |
|
|
T34 |
552 |
|
T17 |
279 |
|
T102 |
1341 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
61 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
59 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
60 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T34 |
23 |
|
T17 |
8 |
|
T102 |
58 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T34 |
22 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T34 |
21 |
|
T17 |
6 |
|
T102 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
51 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T34 |
10 |
|
T17 |
4 |
|
T102 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T34 |
13 |
|
T17 |
1 |
|
T102 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
46 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60896 |
1 |
|
|
T34 |
393 |
|
T17 |
93 |
|
T102 |
2029 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47599 |
1 |
|
|
T34 |
1888 |
|
T17 |
1068 |
|
T102 |
1989 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54317 |
1 |
|
|
T34 |
632 |
|
T17 |
239 |
|
T102 |
1870 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43306 |
1 |
|
|
T34 |
698 |
|
T17 |
134 |
|
T102 |
1121 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T34 |
32 |
|
T17 |
5 |
|
T102 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T34 |
30 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T34 |
30 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T34 |
29 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T34 |
28 |
|
T17 |
5 |
|
T102 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T34 |
6 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T34 |
28 |
|
T17 |
4 |
|
T102 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T34 |
25 |
|
T17 |
4 |
|
T102 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T34 |
26 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T34 |
25 |
|
T17 |
5 |
|
T102 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T34 |
5 |
|
T17 |
4 |
|
T102 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T34 |
7 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
38 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58107 |
1 |
|
|
T34 |
626 |
|
T17 |
143 |
|
T102 |
1270 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42062 |
1 |
|
|
T34 |
746 |
|
T17 |
174 |
|
T102 |
1375 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64120 |
1 |
|
|
T34 |
1846 |
|
T17 |
928 |
|
T102 |
1762 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43485 |
1 |
|
|
T34 |
478 |
|
T17 |
208 |
|
T102 |
2235 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T34 |
25 |
|
T17 |
10 |
|
T102 |
66 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
66 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
65 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
66 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
64 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T34 |
21 |
|
T17 |
10 |
|
T102 |
65 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
64 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T34 |
19 |
|
T17 |
10 |
|
T102 |
64 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
63 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
17 |
|
T17 |
10 |
|
T102 |
59 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
60 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T34 |
16 |
|
T17 |
10 |
|
T102 |
58 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
58 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T34 |
16 |
|
T17 |
10 |
|
T102 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T34 |
10 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
58 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T34 |
15 |
|
T17 |
10 |
|
T102 |
55 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T34 |
22 |
|
T17 |
10 |
|
T102 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T34 |
14 |
|
T17 |
10 |
|
T102 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
57 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T34 |
14 |
|
T17 |
10 |
|
T102 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T34 |
13 |
|
T17 |
10 |
|
T102 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
56 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T34 |
13 |
|
T17 |
10 |
|
T102 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
55 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T34 |
13 |
|
T17 |
9 |
|
T102 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T34 |
13 |
|
T17 |
8 |
|
T102 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T34 |
13 |
|
T17 |
2 |
|
T102 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1158 |
1 |
|
|
T34 |
13 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63304 |
1 |
|
|
T34 |
1801 |
|
T17 |
37 |
|
T102 |
2734 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48319 |
1 |
|
|
T34 |
659 |
|
T17 |
1082 |
|
T102 |
1261 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55479 |
1 |
|
|
T34 |
967 |
|
T17 |
135 |
|
T102 |
1942 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39655 |
1 |
|
|
T34 |
366 |
|
T17 |
248 |
|
T102 |
965 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T34 |
21 |
|
T17 |
8 |
|
T102 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T34 |
21 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
12 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T34 |
19 |
|
T17 |
7 |
|
T102 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T34 |
14 |
|
T17 |
7 |
|
T102 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T34 |
9 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
34 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T34 |
13 |
|
T17 |
7 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T34 |
12 |
|
T17 |
2 |
|
T102 |
33 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T34 |
12 |
|
T17 |
7 |
|
T102 |
32 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59536 |
1 |
|
|
T34 |
644 |
|
T17 |
232 |
|
T102 |
3048 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45102 |
1 |
|
|
T34 |
1523 |
|
T17 |
1018 |
|
T102 |
1286 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53847 |
1 |
|
|
T34 |
843 |
|
T17 |
161 |
|
T102 |
1544 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47360 |
1 |
|
|
T34 |
615 |
|
T17 |
161 |
|
T102 |
1007 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T34 |
11 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T34 |
22 |
|
T17 |
3 |
|
T102 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T34 |
21 |
|
T17 |
3 |
|
T102 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
10 |
|
T17 |
3 |
|
T102 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T34 |
11 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62662 |
1 |
|
|
T34 |
891 |
|
T17 |
195 |
|
T102 |
2805 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46934 |
1 |
|
|
T34 |
1514 |
|
T17 |
151 |
|
T102 |
910 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52876 |
1 |
|
|
T34 |
709 |
|
T17 |
175 |
|
T102 |
2245 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45078 |
1 |
|
|
T34 |
473 |
|
T17 |
1018 |
|
T102 |
1200 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T34 |
18 |
|
T17 |
5 |
|
T102 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T34 |
17 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T34 |
13 |
|
T17 |
4 |
|
T102 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
29 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54560 |
1 |
|
|
T34 |
1841 |
|
T17 |
226 |
|
T102 |
1546 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43993 |
1 |
|
|
T34 |
535 |
|
T17 |
90 |
|
T102 |
1485 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62430 |
1 |
|
|
T34 |
749 |
|
T17 |
1076 |
|
T102 |
1622 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44809 |
1 |
|
|
T34 |
331 |
|
T17 |
43 |
|
T102 |
2184 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T34 |
27 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T34 |
27 |
|
T17 |
4 |
|
T102 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T34 |
24 |
|
T17 |
4 |
|
T102 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T34 |
23 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
56 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T34 |
22 |
|
T17 |
4 |
|
T102 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T34 |
20 |
|
T17 |
4 |
|
T102 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T34 |
19 |
|
T17 |
3 |
|
T102 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T34 |
19 |
|
T17 |
2 |
|
T102 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T34 |
18 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T34 |
18 |
|
T17 |
2 |
|
T102 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T34 |
15 |
|
T17 |
8 |
|
T102 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
42 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57462 |
1 |
|
|
T34 |
1631 |
|
T17 |
31 |
|
T102 |
1234 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43976 |
1 |
|
|
T34 |
665 |
|
T17 |
92 |
|
T102 |
1087 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62127 |
1 |
|
|
T34 |
748 |
|
T17 |
1116 |
|
T102 |
2275 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43345 |
1 |
|
|
T34 |
575 |
|
T17 |
287 |
|
T102 |
2213 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T34 |
27 |
|
T17 |
8 |
|
T102 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T34 |
27 |
|
T17 |
8 |
|
T102 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T34 |
26 |
|
T17 |
8 |
|
T102 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
25 |
|
T17 |
8 |
|
T102 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T34 |
27 |
|
T17 |
7 |
|
T102 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T34 |
25 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T34 |
25 |
|
T17 |
6 |
|
T102 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T34 |
24 |
|
T17 |
6 |
|
T102 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T34 |
9 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T34 |
23 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T34 |
24 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T34 |
26 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T34 |
24 |
|
T17 |
7 |
|
T102 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
38 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T34 |
8 |
|
T17 |
1 |
|
T102 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T34 |
21 |
|
T17 |
4 |
|
T102 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
44 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54587 |
1 |
|
|
T34 |
797 |
|
T17 |
294 |
|
T102 |
1667 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44061 |
1 |
|
|
T34 |
387 |
|
T17 |
42 |
|
T102 |
1181 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61173 |
1 |
|
|
T34 |
2134 |
|
T17 |
149 |
|
T102 |
1615 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47076 |
1 |
|
|
T34 |
309 |
|
T17 |
1014 |
|
T102 |
2313 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
64 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T34 |
18 |
|
T17 |
3 |
|
T102 |
63 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
65 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
63 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T34 |
20 |
|
T17 |
6 |
|
T102 |
64 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
62 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T34 |
16 |
|
T17 |
3 |
|
T102 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
58 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
22 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T34 |
17 |
|
T17 |
6 |
|
T102 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T34 |
15 |
|
T17 |
5 |
|
T102 |
50 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T34 |
14 |
|
T17 |
1 |
|
T102 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T34 |
15 |
|
T17 |
4 |
|
T102 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T34 |
14 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60447 |
1 |
|
|
T34 |
1152 |
|
T17 |
1025 |
|
T102 |
1721 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45656 |
1 |
|
|
T34 |
384 |
|
T17 |
296 |
|
T102 |
990 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61693 |
1 |
|
|
T34 |
720 |
|
T17 |
23 |
|
T102 |
2172 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39198 |
1 |
|
|
T34 |
1334 |
|
T17 |
157 |
|
T102 |
2122 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T34 |
20 |
|
T17 |
8 |
|
T102 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T34 |
20 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T34 |
21 |
|
T17 |
9 |
|
T102 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T34 |
20 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T34 |
20 |
|
T17 |
8 |
|
T102 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T34 |
19 |
|
T17 |
8 |
|
T102 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T34 |
18 |
|
T17 |
8 |
|
T102 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T34 |
16 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T34 |
19 |
|
T17 |
6 |
|
T102 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T34 |
18 |
|
T17 |
6 |
|
T102 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T34 |
17 |
|
T17 |
8 |
|
T102 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T34 |
17 |
|
T17 |
6 |
|
T102 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T34 |
17 |
|
T17 |
6 |
|
T102 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T34 |
16 |
|
T17 |
7 |
|
T102 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T34 |
15 |
|
T17 |
6 |
|
T102 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T34 |
15 |
|
T17 |
7 |
|
T102 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T34 |
14 |
|
T17 |
6 |
|
T102 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T34 |
15 |
|
T17 |
6 |
|
T102 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T34 |
13 |
|
T17 |
6 |
|
T102 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T34 |
17 |
|
T17 |
3 |
|
T102 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T34 |
15 |
|
T17 |
6 |
|
T102 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T34 |
16 |
|
T17 |
1 |
|
T102 |
28 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T34 |
12 |
|
T17 |
6 |
|
T102 |
33 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57246 |
1 |
|
|
T34 |
1885 |
|
T17 |
1122 |
|
T102 |
2397 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41210 |
1 |
|
|
T34 |
654 |
|
T17 |
105 |
|
T102 |
1235 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60978 |
1 |
|
|
T34 |
690 |
|
T17 |
178 |
|
T102 |
1864 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47253 |
1 |
|
|
T34 |
542 |
|
T17 |
97 |
|
T102 |
1337 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T34 |
23 |
|
T17 |
5 |
|
T102 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T34 |
23 |
|
T17 |
7 |
|
T102 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T34 |
22 |
|
T17 |
5 |
|
T102 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T34 |
21 |
|
T17 |
5 |
|
T102 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T34 |
8 |
|
T17 |
3 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T34 |
22 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T34 |
20 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T34 |
9 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T34 |
20 |
|
T17 |
5 |
|
T102 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T34 |
18 |
|
T17 |
7 |
|
T102 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T34 |
17 |
|
T17 |
7 |
|
T102 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T34 |
17 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T34 |
19 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T34 |
19 |
|
T17 |
4 |
|
T102 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T34 |
16 |
|
T17 |
6 |
|
T102 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T34 |
16 |
|
T17 |
5 |
|
T102 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T34 |
8 |
|
T17 |
5 |
|
T102 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T34 |
18 |
|
T17 |
4 |
|
T102 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T34 |
8 |
|
T17 |
2 |
|
T102 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T34 |
12 |
|
T17 |
4 |
|
T102 |
42 |