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Group Instance : direct_out_cov_obj_pin29
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin29

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin29
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin30
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin30

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin30
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin31
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin31

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin31
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin4
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin4

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin4
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin5
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin5

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin5
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin6
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin6

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin6
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin7
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin7

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin7
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin8
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin8

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin8
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : direct_out_cov_obj_pin9
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance direct_out_cov_obj_pin9

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance direct_out_cov_obj_pin9
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin10
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin10

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin10
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin11
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin11

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin11
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin12
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin12

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin12
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin13
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin13

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin13
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin14
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin14

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin14
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin15
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin15

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin15
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin16
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin16

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin16
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin17
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin17

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin17
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin18
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin18

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin18
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin19
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin19

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin19
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin20
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin20

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin20
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin21
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin21

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin21
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin22
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin22

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin22
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin23
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin23

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin23
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin24
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin24

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin24
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2



Group Instance : gpio_sticky_intr_pin25
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance gpio_sticky_intr_pin25

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance gpio_sticky_intr_pin25
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 0 1 0
cp_value 2 0 2 100.00 100 1 1 2

Go back
Group Instances:
direct_out_cov_obj_pin29
direct_out_cov_obj_pin3
direct_out_cov_obj_pin30
direct_out_cov_obj_pin31
direct_out_cov_obj_pin4
direct_out_cov_obj_pin5
direct_out_cov_obj_pin6
direct_out_cov_obj_pin7
direct_out_cov_obj_pin8
direct_out_cov_obj_pin9
gpio_sticky_intr_pin0
gpio_sticky_intr_pin1
gpio_sticky_intr_pin10
gpio_sticky_intr_pin11
gpio_sticky_intr_pin12
gpio_sticky_intr_pin13
gpio_sticky_intr_pin14
gpio_sticky_intr_pin15
gpio_sticky_intr_pin16
gpio_sticky_intr_pin17
gpio_sticky_intr_pin18
gpio_sticky_intr_pin19
gpio_sticky_intr_pin2
gpio_sticky_intr_pin20
gpio_sticky_intr_pin21
gpio_sticky_intr_pin22
gpio_sticky_intr_pin23
gpio_sticky_intr_pin24
gpio_sticky_intr_pin25

Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77423 1 T25 31 T26 4 T27 8
rising 77451 1 T25 32 T26 3 T27 9



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157402 1 T25 66 T26 18 T27 15
auto[1] 153715 1 T25 70 T26 5 T27 23


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77332 1 T25 35 T26 4 T27 10
rising 77361 1 T25 35 T26 4 T27 9



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157569 1 T25 71 T26 12 T27 21
auto[1] 153548 1 T25 65 T26 11 T27 17


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77291 1 T25 34 T26 4 T27 11
rising 77316 1 T25 34 T26 4 T27 11



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157727 1 T25 76 T26 13 T27 20
auto[1] 153390 1 T25 60 T26 10 T27 18


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77425 1 T25 35 T26 5 T27 9
rising 77421 1 T25 34 T26 5 T27 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157673 1 T25 75 T26 14 T27 16
auto[1] 153444 1 T25 61 T26 9 T27 22


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77113 1 T25 34 T26 7 T27 9
rising 77148 1 T25 33 T26 8 T27 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157428 1 T25 82 T26 12 T27 20
auto[1] 153689 1 T25 54 T26 11 T27 18


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77533 1 T25 35 T26 6 T27 10
rising 77568 1 T25 34 T26 7 T27 10



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157310 1 T25 67 T26 9 T27 22
auto[1] 153807 1 T25 69 T26 14 T27 16


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77448 1 T25 31 T26 4 T27 8
rising 77488 1 T25 31 T26 5 T27 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157709 1 T25 59 T26 11 T27 21
auto[1] 153408 1 T25 77 T26 12 T27 17


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77152 1 T25 36 T26 5 T27 9
rising 77204 1 T25 36 T26 6 T27 10



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157910 1 T25 65 T26 13 T27 18
auto[1] 153207 1 T25 71 T26 10 T27 20


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77327 1 T25 39 T26 5 T27 12
rising 77342 1 T25 39 T26 4 T27 12



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157695 1 T25 72 T26 14 T27 20
auto[1] 153422 1 T25 64 T26 9 T27 18


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 77746 1 T25 35 T26 6 T27 7
rising 77768 1 T25 35 T26 6 T27 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 157262 1 T25 63 T26 9 T27 14
auto[1] 153855 1 T25 73 T26 14 T27 24


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31660 1 T30 3 T31 12 T32 1
rising 31650 1 T30 3 T31 13 T1 5



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72298 1 T30 3 T31 22 T32 1
auto[1] 89289 1 T30 12 T31 42 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31548 1 T30 4 T31 12 T32 1
rising 31549 1 T30 5 T31 13 T1 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 71984 1 T30 8 T31 29 T32 2
auto[1] 89625 1 T30 9 T31 48 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31601 1 T30 5 T31 10 T1 5
rising 31605 1 T30 5 T31 11 T1 5



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72441 1 T30 8 T31 26 T1 14
auto[1] 89506 1 T30 8 T31 33 T32 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31683 1 T30 3 T31 17 T1 8
rising 31696 1 T30 2 T31 17 T1 7



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72425 1 T30 9 T31 29 T1 12
auto[1] 90044 1 T30 4 T31 58 T32 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31660 1 T30 2 T31 15 T32 1
rising 31678 1 T30 1 T31 15 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72226 1 T30 4 T31 46 T32 2
auto[1] 90016 1 T30 5 T31 56 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31834 1 T30 4 T31 11 T1 8
rising 31834 1 T30 3 T31 11 T1 7



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72472 1 T30 7 T31 40 T1 16
auto[1] 89214 1 T30 6 T31 36 T32 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31331 1 T30 5 T31 12 T1 4
rising 31330 1 T30 4 T31 11 T1 3



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 71545 1 T30 6 T31 29 T1 10
auto[1] 89979 1 T30 10 T31 45 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31877 1 T30 1 T31 10 T32 1
rising 31886 1 T30 2 T31 11 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72514 1 T30 6 T31 30 T32 1
auto[1] 89514 1 T30 6 T31 49 T32 5


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31637 1 T30 4 T31 17 T1 4
rising 31637 1 T30 3 T31 17 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72363 1 T30 9 T31 43 T32 1
auto[1] 89771 1 T30 4 T31 45 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31564 1 T30 4 T31 12 T32 1
rising 31556 1 T30 4 T31 11 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72312 1 T30 5 T31 32 T32 2
auto[1] 89133 1 T30 10 T31 38 T32 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31458 1 T30 3 T31 13 T1 7
rising 31493 1 T30 2 T31 14 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72324 1 T30 3 T31 36 T32 1
auto[1] 88966 1 T30 7 T31 37 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31702 1 T30 1 T31 17 T32 1
rising 31719 1 T30 2 T31 17 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72163 1 T30 2 T31 40 T32 2
auto[1] 89234 1 T30 9 T31 49 T32 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31467 1 T30 4 T31 12 T32 1
rising 31470 1 T30 5 T31 11 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72233 1 T30 7 T31 24 T32 1
auto[1] 89730 1 T30 9 T31 53 T32 4


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31853 1 T30 4 T31 16 T1 4
rising 31875 1 T30 4 T31 16 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72797 1 T30 7 T31 29 T32 1
auto[1] 89079 1 T30 9 T31 50 T32 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31798 1 T30 3 T31 14 T1 6
rising 31789 1 T30 3 T31 15 T1 7



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72559 1 T30 7 T31 32 T1 11
auto[1] 89231 1 T30 6 T31 43 T32 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31535 1 T30 2 T31 11 T32 1
rising 31555 1 T30 2 T31 12 T1 8



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72024 1 T30 6 T31 38 T32 1
auto[1] 89870 1 T30 7 T31 38 T32 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31788 1 T30 1 T31 10 T1 6
rising 31787 1 T30 2 T31 11 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 71911 1 T30 3 T31 27 T32 1
auto[1] 89989 1 T30 9 T31 40 T32 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31776 1 T30 3 T31 13 T32 1
rising 31777 1 T30 3 T31 13 T32 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 71964 1 T30 5 T31 38 T32 1
auto[1] 89871 1 T30 7 T31 38 T32 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 31668 1 T30 2 T31 15 T32 1
rising 31667 1 T30 2 T31 16 T1 4



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 72234 1 T30 3 T31 28 T32 1
auto[1] 89331 1 T30 8 T31 49 T32 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%